diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb b/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb index 7f2113e..d16aa4a 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb and b/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/com.log b/hilbert_dpi/codegen/dll/hilbert_fir/com.log index 0b3306d..ef614b5 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/com.log +++ b/hilbert_dpi/codegen/dll/hilbert_fir/com.log @@ -1,7 +1,7 @@ Command: vcs -full64 -sverilog -ntb_opts uvm-1.2 +vcs+loopreport+1000 -debug_acc+all \ -debug_region+cell+encrypt -f files.f -l com.log -fsdb +define+FSDB Chronologic VCS (TM) - Version O-2018.09-SP2_Full64 -- Mon Oct 28 23:57:53 2024 + Version O-2018.09-SP2_Full64 -- Thu Apr 3 13:13:31 2025 Copyright (c) 1991-2018 by Synopsys Inc. ALL RIGHTS RESERVED @@ -9,377 +9,7 @@ This program is proprietary and confidential information of Synopsys Inc. and may be used and disclosed only as authorized in a license agreement controlling such use and disclosure. -Parsing design file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv' -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_version_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_global_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_message_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_phase_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_object_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_printer_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_tlm_defines.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_imps.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_tlm_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_sequence_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_callback_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_reg_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_deprecated_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_dpi.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_hdl.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_dpi.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_svcmd_dpi.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_dpi.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_regex.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_dpi.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_coreservice.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_version.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_object_globals.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_misc.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_object.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_pool.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_queue.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_factory.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_registry.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_spell_chkr.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_resource.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_resource_specializations.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_resource_db.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_config_db.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_printer.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_comparer.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_packer.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_links.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_tr_database.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_tr_stream.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_recorder.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_event_callback.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_event.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_barrier.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_callback.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_callback.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_report_message.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_report_catcher.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_report_server.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_report_handler.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_report_object.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_transaction.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_phase.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_domain.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_bottomup_phase.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_topdown_phase.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_task_phase.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_common_phases.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_runtime_phases.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_component.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_root.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_component.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_objection.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_heartbeat.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_globals.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_cmdline_processor.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_traversal.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_dap.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_set_get_dap_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_dap.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_simple_lock_dap.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_dap.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_get_to_lock_dap.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_dap.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_set_before_get_dap.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dap/uvm_dap.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_ifs.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_sqr_ifs.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_port_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_imps.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_imps.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_ports.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_exports.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_analysis_port.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_fifo_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_fifos.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm_req_rsp.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_sqr_connections.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm1/uvm_tlm.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_pair.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_policies.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_in_order_comparator.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_algorithmic_comparator.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_random_stimulus.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_subscriber.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_monitor.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_driver.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_push_driver.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_scoreboard.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_agent.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_env.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_test.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/comps/uvm_comps.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequence_item.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequencer_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequencer_analysis_fifo.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequencer_param_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequencer.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_push_sequencer.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequence_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequence.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequence_library.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_sequence_builtin.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/seq/uvm_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_time.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_generic_payload.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_ifs.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_imps.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_ports.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_exports.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_sockets_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2_sockets.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/tlm2/uvm_tlm2.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_item.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_adapter.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_predictor.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_sequence.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_cbs.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_backdoor.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_field.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_vreg_field.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_indirect.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_fifo.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_file.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_mem_mam.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_vreg.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_mem.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_map.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_block.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_hw_reset_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_bit_bash_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_mem_walk_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_mem_access_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_access_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_mem_shared_access_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_mem_built_in_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/sequences/uvm_reg_mem_hdl_paths_seq.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/snps_uvm_reg_bank.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/reg/uvm_reg_model.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv'. -Parsing design file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv' -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/msglog.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_msglog_report_server.sv'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_recorder.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_tr_database.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_tr_stream.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_tr_database.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_recorder.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_record_interface.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_global_defines.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_vcs_record_interface.sv'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv'. -Parsing design file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv' -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_recorder.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_pli_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_recorder.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_tr_database.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_tr_stream.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_tr_database.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_recorder.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_reg_map_recording.sv'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_message_catcher.svh'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_pli_base.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_message_catcher.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_factory.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/./dpi/uvm_verdi_dpi.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_reg_recording.sv'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/verdi_trans_recorder_dpi.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing included file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_verdi_pli.svh'. -Back to file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv'. -Parsing design file '/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv' -Parsing design file './tb.sv' -Parsing design file './hilbert_fir_dpi_pkg.sv' -Parsing design file './hilbert_fir_dpi.sv' -Top Level Modules: - uvm_custom_install_recording - uvm_custom_install_verdi_recording - tb -No TimeScale specified -Starting vcs inline pass... -9 modules and 0 UDP read. -recompiling package vcs_paramclassrepository -recompiling package _vcs_DPI_package -recompiling package uvm_pkg -recompiling package _vcs_msglog -recompiling module uvm_custom_install_recording -recompiling module uvm_custom_install_verdi_recording -recompiling module tb -recompiling package hilbert_fir_dpi_pkg -recompiling module hilbert_fir_dpi -All of 9 modules done -make[1]: Entering directory `/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/csrc' \ +The design hasn't changed and need not be recompiled. +If you really want to, delete file simv.daidir/.vcs.timestamp and +run VCS again. -rm -f _csrc*.so pre_vcsobj_*.so share_vcsobj_*.so -g++ -w -pipe -DVCSMX -DUVM_DPI_DO_TYPE_CHECK -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include \ --c /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/dpi/uvm_dpi.cc -g++ -w -pipe -DVCSMX -DUVM_DPI_DO_TYPE_CHECK -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include \ --c /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/dpi/uvm_verdi_dpi.cpp -if [ -x ../simv ]; then chmod -x ../simv; fi -g++ -o ../simv -Wl,-rpath-link=./ -Wl,-rpath='$ORIGIN'/simv.daidir/ -Wl,-rpath=./simv.daidir/ \ --Wl,-rpath='$ORIGIN'/simv.daidir//scsim.db.dir -rdynamic -Wl,-rpath=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib \ --L/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib uvm_dpi.o uvm_verdi_dpi.o objs/amcQw_d.o \ -_64535_archive_1.so SIM_l.o rmapats_mop.o rmapats.o rmar.o rmar_nd.o rmar_llvm_0_1.o \ -rmar_llvm_0_0.o -lzerosoft_rt_stubs -lvirsim -lerrorinf -lsnpsmalloc -lvfs \ --lvcsnew -lsimprofile -luclinative /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_tls.o \ --Wl,-whole-archive -lvcsucli -Wl,-no-whole-archive ./../simv.daidir/vc_hdrs.o \ -_vcs_pli_stub_.o /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_save_restore_new.o \ -/opt/synopsys/verdi/Verdi_N-2017.12-SP2/share/PLI/VCS/LINUX64/pli.a -ldl -lc -lm \ --lpthread -ldl -../simv up to date -make[1]: Leaving directory `/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/csrc' \ - -CPU time: 6.767 seconds to compile + .302 seconds to elab + .861 seconds to link diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/_prev_cginfo.json b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/_prev_cginfo.json new file mode 100644 index 0000000..7038758 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/_prev_cginfo.json @@ -0,0 +1,533 @@ +{ + "MlibObjs": {}, + "cycles_program_begin": 46912901323786712, + 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0.017125129699707031, + 0.035784999999999997, + 0.033797000000000001, + 216488, + 216488, + 0.0, + 0.0, + 1743656994.1351631, + 46912901324009902 + ], + "sub": [ + { + "stat": [ + "doParsingAndDesignResolution", + "entry", + 0.1459190845489502, + 0.040945000000000002, + 0.043869999999999999, + 276604, + 277404, + 0.0, + 0.0, + 1743656994.263957, + 46912901658844552 + ], + "sub": [] + }, + { + "stat": [ + "doParsingAndDesignResolution", + "exit", + 1.2556860446929932, + 1.1150910000000001, + 0.078794000000000003, + 317052, + 317700, + 0.0, + 0.0, + 1743656995.373724, + 46912904544338514 + ], + "sub": [] + }, + { + "stat": [ + "doPostDesignResolutionToVir2Vcs", + "entry", + 1.2857940196990967, + 1.144398, + 0.078820000000000001, + 317052, + 317700, + 0.0, + 0.0, + 1743656995.403832, + 46912904622569362 + ], + "sub": [ + { + "stat": [ + "doUptoVir2VcsNoSepCleanup", + "entry", + 1.9180049896240234, + 1.770546, + 0.084881999999999999, + 318340, + 318344, + 0.0, + 0.0, + 1743656996.0360429, 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0.22587299999999999, + 352784, + 352820, + 0.021333999999999999, + 0.055456999999999999, + 1743657001.0283051, + 46912919246223126 + ], + "sub": [] + } + ], + "rlimit": { + "stack": -1, + "data": -1 + }, + "cpu_cycles_pass2_start": 46912912651950570, + "PrevCompiledModules": { + "_vcs_unit__3504648197": { + "eQdaR_d": { + "archive": "archive.5/_prev_archive_1.a", + "checksum": 0, + "bytes": 15256, + "out": "eQdaR_d.o", + "mod": "_vcs_unit__3504648197", + "mode": 4 + } + }, + "uvm_custom_install_recording": { + "nhiwz_d": { + "archive": "archive.5/_prev_archive_1.a", + "checksum": 0, + "bytes": 546378, + "out": "nhiwz_d.o", + "mod": "uvm_custom_install_recording", + "mode": 4 + } + }, + "...MASTER...": { + "amcQw_d": { + "checksum": 0, + "bytes": 9934, + "out": "objs/amcQw_d.o", + "mod": "...MASTER...", + "mode": 4 + } + }, + "hilbert_fir_dpi_pkg": { + "RFT57_d": { + "archive": "archive.5/_prev_archive_1.a", + "checksum": 0, + "bytes": 10938, + "out": "RFT57_d.o", + "mod": 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"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir", + "daidir": "simv.daidir", + "default_output_dir": "csrc", + "archive_dir": "archive.5" + }, + "CompileStatus": "Successful" +} \ No newline at end of file diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_30843_archive_1.a.info b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_30843_archive_1.a.info new file mode 100644 index 0000000..217c200 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_30843_archive_1.a.info @@ -0,0 +1,3 @@ +zr7M1_d.o +g7hgQ_d.o +amcQwB.o diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_prev_archive_1.a.info b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_prev_archive_1.a.info new file mode 100644 index 0000000..e9f36e7 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/archive.6/_prev_archive_1.a.info @@ -0,0 +1,9 @@ +EbjT3_d.o +eQdaR_d.o +hEeZs_d.o +reYIK_d.o +RFT57_d.o +nhiwz_d.o +uM9F1_d.o +zQBzV_d.o +fhaHS_d.o diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cgincr.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cgincr.sdb index f2fecab..5f45374 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cgincr.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cgincr.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cginfo.json b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cginfo.json index 1e9c38a..4e981d7 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cginfo.json +++ b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cginfo.json @@ -1,33 +1,89 @@ { + "cycles_program_begin": 46913067006791720, + "CompileProcesses": [ + "cgproc.30843.json" + ], + "stat": { + "ru_self_cgstart": { + "ru_nivcsw": 64, + "ru_minflt": 56261, + "ru_utime_sec": 4.0316229999999997, + "ru_stime_sec": 0.129051, + "ru_majflt": 0, + "ru_maxrss_kb": 142848, + "ru_nvcsw": 53 + }, + "ru_self_end": { + "ru_nivcsw": 70, + "ru_minflt": 76745, + "ru_utime_sec": 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"csrc" + } + }, + "ObjArchives": [ + { + "archive": "archive.6/_30843_archive_1.a", + "objects": [ + [ + "zr7M1_d.o", + 7322696 + ], + [ + "g7hgQ_d.o", + 35284 + ], + [ + "amcQwB.o", + 406424 + ] + ], + "size": 7764404 + } + ], + "stat": { + "ru_self_end": { + "ru_nivcsw": 70, + "ru_minflt": 76741, + "ru_utime_sec": 6.6896649999999998, + "ru_stime_sec": 0.21408199999999999, + "ru_majflt": 0, + "ru_maxrss_kb": 157556, + "ru_nvcsw": 55 + }, + "ru_childs_end": { + "ru_nivcsw": 24, + "ru_minflt": 11249, + "ru_utime_sec": 0.014881999999999999, + "ru_stime_sec": 0.056870999999999998, + "ru_majflt": 0, + "ru_maxrss_kb": 81080, + "ru_nvcsw": 26 + }, + "cpu_cycles_end": 46913085260924890, + "peak_mem_kb": 358488 + } +} \ No newline at end of file diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/checksum b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/checksum index f8f3585..0edccb7 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/checksum and b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/checksum differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cwidincr.db b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cwidincr.db index 7dc4646..8b09e95 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cwidincr.db and b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/cwidincr.db differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/filelist.cu b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/filelist.cu index 3f3a9c8..042f75e 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/filelist.cu +++ b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/filelist.cu @@ -1,15 +1,26 @@ PIC_LD=ld ARCHIVE_OBJS= -ARCHIVE_OBJS += _64535_archive_1.so -_64535_archive_1.so : archive.0/_64535_archive_1.a +ARCHIVE_OBJS += _30843_archive_1.so +_30843_archive_1.so : archive.6/_30843_archive_1.a @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_64535_archive_1.so --whole-archive $< --no-whole-archive + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_30843_archive_1.so --whole-archive $< --no-whole-archive @rm -f $@ - @ln -sf .//../simv.daidir//_64535_archive_1.so $@ + @ln -sf .//../simv.daidir//_30843_archive_1.so $@ + + +ARCHIVE_OBJS += _prev_archive_1.so +_prev_archive_1.so : archive.6/_prev_archive_1.a + @$(AR) -s $< + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_prev_archive_1.so --whole-archive $< --no-whole-archive + @rm -f $@ + @ln -sf .//../simv.daidir//_prev_archive_1.so $@ +VCS_ARC0 =_csrc0.so + +VCS_OBJS0 =objs/amcQw_d.o O0_OBJS = @@ -20,6 +31,12 @@ $(O0_OBJS) : %.o: %.c %.o: %.c $(CC_CG) $(CFLAGS_CG) -c -o $@ $< + +$(VCS_ARC0) : $(VCS_OBJS0) + $(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//$(VCS_ARC0) $(VCS_OBJS0) + rm -f $(VCS_ARC0) + @ln -sf .//../simv.daidir//$(VCS_ARC0) $(VCS_ARC0) + CU_UDP_OBJS = \ @@ -27,7 +44,7 @@ CU_LVL_OBJS = \ SIM_l.o MAIN_OBJS = \ -objs/amcQw_d.o -CU_OBJS = $(MAIN_OBJS) $(ARCHIVE_OBJS) $(CU_UDP_OBJS) $(CU_LVL_OBJS) + +CU_OBJS = $(MAIN_OBJS) $(ARCHIVE_OBJS) $(VCS_ARC0) $(CU_UDP_OBJS) $(CU_LVL_OBJS) diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/csrc/pre.cgincr.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/pre.cgincr.sdb new file mode 100644 index 0000000..0b723c1 Binary files /dev/null and b/hilbert_dpi/codegen/dll/hilbert_fir/csrc/pre.cgincr.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir.c b/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir.c index eb7dfd3..c04ef74 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir.c +++ b/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir.c @@ -35,7 +35,8 @@ void hilbert_fir(const double data[8], double i_data[8], double q_data[8]) } for (k = 0; k < 8; k++) { double d; - d = floor(q_data_temp[k + 16] / 32768.0); + d = round(q_data_temp[k + 16] / 32768.0); +// d = floor(q_data_temp[k + 16] / 32768.0); q_data[k] = d; if (d > 32767.0) { d = 32767.0; diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/novas.conf b/hilbert_dpi/codegen/dll/hilbert_fir/novas.conf new file mode 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+Verdi_1\position.y=27 +Verdi_1\width=1920 +Verdi_1\height=977 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/novas.rc b/hilbert_dpi/codegen/dll/hilbert_fir/novas.rc new file mode 100644 index 0000000..29bdfc9 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/novas.rc @@ -0,0 +1,1259 @@ +@verdi rc file Version 1.0 +[Library] +work = ./work +[Annotation] +3D_Active_Annotation = FALSE +[CommandSyntax.finsim] +InvokeCommand = +FullFileName = TRUE +Separator = . +SimPromptSign = ">" +HierNameLevel = 1 +RunContinue = "continue" +Finish = "quit" +UseAbsTime = FALSE +NextTime = "run 1" +NextNTime = "run ${SimBPTime}" +NextEvent = "run 1" +Reset = +ObjPosBreak = "break posedge ${SimBPObj}" +ObjNegBreak = "break negedge ${SimBPObj}" +ObjAnyBreak = "break change ${SimBPObj}" +ObjLevelBreak = +LineBreak = "breakline ${SimBPFile} ${SimBPLine}" +AbsTimeBreak = "break abstimeaf ${SimBPTime}" +RelTimeBreak = "break reltimeaf ${SimBPTime}" +EnableBP = "breakon ${SimBPId}" +DisableBP = "breakoff ${SimBPId}" +DeleteBP = "breakclr ${SimBPId}" +DeleteAllBP = "breakclr" +SimSetScope = "cd ${SimDmpObj}" +[CommandSyntax.ikos] +InvokeCommand = "setvar debussy true;elaborate -p ${SimTop} -s ${SimArch}; run until 0;fsdbInteractive; " +FullFileName = TRUE +NeedTimeUnit = TRUE +NormalizeTimeUnit = TRUE +Separator = / +HierNameLevel = 2 +RunContinue = "run" +Finish = "exit" +NextTime = "run ${SimBPTime} ${SimTimeUnit}" +NextNTime = "run for ${SimBPTime} ${SimTimeUnit}" +NextEvent = "step 1" +Reset = "reset" +ObjPosBreak = "stop if ${SimBPObj} = \"'1'\"" +ObjNegBreak = "stop if ${SimBPObj} = \"'0'\"" +ObjAnyBreak = +ObjLevelBreak = "stop if ${SimBPObj} = ${SimBPValue}" +LineBreak = "stop at ${SimBPFile}:${SimBPLine}" +AbsTimeBreak = +RelTimeBreak = +EnableBP = "enable ${SimBPId}" +DisableBP = "disable ${SimBPId}" +DeleteBP = "delete ${SimBPId}" +DeleteAllBP = "delete *" +[CommandSyntax.verisity] +InvokeCommand = +FullFileName = FALSE +Separator = . +SimPromptSign = "> " +HierNameLevel = 1 +RunContinue = "." +Finish = "$finish;" +NextTime = "$db_steptime(1);" +NextNTime = "$db_steptime(${SimBPTime});" +NextEvent = "$db_step;" +SimSetScope = "$scope(${SimDmpObj});" +Reset = "$reset;" +ObjPosBreak = "$db_breakonposedge(${SimBPObj});" +ObjNegBreak = "$db_breakonnegedge(${SimBPObj});" +ObjAnyBreak = "$db_breakwhen(${SimBPObj});" +ObjLevelBreak = "$db_breakwhen(${SimBPObj}, ${SimBPValue});" +LineBreak = "$db_breakatline(${SimBPLine}, ${SimBPScope}, \"${SimBPFile}\");" +AbsTimeBreak = "$db_breakbeforetime(${SimBPTime});" +RelTimeBreak = "$db_breakbeforetime(${SimBPTime});" +EnableBP = "$db_enablebreak(${SimBPId});" +DisableBP = "$db_disablebreak(${SimBPId});" +DeleteBP = "$db_deletebreak(${SimBPId});" +DeleteAllBP = "$db_deletebreak;" +FSDBInit = "$novasInteractive;" +FSDBDumpvars = "$novasDumpvars(0, ${SimDmpObj});" +FSDBDumpsingle = "$novasDumpsingle(${SimDmpObj});" +FSDBDumpvarsInFile = "$novasDumpvarsToFile(\"${SimDmpFile}\");" +FSDBDumpMem = "$novasDumpMemNow(${SimDmpObj}, ${SimDmpBegin}, ${SimDmpSize});" +[CoverageDetail] +cross_filter_limit = 1000 +branch_limit_vector_display = 50 +showgrid = TRUE +reuseFirst = TRUE +justify = TRUE +scrollbar_mode = per pane +test_combo_left_truncate = TRUE +instance_combo_left_truncate = TRUE +loop_navigation = TRUE +condSubExpr = 20 +tglMda = 1000 +linecoverable = 100000 +lineuncovered = 50000 +tglcoverable = 30000 +tgluncovered = 30000 +pendingMax = 1000 +show_full_more = FALSE +[CoverageHier] +showgrid = FALSE +[CoverageWeight] +Assert = 1 +Covergroup = 1 +Line = 1 +Condition = 1 +Toggle = 1 +FSM = 1 +Branch = 1 +[DesignTree] +IfShowModule = {TRUE, FALSE} +[DisabledMessages] +version = Verdi_N-2017.12-SP2 +[Editor] +editorName = TurboEditor +[Emacs] +EmacsFont = "Clean 14" +EmacsBG = white +EmacsFG = black +[Exclusion] +enableAsDefault = TRUE +saveAsDefault = TRUE +saveManually = TRUE +illegalBehavior = FALSE +DisplayExcludedItem = FALSE +adaptiveExclusion = TRUE +favorite_exclude_annotation = "" +[FSM] +viewport = 65 336 387 479 +WndBk-FillColor = Gray3 +Background-FillColor = gray5 +prefKey_Link-FillColor = yellow4 +prefKey_Link-TextColor = black +Trap = red3 +Hilight = blue4 +Window = Gray3 +Selected = white +Trans. = green2 +State = black +Init. = black +SmartTips = TRUE +VectorFont = FALSE +StopAskBkgndColor = FALSE +ShowStateAction = FALSE +ShowTransAction = FALSE +ShowTransCond = FALSE +StateLable = NAME +StateValueRadix = ORIG +State-LineColor = ID_BLACK +State-LineWidth = 1 +State-FillColor = ID_BLUE2 +State-TextColor = ID_WHITE +Init_State-LineColor = ID_BLACK +Init_State-LineWidth = 2 +Init_State-FillColor = ID_YELLOW2 +Init_State-TextColor = ID_BLACK +Reset_State-LineColor = ID_BLACK +Reset_State-LineWidth = 2 +Reset_State-FillColor = ID_YELLOW7 +Reset_State-TextColor = ID_BLACK +Trap_State-LineColor = ID_RED2 +Trap_State-LineWidth = 2 +Trap_State-FillColor = ID_CYAN5 +Trap_State-TextColor = ID_RED2 +State_Action-LineColor = ID_BLACK +State_Action-LineWidth = 1 +State_Action-FillColor = ID_WHITE +State_Action-TextColor = ID_BLACK +Junction-LineColor = ID_BLACK +Junction-LineWidth = 1 +Junction-FillColor = ID_GREEN2 +Junction-TextColor = ID_BLACK +Connection-LineColor = ID_BLACK +Connection-LineWidth = 1 +Connection-FillColor = ID_GRAY5 +Connection-TextColor = ID_BLACK +prefKey_Port-LineColor = ID_BLACK +prefKey_Port-LineWidth = 1 +prefKey_Port-FillColor = ID_ORANGE6 +prefKey_Port-TextColor = ID_YELLOW2 +Transition-LineColor = ID_BLACK +Transition-LineWidth = 1 +Transition-FillColor = ID_WHITE +Transition-TextColor = ID_BLACK +Trans_Condition-LineColor = ID_BLACK +Trans_Condition-LineWidth = 1 +Trans_Condition-FillColor = ID_WHITE +Trans_Condition-TextColor = ID_ORANGE2 +Trans_Action-LineColor = ID_BLACK +Trans_Action-LineWidth = 1 +Trans_Action-FillColor = ID_WHITE +Trans_Action-TextColor = ID_GREEN2 +SelectedSet-LineColor = ID_RED2 +SelectedSet-LineWidth = 1 +SelectedSet-FillColor = ID_RED2 +SelectedSet-TextColor = ID_WHITE +StickSet-LineColor = ID_ORANGE5 +StickSet-LineWidth = 1 +StickSet-FillColor = ID_PURPLE6 +StickSet-TextColor = ID_BLACK +HilightSet-LineColor = ID_RED5 +HilightSet-LineWidth = 1 +HilightSet-FillColor = ID_RED7 +HilightSet-TextColor = ID_BLUE5 +ControlPoint-LineColor = ID_BLACK +ControlPoint-LineWidth = 1 +ControlPoint-FillColor = ID_WHITE +Bundle-LineColor = ID_BLACK +Bundle-LineWidth = 1 +Bundle-FillColor = ID_WHITE +Bundle-TextColor = ID_BLUE4 +QtBackground-FillColor = ID_GRAY6 +prefKey_Link-LineColor = ID_ORANGE2 +prefKey_Link-LineWidth = 1 +Selection-LineColor = ID_BLUE2 +Selection-LineWidth = 1 +[FSM_Dlg-Print] +Orientation = Landscape +[FileBrowser] +nWaveOpenFsdbDirHistory = "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb\"" +[Form] +version = Verdi_N-2017.12-SP2 +wave/unknownSave.fm = 100,100,520,275 +[General] +autoSaveSession = FALSE +TclAutoSource = +cmd_enter_form = FALSE +SyncBrowserDir = TRUE +version = Verdi_N-2017.12-SP2 +SignalCaseInSensitive = FALSE +ShowWndCtntDuringResizing = FALSE +[GlobalProp] +ErrWindow_Font = Helvetica_M_R_12 +[Globals] +app_default_font = Bitstream Vera Sans,10,-1,5,50,0,0,0,0,0 +app_fixed_width_font = Courier,10,-1,5,50,0,0,0,0,0 +text_encoding = Unicode(utf8) +smart_resize = TRUE +smart_resize_child_limit = 2000 +tooltip_max_width = 200 +tooltip_max_height = 20 +tooltip_viewer_key = F3 +tooltip_display_time = 1000 +bookmark_name_length_limit = 12 +disable_tooltip = FALSE +auto_load_source = TRUE +max_array_size = 4096 +filter_when_typing = TRUE +filter_keep_children = TRUE +filter_syntax = Wildcards +filter_keystroke_interval = 800 +filter_case_sensitive = FALSE +filter_full_path = FALSE +load_detail_for_funcov = FALSE +sort_limit = 100000 +ignoreDBVersionChecking = FALSE +[HB] +ViewSchematic = FALSE +windowLayout = 0 0 804 500 182 214 804 148 +import_filter = *.v; *.vc; *.f +designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +import_filter_vhdl = *.vhd; *.vhdl; *.f +import_filter_verilog = *.v; *.vc; *.f +simulation_file_type = *.fsdb;*.fsdb.gz;*.fsdb.bz2;*.ff;*.dump +PrefetchViewableAnnot = TRUE +import_default_language = Verilog +import_from = source +[Hier] +filterTimeout = 1500 +[ImportLiberty] +SearchPriority = .lib++ +bSkipStateCell = False +bImportPowerInfo = False +bSkipFFCell = False +bScpecifyCellNameCase = False +bSpecifyPinNameCase = False +CellNameToCase = +PinNameToCase = +[Language] +EditWindow_Font = COURIER12 +Background = ID_WHITE +Comment = ID_GRAY4 +Keyword = ID_BLUE5 +UserKeyword = ID_GREEN2 +Text = ID_BLACK +SelText = ID_WHITE +SelBackground = ID_BLUE2 +[Library.Ikos] +pack = ./work.lib++ +vital = ./work.lib++ +work = ./work.lib++ +std = ${dls_std}.lib++ +ieee = ${dls_ieee}.lib++ +synopsys = ${dls_synopsys}.lib++ +silc = ${dls_silc}.lib++ +ikos = ${dls_ikos}.lib++ +novas = ${VOYAGER_LIB_VHDL}/${VOYAGER_MACHINE}/novas.lib++ +[MDT] +ART_RF_SP = spr[0-9]*bx[0-9]* +ART_RF_2P = dpr[0-9]*bx[0-9]* +ART_SRAM_SP = spm[0-9]*bx[0-9]* +ART_SRAM_DP = dpm[0-9]*bx[0-9]* +VIR_SRAM_SP = hdsd1_[0-9]*x[0-9]*cm4sw1 +VIR_SRAM_DP = hdsd2_[0-9]*x[0-9]*cm4sw1 +VIR_RF_SP = rfsd1_[0-9]*x[0-9]*cm2sw0 +VIR_RF_DP = rfsd2_[0-9]*x[0-9]*cm2sw1 +VIR_STAR_SRAM_SP = shsd1_[0-9]*x[0-9]*cm4sw0 +[NPExpanding] +functiongroups = FALSE +modules = FALSE +[NPFilter] +showAssertion = TRUE +showCoverGroup = TRUE +showProperty = TRUE +showSequence = TRUE +showDollarUnit = TRUE +[OtherEditor] +cmd1 = "xterm -font 9x15 -fg black -bg gray -e" +name = "vi" +options = "+${CurLine} ${CurFullFileName}" +[Power] +PowerDownInstance = ID_GRAY1 +RetentionSignal = ID_YELLOW2 +IsolationSignal = ID_RED6 +LevelShiftedSignal = ID_GREEN6 +PowerSwitchObject = ID_ORANGE5 +AlwaysOnObject = ID_GREEN5 +PowerNet = ID_RED2 +GroundNet = ID_RED2 +SimulationOnly = ID_CYAN3 +SRSN/SPA = ID_CYAN3 +CNSSignal = ID_CYAN3 +AcknowledgeSignal = ID_CYAN3 +BoundaryPort = ID_CYAN3 +DisplayInstrumentedCell = TRUE +ShowCmdByFile = FALSE +ShowPstAnnot = FALSE +ShowIsoSymbol = TRUE +ExtractIsoSameNets = FALSE +AnnotateSignal = TRUE +HighlightPowerObject = TRUE +HighlightPowerDomain = TRUE +BrightenPowerColorInSchematicWindow = FALSE +ShowAlias = FALSE +ShowVoltage = TRUE +MatchTreeNodesCaseInsensitive = FALSE +SearchHBNodeDynamically = FALSE +ContinueTracingSupplyOrLogicNet = FALSE +[Print] +PrinterName = lp +FileName = test.ps +PaperSize = A4 - 210x297 (mm) +ColorPrint = FALSE +[PropertyTools] +saveFsdbStat = TRUE +savePropStat = FALSE +savePropDtl = TRUE +[QtDialog] +openFileDlg = 658,311,602,483 +QwWarnMsgDlg = 650,792,600,250 +importDesignForm = 642,247,634,611 +QwUserAskDlg = 798,487,324,134 +[Relationship] +hideRecursiceNode = FALSE +[Session Cache] +2 = string (session file name) +3 = string (session file name) +4 = string (session file name) +5 = string (session file name) +1 = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses +[Simulation] +scsPath = scsim +scsOption = +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +osciPath = gdb +osciOption = +vcsPath = simv +vcsOption = +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +speedsimPath = +speedsimOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +interactiveDebugging = {True, False} +KeepBreakPoints = False +ScsDebugAll = False +simType = {vcssv, xl, nc, vcs, mti, mti_vlog, vhnc, scs, mixnc} +thirdpartyIdx = -1 +iscCmdSep = FALSE +NoAppendOption = False +[SimulationPlus] +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +vcsPath = simv +vcsOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +speedsimPath = verilog +speedsimOption = +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +scsPath = scsim +scsOption = +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +vcs_svPath = simv +vcs_svOption = +simType = vcssv +thirdpartyIdx = -1 +interactiveDebugging = FALSE +KeepBreakPoints = FALSE +iscCmdSep = FALSE +ScsDebugAll = FALSE +NoAppendOption = FALSE +invokeSimPath = work +[SimulationPlus2] +eventDumpUnfinish = FALSE +[Source] +wordWrapOn = TRUE +viewReuse = TRUE +lineNumberOn = TRUE +warnOutdatedDlg = TRUE +showEncrypt = FALSE +loadInclude = FALSE +showColorForActive = FALSE +tabWidth = 8 +editor = vi +reload = Never +sync_active_to_source = TRUE +navigateAsColored = FALSE +navigateCovered = FALSE +navigateUncovered = TRUE +navigateExcluded = FALSE +not_ask_for_source_path = FALSE +expandMacroOn = TRUE +[SourceVHDL] +vhSimType = ModelSim +ohSimType = VerilogXL +[TclShell] +nLineSize = 1024 +[Test] +verbose_progress = FALSE +[TestBenchBrowser] +-showUVMDynamicHierTreeWin = FALSE +[Text] +hdlTypeName = blue4 +hdlLibrary = blue4 +viewport = 396 392 445 487 +hdlOther = ID_BLACK +hdlComment = ID_GRAY1 +hdlKeyword = ID_BLUE5 +hdlEntity = ID_BLACK +hdlEntityInst = ID_BLACK +hdlSignal = ID_RED2 +hdlInSignal = ID_RED2 +hdlOutSignal = ID_RED2 +hdlInOutSignal = ID_RED2 +hdlOperator = ID_BLACK +hdlMinus = ID_BLACK +hdlSymbol = ID_BLACK +hdlString = ID_BLACK +hdlNumberBase = ID_BLACK +hdlNumber = ID_BLACK +hdlLiteral = ID_BLACK +hdlIdentifier = ID_BLACK +hdlSystemTask = ID_BLACK +hdlParameter = ID_BLACK +hdlIncFile = ID_BLACK +hdlDataFile = ID_BLACK +hdlCDSkipIf = ID_GRAY1 +hdlMacro = ID_BLACK +hdlMacroValue = ID_BLACK +hdlPlainText = ID_BLACK +hdlOvaId = ID_PURPLE2 +hdlPslId = ID_PURPLE2 +HvlEId = ID_BLACK +HvlVERAId = ID_BLACK +hdlEscSignal = ID_BLACK +hdlEscInSignal = ID_BLACK +hdlEscOutSignal = ID_BLACK +hdlEscInOutSignal = ID_BLACK +textBackgroundColor = ID_GRAY6 +textHiliteBK = ID_BLUE5 +textHiliteText = ID_WHITE +textTracedMark = ID_GREEN2 +textLineNo = ID_BLACK +textFoldedLineNo = ID_RED5 +textUserKeyword = ID_GREEN2 +textParaAnnotText = ID_BLACK +textFuncAnnotText = ID_BLUE2 +textAnnotText = ID_BLACK +textUserDefAnnotText = ID_BLACK +ComputedSignal = ID_PURPLE5 +textAnnotTextShadow = ID_WHITE +parenthesisBGColor = ID_YELLOW5 +codeInParenthesis = ID_CYAN5 +text3DLight = ID_WHITE +text3DShadow = ID_BLACK +textHvlDriver = ID_GREEN3 +textHvlLoad = ID_YELLOW3 +textHvlDriverLoad = ID_BLUE3 +irOutline = ID_RED2 +irDriver = ID_YELLOW5 +irLoad = ID_BLACK +irBookMark = ID_YELLOW2 +irIndicator = ID_WHITE +irBreakpoint = ID_GREEN5 +irCurLine = ID_BLUE5 +hdlVhEntity = ID_BLACK +hdlArchitecture = ID_BLACK +hdlPackage = ID_BLUE5 +hdlRefPackage = ID_BLUE5 +hdlAlias = ID_BLACK +hdlGeneric = ID_BLUE5 +specialAnnotShadow = ID_BLUE1 +hdlZeroInHead = ID_GREEN2 +hdlZeroInComment = ID_GREEN2 +hdlPslHead = ID_BLACK +hdlPslComment = ID_BLACK +hdlSynopsysHead = ID_GREEN2 +hdlSynopsysComment = ID_GREEN2 +pdmlIdentifier = ID_BLACK +pdmlCommand = ID_BLACK +pdmlMacro = ID_BLACK +font = COURIER12 +annotFont = Helvetica_M_R_10 +[Text.1] +viewport = -1 27 1920 977 45 +[TextPrinter] +Orientation = Landscape +Indicator = FALSE +LineNum = TRUE +FontSize = 7 +Column = 2 +Annotation = TRUE +[Texteditor] +TexteditorFont = "Clean 14" +TexteditorBG = white +TexteditorFG = black +[ThirdParty] +ThirdPartySimTool = verisity surefire ikos finsim +[TurboEditor] +autoBackup = TRUE +[UserButton.mixnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +Button8 = "FSDB Ver" "call fsdbVersion" +Button9 = "Dump On" "call fsdbDumpon" +Button10 = "Dump Off" "call fsdbDumpoff" +Button11 = "All Tasks" "call" +Button12 = "Dump Selected Instance" "call fsdbDumpvars 1 ${SelInst}" +[UserButton.mti] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.mti_vlog] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.nc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.scs] +Button1 = "Dump All Signals" "call fsdbDumpvars(0, \"${TopScope}\");\n" +Button2 = "Next 1000 Time" "run 1000 \n" +Button3 = "Next ? Time" "run ${Arg:Next Time} \n" +Button4 = "Run Step" "step\n" +Button5 = "Show Variables" "ls -v {${SelVars}}\n" +[UserButton.vhnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.xl] +Button13 = "Dump Off" "$fsdbDumpoff;\n" +Button12 = "Dump On" "$fsdbDumpon;\n" +Button11 = "Delete Focus" "$db_deletefocus(${treeSelScope});\n" +Button10 = "Set Focus" "$db_setfocus(${treeSelScope});\n" +Button9 = "Deposit Variable" "$deposit(${SelVar},${Arg:New Value});\n" +Button8 = "Release Variable" "release ${SelVar};\n" +Button7 = "Force Variable" "force ${SelVar} = ${Arg:New Value};\n" +Button6 = "Show Variables" "$showvars(${SelVars});\n" +Button5 = "Next ? Event" "$db_step(${Arg:Next Event});\n" +Button4 = "Next Event" "$db_step(1);\n" +Button3 = "Next ? Time" "#${Arg:Next Time} $stop;.\n" +Button2 = "Next 1000 Time" "#1000 $stop;.\n" +Button1 = "Dump All Signals" "$fsdbDumpvars;\n" +[VIA] +viaLogViewerDefaultRuleOneSearchForm = "share/VIA/Apps/PredefinedRules/Misc/Onesearch_rule.rc" +[VIA.oneSearch.preference] +DefaultDisplayTimeUnit = "1.000000ns" +DefaultLogTimeUnit = "1.000000ns" +[VIA.oneSearch.preference.vgifColumnSettingRC] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0] +parRuleSets = "" +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column0] +name = Severity +width = 60 +visualIndex = 1 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] +name = Code +width = 60 +visualIndex = 2 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] +name = Type +width = 60 +visualIndex = 3 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +name = Message +width = 2000 +visualIndex = 4 +isHidden = FALSE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +name = Time +width = 60 +visualIndex = 0 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[Vi] +ViFont = "Clean 14" +ViBG = white +ViFG = black +[Wave] +ovaEventSuccessColor = -c ID_CYAN5 +ovaEventFailureColor = -c ID_RED5 +ovaBooleanSuccessColor = -c ID_CYAN5 +ovaBooleanFailureColor = -c ID_RED5 +ovaAssertSuccessColor = -c ID_GREEN5 +ovaAssertFailureColor = -c ID_RED5 +ovaForbidSuccessColor = -c ID_GREEN5 +SigGroupRuleFile = +DisplayFileName = FALSE +waveform_vertical_scroll_bar = TRUE +scope_to_save_with_macro +open_file_dir +open_rc_file_dir +getSignalForm = 0 0 800 479 100 30 100 30 +viewPort = 0 28 1920 394 100 65 +signalSpacing = 5 +digitalSignalHeight = 15 +analogSignalHeight = 98 +commentSignalHeight = 98 +transactionSignalHeight = 98 +messageSignalHeight = 98 +minCompErrWidth = 4 +DragZoomTolerance = 4 +maxTransExpandedLayer = 10 +WaveMaxPoint = 512 +legendBackground = -c ID_BLACK +valueBackground = -c ID_BLACK +curveBackground = -c ID_BLACK +getSignalSignalList_BackgroundColor = -c ID_GRAY6 +glitchColor = -c ID_RED5 +cursor = -c ID_YELLOW5 -lw 1 -ls long_dashed +marker = -c ID_WHITE -lw 1 -ls dash_dot_l +usermarker = -c ID_GREEN5 -lw 1 -ls long_dashed +trace = -c ID_GRAY5 -lw 1 -ls long_dashed +grid = -c ID_WHITE -lw 1 -ls short_dashed +rulerBackground = -c ID_GRAY3 +rulerForeground = -c ID_YELLOW5 +busTextColor = -c ID_ORANGE8 +region(Active)Background = -c ID_YELLOW1 +region(NBA)Background = -c ID_RED1 +region(Re-Active)Background = -c ID_YELLOW3 +region(Re-NBA)Background = -c ID_RED3 +region(VHDL-Delta)Background = -c ID_ORANGE3 +region(Dump-Off)Background = -c ID_GRAY4 +High_Light = -c ID_GRAY2 +Input_Signal = -c ID_RED5 +Output_Signal = -c ID_GREEN5 +InOut_Signal = -c ID_BLUE5 +Net_Signal = -c ID_YELLOW5 +Register_Signal = -c ID_PURPLE5 +Verilog_Signal = -c ID_CYAN5 +VHDL_Signal = -c ID_ORANGE5 +SystemC_Signal = -c ID_BLUE7 +Dump_Off_Color = -c ID_BLUE2 +Compress_Bar_Color = -c ID_YELLOW4 +Vector_Dense_Block_Color = -c ID_ORANGE8 +Scalar_Dense_Block_Color = -c ID_GREEN6 +Composite_Dense_Block_Color = -c ID_ORANGE5 +DB_Power_Off_Layer = -c ID_BLUE4 -stipple dots +SPA_Driver_Power_Off_Layer = -c ID_ORANGE4 -stipple dots +SPA_Receiver_Power_Off_Layer = -c ID_GREEN5 -stipple dots +SRSN_Power_Off_Layer = -c ID_GREEN4 -stipple dots +Isolation_Power_Off_Layer = -c ID_RED4 -stipple dots +PD_Power_Off_Layer = -c ID_GRAY4 -stipple dots +Isolation_Layer = -c ID_RED4 -stipple vLine +Retention_Level_Trigger_Layer = -c ID_ORANGE1 -stipple fill_solid +Retention_Edge_Trigger_Layer = -c ID_YELLOW6 -stipple fill_solid +Driving_Power_Off_Layer = -c ID_YELLOW2 -stipple x +Toggle_Layer = -c ID_YELLOW4 -stipple slash +analogRealStyle = pwl +analogVoltageStyle = pwl +analogCurrentStyle = pwl +analogOthersStyle = pwl +busSignalLayer = -c ID_ORANGE8 +busXLayer = -c ID_RED5 +busZLayer = -c ID_ORANGE6 +busMixedLayer = -c ID_GREEN5 +busNotComputedLayer = -c ID_GRAY1 +busNoValueLayer = -c ID_BLUE2 +signalGridLayer = -c ID_WHITE +analogGridLayer = -c ID_GRAY6 +analogRulerLayer = -c ID_GRAY6 +keywordLayer = -c ID_RED5 +loadedLayer = -c ID_BLUE5 +loadingLayer = -c ID_BLACK +qdsCurMarkerLayer = -c ID_BLUE5 +qdsBrkMarkerLayer = -c ID_GREEN5 +qdsTrgMarkerLayer = -c ID_RED5 +arrowDefaultColor = -c ID_ORANGE6 +startNodeArrowColor = -c ID_WHITE +endNodeArrowColor = -c ID_YELLOW5 +propertyEventMatchColor = -c ID_GREEN5 +propertyEventNoMatchColor = -c ID_RED5 +propertyVacuousSuccessMatchColor = -c ID_YELLOW2 +propertyStatusBoundaryColor = -c ID_WHITE +propertyBooleanSuccessColor = -c ID_CYAN5 +propertyBooleanFailureColor = -c ID_RED5 +propertyAssertSuccessColor = -c ID_GREEN5 +propertyAssertFailureColor = -c ID_RED5 +propertyForbidSuccessColor = -c ID_GREEN5 +transactionForegroundColor = -c ID_YELLOW8 +transactionBackgroundColor = -c ID_BLACK +transactionHighLightColor = -c ID_CYAN6 +transactionRelationshipColor = -c ID_PURPLE6 +transactionErrorTypeColor = -c ID_RED5 +coverageFullyCoveredColor = -c ID_GREEN5 +coverageNoCoverageColor = -c ID_RED5 +coveragePartialCoverageColor = -c ID_YELLOW5 +coverageReferenceLineColor = -c ID_GRAY4 +messageForegroundColor = -c ID_YELLOW4 +messageBackgroundColor = -c ID_PURPLE1 +messageHighLightColor = -c ID_CYAN6 +messageInformationColor = -c ID_RED5 +ComputedAnnotColor = -c ID_PURPLE5 +fsvSecurityDataColor = -c ID_PURPLE3 +qdsAutoBusGroup = TRUE +qdsTimeStampMode = FALSE +qdsVbfBusOrderAscending = FALSE +openDumpFilter = *.fsdb;*.vf;*.jf +DumpFileFilter = *.vcd +RestoreSignalFilter = *.rc +SaveSignalFilter = *.rc +AddAliasFilter = *.alias;*.adb +CompareSignalFilter = *.err +ConvertFFFilter = *.vcd;*.out;*.tr0;*.xp;*.raw;*.wfm +Scroll_Ratio = 100 +Zoom_Ratio = 10 +EventSequence_SyncCursorTime = TRUE +EventSequence_Sorting = FALSE +EventSequence_RemoveGrid = FALSE +EventSequence_IsGridMode = FALSE +SetDefaultRadix = TRUE +DefaultRadix = Hex +SigSearchSignalMatchCase = FALSE +SigSearchSignalScopeOption = FALSE +SigSearchSignalSamenetInterface = FALSE +SigSearchSignalFullScope = FALSE +SigSearchSignalWithRegExp = FALSE +SigSearchDynamically = FALSE +SigDisplayBySelectionOrder = FALSE +SigDisplayRowMajor = FALSE +SigDragSelFollowColumn = FALSE +SigDisplayHierarchyBox = TRUE +SigDisplaySubscopeBox = TRUE +SigDisplayEmptyScope = TRUE +SigDisplaySignalNavigationBox = FALSE +SigDisplayFormBus = TRUE +SigShowSubProgram = TRUE +SigSearchScopeDynamically = TRUE +SigCollapseSubtreeNodes = FALSE +activeFileApplyToAnnotation = FALSE +GrpSelMode = TRUE +dispGridCount = FALSE +hierarchyName = FALSE +partial_level_name = FALSE +partial_level_head = 1 +partial_level_tail = 1 +displayMessageLabelOnly = TRUE +autoInsertDumpoffs = TRUE +displayMessageCallStack = FALSE +displayCallStackWithFullSections = TRUE +displayCallStackWithLastSection = FALSE +limitMessageMaxWidth = FALSE +messageMaxWidth = 50 +displayTransBySpecificColor = FALSE +fittedTransHeight = FALSE +snap = TRUE +gravitySnap = FALSE +displayLeadingZero = FALSE +displayGlitchs = FALSE +allfileTimeRange = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +restoreFromActiveFile = TRUE +restoreToEnd = FALSE +dispCompErr = TRUE +showMsgDes = TRUE +anaAutoFit = FALSE +anaAutoPattn = FALSE +anaAuto100VertFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE +denseBlockDrawing = TRUE +relativeFreqPrecision = 3 +showMarkerAbsolute = FALSE +showMarkerAdjacent = FALSE +showMarkerRelative = FALSE +showMarkerFrequency = FALSE +stickCursorMarkerOnWaveform = TRUE +keepMarkerAtEndTimeOfTransaction = FALSE +doubleClickToExpandTransaction = TRUE +expandTransactionAssociatedSignals = TRUE +expandTransactionAttributeSignals = FALSE +WaveExtendLastTick = TRUE +InOutSignal = FALSE +NetRegisterSignal = FALSE +VerilogVHDLSignal = FALSE +LabelMarker = TRUE +ResolveSymbolicLink = TRUE +signal_rc_abspath = TRUE +signal_rc_no_natural_bus_range = FALSE +save_scope_with_macro = FALSE +TipInSignalWin = FALSE +DisplayPackedSiganlInBitwiseManner = FALSE +DisplaySignalTypeAheadOfSignalName = TRUE ICON +TipInCurveWin = FALSE +MouseGesturesInCurveWin = TRUE +DisplayLSBsFirst = FALSE +PaintSpecificColorPattern = FALSE +ModuleName = TRUE +form_all_memory_signal = FALSE +formBusSignalFromPartSelects = FALSE +read_value_change_on_demand_for_drawing = FALSE +load_scopes_on_demand = on 5 +TransitionMode = TRUE +DisplayRadix = FALSE +SchemaX = FALSE +Hilight = TRUE +UseBeforeValue = FALSE +DisplayFileNameAheadOfSignalName = FALSE +DisplayFileNumberAheadOfSignalName = FALSE +DisplayValueSpace = TRUE +FitAnaByBusSize = FALSE +displayTransactionAttributeName = FALSE +expandOverlappedTrans = FALSE +dispSamplePointForAttrSig = TRUE +dispClassName = TRUE +ReloadActiveFileOnly = FALSE +NormalizeEVCD = FALSE +OverwriteAliasWithRC = TRUE +overlay_added_analog_signals = FALSE +case_insensitive = FALSE +vhdlVariableCalculate = TRUE +signal_vertical_scroll_bar = TRUE +showPortNameForDroppedInstance = FALSE +truncateFilePathInTitleBar = TRUE +filterPropVacuousSuccess = FALSE +includeLocalSignals = FALSE +encloseSignalsByGroup = TRUE +resaveSignals = TRUE +adjustBusPrefix = adjustBus_ +adjustBusBits = 1 +adjustBusSettings = 69889 +maskPowerOff = TRUE +maskIsolation = TRUE +maskRetention = TRUE +maskDrivingPowerOff = TRUE +maskToggle = TRUE +autoBackupSignals = off 5 "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog\"" "\"novas_autosave_sig\"" +signal_rc_attribute = 65535 +signal_rc_alias_attribute = 0 +ConvertAttr1 = -inc FALSE +ConvertAttr2 = -hier FALSE +ConvertAttr3 = -ucase FALSE +ConvertAttr4 = -lcase FALSE +ConvertAttr5 = -org FALSE +ConvertAttr6 = -mem 24 +ConvertAttr7 = -deli . +ConvertAttr8 = -hier_scope FALSE +ConvertAttr9 = -inst_array FALSE +ConvertAttr10 = -vhdlnaming FALSE +ConvertAttr11 = -orgScope FALSE +analogFmtPrecision = Automatic 2 +confirmOverwrite = TRUE +confirmExit = TRUE +confirmGetAll = TRUE +printTimeRange = TRUE 0.000000 0.000000 0.000000 +printPageRange = TRUE 1 1 +printOption = 0 +printBasic = 1 0 0 FALSE FALSE +printDest = -printer {} +printSignature = {%f %h %t} {} +curveWindow_Drag&Drop_Mode = TRUE +hspiceIncOpenMode = TRUE +pcSelectMode = TRUE +hierarchyDelimiter = / +RecentFile1 = "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb\"" +open_file_time_range = FALSE +value_window_aligment = Right +signal_window_alignment = Auto +ShowDeltaTime = TRUE +legend_window_font = -f COURIER12 -c ID_CYAN5 +value_window_font = -f COURIER12 -c ID_CYAN5 +curve_window_font = -f COURIER12 -c ID_CYAN5 +group_name_font = -f COURIER12 -c ID_GREEN5 +ruler_value_font = -f COURIER12 -c ID_CYAN5 +analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +comment_string_font = -f COURIER12 -c ID_RED5 +getsignal_form_font = -f COURIER12 +SigsCheckNum = on 1000 +filter_synthesized_net = off n +filterOutNet = on +filter_synthesized_instance = off +filterOutInstance = on +showGroupTree = TRUE +hierGroupDelim = / +MsgSeverityColor = {y \"Severity\"==\"1\" ID_RED5} {y \"Severity\"==\"2\" ID_RED6} {y \"Severity\"==\"3\" ID_RED7} {y \"Severity\"==\"4\" ID_RED8} {y \"Severity\"==\"5\" ID_ORANGE5} {y \"Severity\"==\"6\" ID_ORANGE6} {y \"Severity\"==\"7\" ID_ORANGE7} {y \"Severity\"==\"8\" \ +ID_GREEN7} {y \"Severity\"==\"9\" ID_GREEN6} {y \"Severity\"==\"10\" ID_GREEN5} +AutoApplySeverityColor = TRUE +AutoAdjustMsgWidthByLabel = off +verilogStrengthDispType = type1 +waveDblClkActiveTrace = on +autoConnectTBrowser = FALSE +connectTBrowserInContainer = TRUE +SEQShowComparisonIcon = TRUE +SEQAddDriverLoadInSameGroup = TRUE +autoSyncCursorMarker = FALSE +autoSyncHorizontalRange = FALSE +autoSyncVerticalScroll = FALSE +[cov_hier_name_column] +justify = TRUE +[coverageColors] +sou_uncov = TRUE +sou_pc = TRUE +sou_cov = TRUE +sou_exuncov = TRUE +sou_excov = TRUE +sou_unreach = TRUE +sou_unreachcon = TRUE +sou_fillColor_uncov = red +sou_fillColor_pc = yellow +sou_fillColor_cov = green3 +sou_fillColor_exuncov = grey +sou_fillColor_excov = #3C9371 +sou_fillColor_unreach = grey +sou_fillColor_unreachcon = orange +numberOfBins = 6 +rangeMin_0 = 0 +rangeMax_0 = 20 +fillColor_0 = #FF6464 +rangeMin_1 = 20 +rangeMax_1 = 40 +fillColor_1 = #FF9999 +rangeMin_2 = 40 +rangeMax_2 = 60 +fillColor_2 = #FF8040 +rangeMin_3 = 60 +rangeMax_3 = 80 +fillColor_3 = #FFFF99 +rangeMin_4 = 80 +rangeMax_4 = 100 +fillColor_4 = #99FF99 +rangeMin_5 = 100 +rangeMax_5 = 100 +fillColor_5 = #64FF64 +[coveragesetting] +urgAppendOptions = +group_instance_new_format_name = TRUE +showvalue = FALSE +computeGroupsScoreByRatio = FALSE +computeGroupsScoreByInst = FALSE +showConditionId = FALSE +showfullhier = FALSE +nameLeftAlignment = TRUE +showAllInfoInTooltips = FALSE +copyItemHvpName = TRUE +ignoreGroupWeight = FALSE +absTestName = FALSE +HvpMergeTool = +ShowMergeMenuItem = FALSE +fsmScoreMode = transition +[eco] +NameRule = +IsFreezeSilicon = FALSE +cellQuantityManagement = FALSE +ManageMode = INSTANCE_NAME +SpareCellsPinsManagement = TRUE +LogCommitReport = FALSE +InputPinStatus = 1 +OutputPinStatus = 2 +RevisedComponentColor = ID_BLUE5 +SpareCellColor = ID_RED5 +UserName = yzzhang +CommentFormat = Novas ECO updated by ${UserName} ${Date} ${Time} +PrefixN = eco_n +PrefixP = eco_p +PrefixI = eco_i +DefaultTieUpNet = 1'b1 +DefaultTieDownNet = 1'b0 +MultipleInstantiations = TRUE +KeepClockPinConnection = FALSE +KeepAsyncResetPinConnection = FALSE +ScriptFileModeType = 1 +MagmaScriptPower = VDD +MagmaScriptGround = GND +ShowModeMsg = TRUE +AstroScriptPower = VDD +AstroScriptGround = VSS +ClearFloatingPorts = FALSE +[eco_connection] +Port/NetIsUnique = TRUE +SerialNet = 0 +SerialPort = 0 +SerialInst = 0 +[finsim] +TPLanguage = Verilog +TPName = Super-FinSim +TPPath = TOP.sim +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[hvpsetting] +importExcelXMLOptions = +use_test_loca_as_source = FALSE +autoTurnOffHideMeetGoalInit = FALSE +autoTurnOffHideMeetGoal = TRUE +autoTurnOffModifierInit = FALSE +autoTurnOffModifier = TRUE +enableNumbering = TRUE +autoSaveCheck = TRUE +autoSaveTime = 5 +ShowMissingScore = TRUE +enableFeatureId = FALSE +enableMeasureConcealment = FALSE +enableBCCGVarNoEscapeName = FALSE +HvpCloneHierShowMsgAgain = 1 +HvpCloneHierType = tree +HvpCloneHierMetrics = Line,Cond,FSM,Toggle,Branch,Assert +autoRecalPlanAfterLoadingCovDBUserDataPlan = false +warnMeAutoRecalPlanAfterLoadingCovDBUserDataPlan = true +autoRecalExclWithPlan = false +warnMeAutoRecalExclWithPlan = true +autoRecalPlanWithExcl = false +warnMeAutoRecalPlanWithExcl = true +warnPopupWarnWhenMultiFilters = true +warnPopupWarnIfHvpReadOnly = true +unmappedObjsReportLevel = def_var_inst +unmappedObjsReportInst = true +unmappedObjsNumOfObjs = High +[ikos] +TPLanguage = VHDL +TPName = Voyager +TPPath = vsh +TPOption = -X +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[imp] +options = NULL +libPath = NULL +libDir = NULL +[nCompare] +ErrorViewport = 80 180 800 550 +EditorViewport = 409 287 676 475 +EditorHeightWidth = 802 380 +WaveCommand = "novas" +WaveArgs = "-nWave" +[nCompare.Wnd0] +ViewByHier = FALSE +[nMemory] +dispMode = ADDR_HINT +addrColWidth = 120 +valueColWidth = 100 +showCellBitRangeWithAddr = TRUE +wordsShownInOneRow = 8 +syncCursorTime = FALSE +fixCellColumnWidth = FALSE +font = Fixed 14 +[planColors] +plan_fillColor_inactive = lightGray +plan_fillColor_warning = orange +plan_fillColor_error = red +plan_fillColor_invalid = #F0DCDB +plan_fillColor_subplan = lightGray +[schematics] +viewport = 178 262 638 516 +schBackgroundColor = black lineSolid +schBodyColor = orange6 lineSolid +schAsmBodyColor = blue7 lineSolid +schPortColor = orange6 lineSolid +schCellNameColor = Gray6 lineSolid +schCLKNetColor = red6 lineSolid +schPWRNetColor = red4 lineSolid +schGNDNetColor = cyan4 lineSolid +schSIGNetColor = green8 lineSolid +schTraceColor = yellow4 lineSolid +schBackAnnotateColor = white lineSolid +schValue0 = yellow4 lineSolid +schValue1 = green3 lineSolid +schValueX = red4 lineSolid +schValueZ = purple7 lineSolid +dimColor = cyan2 lineSolid +schPreSelColor = green4 lineDash +schSIGBusNetColor = green8 lineSolid +schGNDBusNetColor = cyan4 lineSolid +schPWRBusNetColor = red4 lineSolid +schCLKBusNetColor = red6 lineSolid +schEdgeSensitiveColor = orange6 lineSolid +schAnnotColor = cyan4 lineSolid +schInstNameColor = orange6 lineSolid +schPortNameColor = cyan4 lineSolid +schAsmLatchColor = cyan4 lineSolid +schAsmRegColor = cyan4 lineSolid +schAsmTriColor = cyan4 lineSolid +pre_select = True +ShowPassThroughNet = False +ComputedAnnotColor = ID_PURPLE5 +[schematics_print] +Signature = FALSE +DesignName = PCU +DesignerName = bai +SignatureLocation = LowerRight +MultiPage = TRUE +AutoSliver = FALSE +[sourceColors] +BackgroundActive = gray88 +BackgroundInactive = lightgray +InactiveCode = dimgray +Selection = darkblue +Standard = black +Keyword = blue +Comment = gray25 +Number = black +String = black +Identifier = darkred +Inline = green +colorIdentifier = green +Value = darkgreen +MacroBackground = white +Missing = #400040 +[specColors] +top_plan_linked = #ADFFA6 +top_plan_ignore = #D3D3D3 +top_plan_todo = #EECBAD +sub_plan_ignore = #919191 +sub_plan_todo = #EFAFAF +sub_plan_linked = darkorange +[spec_link_setting] +use_spline = true +goto_section = false +exclude_ignore = true +compare_strategy = 2 +auto_apply_margin = FALSE +margin_top = 0.80 +margin_bottom = 0.80 +margin_left = 0.50 +margin_right = 0.50 +margin_unit = inches +[spiceDebug] +ThroughNet = ID_YELLOW5 +InterfaceElement = ID_GREEN5 +Run-timeInterfaceElement = ID_BLUE5 +HighlightThroughNet = TRUE +HighlightInterfaceElement = TRUE +HighlightRuntimeInterfaceElement = TRUE +HighlightSameNet = TRUE +[surefire] +TPLanguage = Verilog +TPName = SureFire +TPPath = verilog +TPOption = +AddImportArgument = TRUE +LineBreakWithScope = TRUE +StopAfterCompileOption = -tcl +[turboSchema_Printer_Options] +Orientation = Landscape +[turbo_library] +bdb_load_scope +[vdCovFilteringSearchesStrings] +keepLastUsedFiltersMaxNum = 10 +[verisity] +TPLanguage = Verilog +TPName = "Verisity SpeXsim" +TPPath = vlg +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = TRUE +StopAfterCompileOption = -s +[wave.0] +viewPort = 0 28 1920 394 100 65 +[wave.1] +viewPort = 127 219 960 332 100 65 +[wave.2] +viewPort = 38 314 686 205 100 65 +[wave.3] +viewPort = 63 63 700 400 65 41 +[wave.4] +viewPort = 84 84 700 400 65 41 +[wave.5] +viewPort = 92 105 700 400 65 41 +[wave.6] +viewPort = 0 0 700 400 65 41 +[wave.7] +viewPort = 21 21 700 400 65 41 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/novas_dump.log b/hilbert_dpi/codegen/dll/hilbert_fir/novas_dump.log index 864a3bd..d836d92 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/novas_dump.log +++ b/hilbert_dpi/codegen/dll/hilbert_fir/novas_dump.log @@ -198,7 +198,7 @@ MGC_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 IMSETTINGS_INTEGRATE_DESKTOP=yes HOME=/home/yzzhang VCS_HOME=/opt/synopsys/vcs-mx/O-2018.09-SP2 -PWD=/home/yzzhang/work/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir +PWD=/home/yzzhang/work/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir SSH_AGENT_PID=5490 CALIBRE_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 MGC_CALIBRE_REALTIME_VIRTUOSO_ENABLED=1 @@ -248,7 +248,7 @@ DBUS_STARTER_BUS_TYPE=session W3264_NO_HOST_CHECK=1 SCL_HOME=/opt/synopsys/scl/2018.06 HOSTTYPE=x86_64-linux -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/d8d8c749_3610_44ad_9871_57aae41deb51 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/de294d37_d48c_4f8c_8ddc_fd502688d834 CDS_SPECTRERF_FBENABLE=1 GNOME_TERMINAL_SERVICE=:1.160 GROUP=cryo @@ -270,8 +270,8 @@ VCS_EXEC_DONE=1 LC_ALL=C DVE=/opt/synopsys/vcs-mx/O-2018.09-SP2/gui/dve SPECMAN_OUTPUT_TO_TTY=1 -SNPS_SIMPROFILE_INTERNAL_CONF_ARGS=skipInternalSVAPackage:1,diagOn:0,trackAllAPsinSample:0,debugProfrptInXterm:0,keepOldHsimView:0,useHsimConstrForAll:0,plotSnapshot:0,plotSimTime:0,noCheckVersion:0,enableSnapshot:0,plotScriptDir:,diagMem:0,diagMemInterval:0.01,diagMemShortPrints:3,loadSmdDiagFiles:0,noMergeHeapAct:0,totalBCSize:0,noCollectHsimMem:0,noCollectAddrMap:0,noStackTrace:0,addFuncNameInSlot:0,rawView:0,exitAtMemCnt:0,diagSignalProfile:0,pidSimv:64859 -SNPS_SIMPROFILE_INTERNAL_CONF_ADDR=64859:0xcdd180 +SNPS_SIMPROFILE_INTERNAL_CONF_ARGS=skipInternalSVAPackage:1,diagOn:0,trackAllAPsinSample:0,debugProfrptInXterm:0,keepOldHsimView:0,useHsimConstrForAll:0,plotSnapshot:0,plotSimTime:0,noCheckVersion:0,enableSnapshot:0,plotScriptDir:,diagMem:0,diagMemInterval:0.01,diagMemShortPrints:3,loadSmdDiagFiles:0,noMergeHeapAct:0,totalBCSize:0,noCollectHsimMem:0,noCollectAddrMap:0,noStackTrace:0,addFuncNameInSlot:0,rawView:0,exitAtMemCnt:0,diagSignalProfile:0,pidSimv:32804 +SNPS_SIMPROFILE_INTERNAL_CONF_ADDR=32804:0xcda1f0 Runtime command line arguments: argv[0]=./simv argv[1]=+vcs+loopreport @@ -280,9 +280,9 @@ argv[3]=DPI_Component argv[4]=-l argv[5]=sim.log 281 profile - 100 - CPU/Mem usage: 0.080 sys, 0.310 user, 294.99M sys, 0.00M vm + CPU/Mem usage: 0.080 sys, 0.290 user, 299.34M sys, 0.00M vm 282 VC callback profile - scalar:0 vector:0 -283 Mon Oct 28 23:58:07 2024 +283 Thu Apr 3 13:13:33 2025 284 pliAppInit 285 Enable VD Dumper 286 FSDB_GATE is set. @@ -301,45 +301,46 @@ argv[5]=sim.log 299 *********************************************************************** 300 sps_call_fsdbDumpfile_main at 0 : ./tb.sv(12) 301 argv[0]: (TB.fsdb) -302 *Verdi* : Create FSDB file 'TB.fsdb' -303 sps_call_fsdbDumpvars_vd_main at 0 : ./tb.sv(13) -304 argv[0]: (0) -305 argv[1]: (handle) tb -306 *Verdi* : Begin traversing the scope (tb), layer (0). -307 *Verdi* : End of traversing. -308 pliAppHDL_DumpVarComplete traverse var: profile - - CPU/Mem usage: 0.090 sys, 0.320 user, 391.89M sys, 0.00M vm - incr: 0.000 sys, 0.000 user, 7.28M sys, 0.00M vm - accu: 0.000 sys, 0.000 user, 7.28M sys, 0.00M vm - accu incr: 0.000 sys, 0.000 user, 7.28M sys, 0.00M vm +302 *Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. +303 *Verdi* : Create FSDB file 'TB.fsdb' +304 sps_call_fsdbDumpvars_vd_main at 0 : ./tb.sv(13) +305 argv[0]: (0) +306 argv[1]: (handle) tb +307 *Verdi* : Begin traversing the scope (tb), layer (0). +308 *Verdi* : End of traversing. +309 pliAppHDL_DumpVarComplete traverse var: profile - + CPU/Mem usage: 0.080 sys, 0.300 user, 396.26M sys, 0.00M vm + incr: 0.000 sys, 0.000 user, 7.29M sys, 0.00M vm + accu: 0.000 sys, 0.000 user, 7.29M sys, 0.00M vm + accu incr: 0.000 sys, 0.000 user, 7.29M sys, 0.00M vm - Count usage: 8 var, 11 idcode, 5 callback - incr: 8 var, 11 idcode, 5 callback - accu: 8 var, 11 idcode, 5 callback - accu incr: 8 var, 11 idcode, 5 callback -309 VC callback profile - scalar:0 vector:0 -310 Mon Oct 28 23:58:07 2024 -311 pliAppHDL_DumpVarComplete: profile - - CPU/Mem usage: 0.090 sys, 0.320 user, 392.95M sys, 0.00M vm + Count usage: 8 var, 11 idcode, 6 callback + incr: 8 var, 11 idcode, 6 callback + accu: 8 var, 11 idcode, 6 callback + accu incr: 8 var, 11 idcode, 6 callback +310 VC callback profile - scalar:0 vector:0 +311 Thu Apr 3 13:13:33 2025 +312 pliAppHDL_DumpVarComplete: profile - + CPU/Mem usage: 0.080 sys, 0.300 user, 397.31M sys, 0.00M vm incr: 0.000 sys, 0.000 user, 1.05M sys, 0.00M vm - accu: 0.000 sys, 0.000 user, 8.33M sys, 0.00M vm + accu: 0.000 sys, 0.000 user, 8.34M sys, 0.00M vm accu incr: 0.000 sys, 0.000 user, 1.05M sys, 0.00M vm - Count usage: 8 var, 11 idcode, 5 callback + Count usage: 8 var, 11 idcode, 6 callback incr: 0 var, 0 idcode, 0 callback - accu: 8 var, 11 idcode, 5 callback + accu: 8 var, 11 idcode, 6 callback accu incr: 0 var, 0 idcode, 0 callback -312 VC callback profile - scalar:0 vector:2 -313 Mon Oct 28 23:58:07 2024 -314 End of simulation at 163930 -315 VC callback profile - scalar:0 vector:2 -316 Mon Oct 28 23:58:07 2024 -317 Begin FSDB profile info: -318 FSDB Writer : bc1(32793) bcn(32781) mtf/stf(0/0) -FSDB Writer elapsed time : flush(0.007414) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) +313 VC callback profile - scalar:1 vector:2 +314 Thu Apr 3 13:13:33 2025 +315 End of simulation at 163930 +316 VC callback profile - scalar:1 vector:2 +317 Thu Apr 3 13:13:33 2025 +318 Begin FSDB profile info: +319 FSDB Writer : bc1(32793) bcn(32781) mtf/stf(0/0) +FSDB Writer elapsed time : flush(0.005779) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) FSDB Writer cpu time : MT Compression : 0 -319 End FSDB profile info -320 Parallel profile - Flush:3 Expand:0 ProduceWait:0 ConsumerWait:0 BlockUsed:0 -321 ProduceTime:0.470358439 ConsumerTime:0.000000000 Buffer:64MB -322 SimExit -323 Sim process exit +320 End FSDB profile info +321 Parallel profile - Flush:3 Expand:0 ProduceWait:0 ConsumerWait:0 BlockUsed:0 +322 ProduceTime:0.426994519 ConsumerTime:0.000000000 Buffer:64MB +323 SimExit +324 Sim process exit diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/sim.log b/hilbert_dpi/codegen/dll/hilbert_fir/sim.log index 9ea7f54..040d9e5 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/sim.log +++ b/hilbert_dpi/codegen/dll/hilbert_fir/sim.log @@ -1,7 +1,7 @@ -Command: /home/yzzhang/work/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/./simv +vcs+loopreport -sv_lib DPI_Component -l sim.log +Command: /home/yzzhang/work/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/./simv +vcs+loopreport -sv_lib DPI_Component -l sim.log Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. -Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Oct 28 23:58 2024 +Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Apr 3 13:13 2025 UVM_INFO /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_root.svh(402) @ 0: reporter [UVM/RELNOTES] ---------------------------------------------------------------- UVM-1.2.Synopsys @@ -33,26 +33,26 @@ FSDB Dumper for VCS, Release Verdi_N-2017.12-SP2, Linux x86_64/64bit, 05/27/2018 * may cause abnormal behavior, please contact Synopsys support for * * assistance. * *********************************************************************** +*Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. *Verdi* : Create FSDB file 'TB.fsdb' *Verdi* : Begin traversing the scope (tb), layer (0). *Verdi* : End of traversing. -data_reg is: 0 1 2 3 4 5 6 7 -i_data_temp is :6 -i_data0 is :7 -i_data1 is :6 +data_reg is: 3 4 5 6 7 8 9 10 +i_data0 is :3 +i_data1 is :4 i_data2 is :5 -i_data3 is :4 -i_data4 is :3 -i_data5 is :2 -i_data6 is :1 -i_data7 is :0 -q_data0 is :-5 -q_data1 is :0 -q_data2 is :0 -q_data3 is :2 -q_data4 is :2 -q_data5 is :2 -q_data6 is :2 -q_data7 is :2 +i_data3 is :6 +i_data4 is :7 +i_data5 is :8 +i_data6 is :9 +i_data7 is :10 +q_data0 is :-6 +q_data1 is :-4 +q_data2 is :-4 +q_data3 is :-3 +q_data4 is :-3 +q_data5 is :0 +q_data6 is :0 +q_data7 is :7 V C S S i m u l a t i o n R e p o r t Time: 163930 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv b/hilbert_dpi/codegen/dll/hilbert_fir/simv index e1a50fc..3443233 100755 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv and b/hilbert_dpi/codegen/dll/hilbert_fir/simv differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/.vcs.timestamp b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/.vcs.timestamp index c36b2d9..919a6e4 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/.vcs.timestamp +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/.vcs.timestamp @@ -659,7 +659,7 @@ com.log uvm-1.2 96 -sysc_uni_pwd=/home/yzzhang/work/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir +sysc_uni_pwd=/home/yzzhang/work/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir starRC_HOME=/opt/synopsys/starrc/O-2018.06-SP1 XMODIFIERS=@im=ibus XDG_SESSION_ID=c10 @@ -728,7 +728,7 @@ HSPICE_HOME=/opt/synopsys/hspice2017/hspice/N-2017.12-SP2 HOSTTYPE=x86_64-linux GROUP=cryo GNOME_TERMINAL_SERVICE=:1.160 -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/d8d8c749_3610_44ad_9871_57aae41deb51 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/de294d37_d48c_4f8c_8ddc_fd502688d834 GNOME_SHELL_SESSION_MODE=classic GNOME_DESKTOP_SESSION_ID=this-is-deprecated GENUS_HOME=/opt/cadence/GENUS152 @@ -916,14 +916,14 @@ CADENCE_DIR=/opt/cadence/IC618 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_global_defines.svh 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/macros/uvm_version_defines.svh 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_macros.svh -1730131069 ./hilbert_fir_dpi.sv -1730131059 ./hilbert_fir_dpi_pkg.sv -1730017850 ./tb.sv +1743129319 ./hilbert_fir_dpi.sv +1743129319 ./hilbert_fir_dpi_pkg.sv +1743657054 ./tb.sv 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/verdi/uvm_custom_install_verdi_recorder.sv 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/vcs/uvm_custom_install_vcs_recorder.sv 1551426030 /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/uvm_pkg.sv -1730131038 files.f +1743129319 files.f 1527421819 /opt/synopsys/verdi/Verdi_N-2017.12-SP2/share/PLI/VCS/LINUX64/verdi.tab 1551421246 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcsdp_lite.tab 6 @@ -933,5 +933,5 @@ CADENCE_DIR=/opt/cadence/IC618 1551421792 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/liberrorinf.so 1551421768 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so 1551421789 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so -1730131081 simv.daidir +1743657065 simv.daidir -1 partitionlib diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/binmap.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/binmap.sdb index 869d4ad..34ab457 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/binmap.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/binmap.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/cgname.json b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/cgname.json index 3316bed..035aabe 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/cgname.json +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/cgname.json @@ -1,9 +1,9 @@ { - "hilbert_fir_dpi_pkg": [ - "hilbert_fir_dpi_pkg", - "RFT57", + "uvm_custom_install_verdi_recording": [ + "uvm_custom_install_verdi_recording", + "EbjT3", "module", - 10 + 8 ], "_vcs_DPI_package": [ "_vcs_DPI_package", @@ -11,29 +11,17 @@ "module", 1 ], - "vcs_paramclassrepository": [ - "vcs_paramclassrepository", - "hEeZs", + "_vcs_msglog": [ + "_vcs_msglog", + "zQBzV", "module", - 2 + 6 ], - "uvm_custom_install_recording": [ - "uvm_custom_install_recording", - "nhiwz", + "hilbert_fir_dpi_pkg": [ + "hilbert_fir_dpi_pkg", + "RFT57", "module", - 7 - ], - "_vcs_unit__3504648197": [ - "_vcs_unit__3504648197", - "eQdaR", - "module", - 3 - ], - "std": [ - "std", - "reYIK", - "module", - 4 + 10 ], "uvm_pkg": [ "uvm_pkg", @@ -41,34 +29,46 @@ "module", 5 ], - "uvm_custom_install_verdi_recording": [ - "uvm_custom_install_verdi_recording", - "EbjT3", - "module", - 8 - ], - "_vcs_msglog": [ - "_vcs_msglog", - "zQBzV", - "module", - 6 - ], "tb": [ "tb", "g7hgQ", "module", 9 ], - "hilbert_fir_dpi": [ - "hilbert_fir_dpi", - "fhaHS", + "vcs_paramclassrepository": [ + "vcs_paramclassrepository", + "hEeZs", "module", - 11 + 2 + ], + "std": [ + "std", + "reYIK", + "module", + 4 ], "...MASTER...": [ "SIM", "amcQw", "module", 12 + ], + "_vcs_unit__3504648197": [ + "_vcs_unit__3504648197", + "eQdaR", + "module", + 3 + ], + "uvm_custom_install_recording": [ + "uvm_custom_install_recording", + "nhiwz", + "module", + 7 + ], + "hilbert_fir_dpi": [ + "hilbert_fir_dpi", + "fhaHS", + "module", + 11 ] } \ No newline at end of file diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/constraint.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/constraint.sdb index bf6d968..04a4c62 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/constraint.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/constraint.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/.version b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/.version index bfdeecb..adf664d 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/.version +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/.version @@ -1,4 +1,4 @@ O-2018.09-SP2_Full64 Build Date = Feb 28 2019 22:34:30 RedHat -Compile Location: /data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir +Compile Location: /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/AllModulesSkeletons.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/AllModulesSkeletons.sdb index e75ed5d..597804c 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/AllModulesSkeletons.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/AllModulesSkeletons.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/HsimSigOptDb.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/HsimSigOptDb.sdb index b0506a8..b8e35b6 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/HsimSigOptDb.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/HsimSigOptDb.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/dve_debug.db.gz b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/dve_debug.db.gz index cd1ec04..00eb271 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/dve_debug.db.gz and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/dve_debug.db.gz differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db index c1ef5f0..65ddcce 100755 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db @@ -5,5 +5,5 @@ PYTHONPATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export PYTHONPATH LD_LIBRARY_PATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib:/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export LD_LIBRARY_PATH -/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/./idents_sbyVvx.xml.gz" "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" -\mv "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db" +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/./idents_3hnd6b.xml.gz" "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" +\mv "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db" diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/check_fsearch_db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/check_fsearch_db index 58be4b0..45025c3 100755 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/check_fsearch_db +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/check_fsearch_db @@ -1,6 +1,6 @@ #!/bin/sh -h -FILE_PATH="/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch" +FILE_PATH="/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch" lockfile="${FILE_PATH}"/lock FSearch_lock_release() { @@ -28,17 +28,17 @@ if [ "${dir_name}" = "." ]; then cd $dir_name dir_name=`/bin/pwd` fi -if [ -d "$dir_name"/../../../../../../../../../../../../.. ]; then - cd "$dir_name"/../../../../../../../../../../../../.. +if [ -d "$dir_name"/../../../../../../../../../../../../../../../.. ]; then + cd "$dir_name"/../../../../../../../../../../../../../../../.. fi -if [ -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" ]; then - if [ ! -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db" ]; then +if [ -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" ]; then + if [ ! -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.db" ]; then if [ "$#" -eq 1 ] && [ "x$1" == "x-background" ]; then trap FSearch_lock_release EXIT ( flock 193 - create_fsearch_db_ctrl "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" + create_fsearch_db_ctrl "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" exit 193 ) 193> "$lockfile" rstat=$? @@ -46,12 +46,12 @@ if [ -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilb exit $rstat fi else - "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" - if [ -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then - rm -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" + "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/.create_fsearch_db" + if [ -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then + rm -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" fi fi - elif [ -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then - rm -f "/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" + elif [ -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then + rm -f "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/fsearch.stat" fi fi diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_3hnd6b.xml.gz b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_3hnd6b.xml.gz new file mode 100644 index 0000000..a2237b3 Binary files /dev/null and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_3hnd6b.xml.gz differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz index 0c5aa86..acf55bc 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/src_files_verilog b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/src_files_verilog index c304ca7..d866145 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/src_files_verilog +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/src_files_verilog @@ -1,6 +1,6 @@ -/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/hilbert_fir_dpi.sv -/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/hilbert_fir_dpi_pkg.sv -/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/tb.sv +/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir_dpi.sv +/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir_dpi_pkg.sv +/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/tb.sv /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_barrier.svh /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_base.svh /opt/synopsys/vcs-mx/O-2018.09-SP2/etc/uvm-1.2/base/uvm_bottomup_phase.svh diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/vir.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/vir.sdb index bf0653a..612f603 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/vir.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/debug_dump/vir.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/elabmoddb.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/elabmoddb.sdb index 9d89a80..25dbb5f 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/elabmoddb.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/elabmoddb.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_callgraph.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_callgraph.sdb index 8eeacbb..05255b9 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_callgraph.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_callgraph.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_level.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_level.sdb index a12fcb8..46fa7a9 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_level.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_level.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_rtime_level.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_rtime_level.sdb index 5b900d3..d0f2fca 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_rtime_level.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/hslevel_rtime_level.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/pcc.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/pcc.sdb index b49f49c..a1c9f13 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/pcc.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/pcc.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/prof.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/prof.sdb index 201cebb..f569615 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/prof.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/prof.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/simv.kdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/simv.kdb index 6f6016d..226fef2 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/simv.kdb +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/simv.kdb @@ -1,7 +1,7 @@ rc file Version 1.0 [Design] -COMPILE_PATH=/data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir +COMPILE_PATH=/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir SystemC=FALSE UUM=FALSE KDB=FALSE diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/tt.sdb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/tt.sdb index dd83829..f792afa 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/tt.sdb and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/tt.sdb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_elab.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_elab.db index 2d96e8e..5c18ab3 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_elab.db +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_elab.db @@ -1,6 +1,6 @@ psSimBaseName simv psLogFileName com.log -pDaiDir /data/work/yzzhang/hdl/sv/readout_AWG_RM/hilbert_dpi_2/codegen/dll/hilbert_fir/simv.daidir +pDaiDir /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir destPath csrc/ fSharedMaster 0 fHsimPCSharedLibSpecified 0 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_fegate.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_fegate.db index e424f4e..880cd39 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_fegate.db and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_fegate.db differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_merge.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_merge.db index e5bb42a..9ec929b 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_merge.db and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_merge.db differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_uds.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_uds.db index 0fbe1e7..d3db9d7 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_uds.db +++ b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_hsim_uds.db @@ -2,3 +2,27 @@ vcselab_misc_midd.db 661 vcselab_misc_mnmn.db 235 vcselab_misc_hsim_name.db 841 vcselab_misc_hsim_merge.db 3916 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3916 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3848 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3848 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3848 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3848 +vcselab_misc_midd.db 661 +vcselab_misc_mnmn.db 235 +vcselab_misc_hsim_name.db 841 +vcselab_misc_hsim_merge.db 3848 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partition.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partition.db index 2696788..3755582 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partition.db and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partition.db differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partitionDbg.db b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partitionDbg.db index d911124..9a99b9e 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partitionDbg.db and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_partitionDbg.db differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_tCEYNb b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_tCEYNb new file mode 100644 index 0000000..37e7c18 Binary files /dev/null and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_tCEYNb differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_vpdnodenums b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_vpdnodenums index 9003b0f..b69141c 100644 Binary files a/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_vpdnodenums and b/hilbert_dpi/codegen/dll/hilbert_fir/simv.daidir/vcselab_misc_vpdnodenums differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/tb.sv b/hilbert_dpi/codegen/dll/hilbert_fir/tb.sv index fe3e219..99c135a 100644 --- a/hilbert_dpi/codegen/dll/hilbert_fir/tb.sv +++ b/hilbert_dpi/codegen/dll/hilbert_fir/tb.sv @@ -27,12 +27,8 @@ initial begin end always #5 clk = ~clk; -initial begin - #0; - clk_enable = 1'b1; -end - logic [21:0] cnt; +logic [21:0] cnt; always@(posedge clk or negedge reset)begin if(reset) cnt <= 22'd0; @@ -53,27 +49,26 @@ always@(posedge clk or negedge reset)begin end end -real data_reg[7:0]; +real data_reg[0:7]; always@(posedge clk or negedge reset)begin - data_reg[i] <= 64'b0+i; + data_reg[i] <= 64'b0+i+3; end hilbert_fir_dpi inst_hilbert_fir_dpi( .clk(clk), -.clk_enable(clk_enable), +.clk_enable(1'b1), .reset(reset), .data(data_reg), .i_data(i_data), .q_data(q_data) ); + initial begin #160000 $display("data_reg is:%d%d%d%d%d%d%d%d",data_reg[0],data_reg[1],data_reg[2],data_reg[3],data_reg[4],data_reg[5],data_reg[6],data_reg[7]); -$display("i_data_temp is :",inst_hilbert_fir_dpi.i_data_temp[1]); - $display("i_data0 is :",i_data[0]); $display("i_data1 is :",i_data[1]); $display("i_data2 is :",i_data[2]); diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/.diagnose.oneSearch b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/.diagnose.oneSearch new file mode 100644 index 0000000..e69de29 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/ToNetlist.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/ToNetlist.log new file mode 100644 index 0000000..e69de29 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/compiler.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/compiler.log new file mode 100644 index 0000000..892a572 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/compiler.log @@ -0,0 +1,234 @@ +*design* DebussyLib (btIdent Verdi_N-2017.12-SP2) +Command arguments: + +define+verilog + -f /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/files.f + ./tb.sv + ./hilbert_fir_dpi_pkg.sv + ./hilbert_fir_dpi.sv + + +*Error* Syntax error at ; +"./tb.sv", 3: + +*Error* Syntax error at ; +"./tb.sv", 4: + +*Error* Syntax error at ; +"./tb.sv", 5: + +*Error* Syntax error at [ +"./tb.sv", 31: + +*Error* Syntax error at [ +"./tb.sv", 43: + +*Error* reset is referenced before declaration +"./tb.sv", 19: + +*Error* reset is referenced before declaration +"./tb.sv", 21: + +*Error* clk is referenced before declaration +"./tb.sv", 26: + +*Error* clk is referenced before declaration +"./tb.sv", 28: + +*Error* clk is referenced before declaration +"./tb.sv", 28: + +*Error* clk is referenced before declaration +"./tb.sv", 32: + +*Error* reset is referenced before declaration +"./tb.sv", 32: + +*Error* reset is referenced before declaration +"./tb.sv", 33: + +*Error* clk is referenced before declaration +"./tb.sv", 44: + +*Error* reset is referenced before declaration +"./tb.sv", 44: + +*Error* reset is referenced before declaration +"./tb.sv", 45: + +*Error* clk is referenced before declaration +"./tb.sv", 53: + +*Error* reset is referenced before declaration +"./tb.sv", 53: + +*Error* illegal memory data_reg +"./tb.sv", 63: + +*Error* illegal memory i_data +"./tb.sv", 64: + +*Error* illegal memory q_data +"./tb.sv", 65: + +*Error* illegal LHS in procedural assignment +"./tb.sv", 19: + +*Error* illegal LHS in procedural assignment +"./tb.sv", 21: + +*Error* illegal LHS in procedural assignment +"./tb.sv", 26: + +*Error* illegal LHS in procedural assignment +"./tb.sv", 28: + +*Error* Syntax error at package +"./hilbert_fir_dpi_pkg.sv", 6: + +*Error* Syntax error at import +"./hilbert_fir_dpi_pkg.sv", 9: + +*Error* Syntax error at import +"./hilbert_fir_dpi_pkg.sv", 10: + +*Error* Syntax error at import +"./hilbert_fir_dpi_pkg.sv", 11: + +*Error* Syntax error at import +"./hilbert_fir_dpi_pkg.sv", 12: + +*Error* Syntax error at endpackage +"./hilbert_fir_dpi_pkg.sv", 16: + +*Error* Syntax error at import +"./hilbert_fir_dpi.sv", 7: + +*Error* Syntax error at clk +"./hilbert_fir_dpi.sv", 12: + +*Error* Syntax error at = +"./hilbert_fir_dpi.sv", 20: + +*Error* Syntax error at begin +"./hilbert_fir_dpi.sv", 29: + +*Error* Syntax error at end +"./hilbert_fir_dpi.sv", 31: + +*Error* objhandle is referenced before declaration +"./hilbert_fir_dpi.sv", 26: + +*Error* objhandle is referenced before declaration +"./hilbert_fir_dpi.sv", 26: + +*Error* illegal LHS in procedural assignment +"./hilbert_fir_dpi.sv", 26: + +*Error* illegal LHS in procedural assignment +"./hilbert_fir_dpi.sv", 35: + +*Error* illegal memory i_data_temp +"./hilbert_fir_dpi.sv", 36: + +*Error* illegal memory q_data_temp +"./hilbert_fir_dpi.sv", 37: + +*Error* illegal memory i_data_temp +"./hilbert_fir_dpi.sv", 42: + +*Error* illegal memory q_data_temp +"./hilbert_fir_dpi.sv", 43: +Highest level modules: +tb + + +*Error* failed to find identifier cnt +"./tb.sv", 34: + +*Error* failed to find identifier cnt +"./tb.sv", 36: + +*Error* failed to find identifier cnt +"./tb.sv", 36: + +*Error* failed to find identifier cnt[14] +"./tb.sv", 39: + +*Error* failed to find identifier i +"./tb.sv", 45: + +*Error* failed to find identifier i +"./tb.sv", 46: + +*Error* failed to find identifier i +"./tb.sv", 48: + +*Error* failed to find identifier i +"./tb.sv", 48: + +*Error* failed to find identifier i +"./tb.sv", 54: + +*Error* failed to find identifier i +"./tb.sv", 54: + +*Error* failed to find port 'clk' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 60: + +*Error* failed to find port 'clk_enable' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 61: + +*Error* failed to find port 'reset' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 62: + +*Error* failed to find port 'data' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 63: + +*Error* failed to find port 'i_data' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 64: + +*Error* failed to find port 'q_data' for instance 'inst_hilbert_fir_dpi' +"./tb.sv", 65: + +*Error* failed to find identifier DPI_hilbert_fir_initialize +"./hilbert_fir_dpi.sv", 26: + +*Error* failed to find identifier clk +"./hilbert_fir_dpi.sv", 33: + +*Error* failed to find identifier reset +"./hilbert_fir_dpi.sv", 33: + +*Error* failed to find identifier reset +"./hilbert_fir_dpi.sv", 34: + +*Error* failed to find identifier DPI_hilbert_fir_reset +"./hilbert_fir_dpi.sv", 35: + +*Error* failed to find identifier data +"./hilbert_fir_dpi.sv", 35: + +*Error* failed to find identifier i_data +"./hilbert_fir_dpi.sv", 36: + +*Error* failed to find identifier q_data +"./hilbert_fir_dpi.sv", 37: + +*Error* failed to find identifier clk_enable +"./hilbert_fir_dpi.sv", 40: + +*Error* failed to find identifier DPI_hilbert_fir +"./hilbert_fir_dpi.sv", 41: + +*Error* failed to find identifier data +"./hilbert_fir_dpi.sv", 41: + +*Error* failed to find identifier i_data +"./hilbert_fir_dpi.sv", 42: + +*Error* failed to find identifier q_data +"./hilbert_fir_dpi.sv", 43: + +*Error* view DPI_hilbert_fir_terminate is not defined for instance DPI_hilbert_fir_terminate +"./hilbert_fir_dpi.sv", 30: +Total 74 error(s), 0 warning(s) diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/exe.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/exe.log new file mode 100644 index 0000000..e69de29 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.log new file mode 100644 index 0000000..b45380c --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.log @@ -0,0 +1,10 @@ +Verdi (R) + +Release Verdi_N-2017.12-SP2 for (RH Linux x86_64/64bit) -- Sun May 27 04:37:01 PDT 2018 + +Copyright (c) 1999 - 2018 Synopsys, Inc. +This software and the associated documentation are proprietary to Synopsys, Inc. +This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. +All other use, reproduction, or distribution of this software is strictly prohibited. + + diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.rc b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.rc new file mode 100644 index 0000000..c6a7303 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas.rc @@ -0,0 +1,1259 @@ +@verdi rc file Version 1.0 +[Library] +work = ./work +[Annotation] +3D_Active_Annotation = FALSE +[CommandSyntax.finsim] +InvokeCommand = +FullFileName = TRUE +Separator = . +SimPromptSign = ">" +HierNameLevel = 1 +RunContinue = "continue" +Finish = "quit" +UseAbsTime = FALSE +NextTime = "run 1" +NextNTime = "run ${SimBPTime}" +NextEvent = "run 1" +Reset = +ObjPosBreak = "break posedge ${SimBPObj}" +ObjNegBreak = "break negedge ${SimBPObj}" +ObjAnyBreak = "break change ${SimBPObj}" +ObjLevelBreak = +LineBreak = "breakline ${SimBPFile} ${SimBPLine}" +AbsTimeBreak = "break abstimeaf ${SimBPTime}" +RelTimeBreak = "break reltimeaf ${SimBPTime}" +EnableBP = "breakon ${SimBPId}" +DisableBP = "breakoff ${SimBPId}" +DeleteBP = "breakclr ${SimBPId}" +DeleteAllBP = "breakclr" +SimSetScope = "cd ${SimDmpObj}" +[CommandSyntax.ikos] +InvokeCommand = "setvar debussy true;elaborate -p ${SimTop} -s ${SimArch}; run until 0;fsdbInteractive; " +FullFileName = TRUE +NeedTimeUnit = TRUE +NormalizeTimeUnit = TRUE +Separator = / +HierNameLevel = 2 +RunContinue = "run" +Finish = "exit" +NextTime = "run ${SimBPTime} ${SimTimeUnit}" +NextNTime = "run for ${SimBPTime} ${SimTimeUnit}" +NextEvent = "step 1" +Reset = "reset" +ObjPosBreak = "stop if ${SimBPObj} = \"'1'\"" +ObjNegBreak = "stop if ${SimBPObj} = \"'0'\"" +ObjAnyBreak = +ObjLevelBreak = "stop if ${SimBPObj} = ${SimBPValue}" +LineBreak = "stop at ${SimBPFile}:${SimBPLine}" +AbsTimeBreak = +RelTimeBreak = +EnableBP = "enable ${SimBPId}" +DisableBP = "disable ${SimBPId}" +DeleteBP = "delete ${SimBPId}" +DeleteAllBP = "delete *" +[CommandSyntax.verisity] +InvokeCommand = +FullFileName = FALSE +Separator = . +SimPromptSign = "> " +HierNameLevel = 1 +RunContinue = "." +Finish = "$finish;" +NextTime = "$db_steptime(1);" +NextNTime = "$db_steptime(${SimBPTime});" +NextEvent = "$db_step;" +SimSetScope = "$scope(${SimDmpObj});" +Reset = "$reset;" +ObjPosBreak = "$db_breakonposedge(${SimBPObj});" +ObjNegBreak = "$db_breakonnegedge(${SimBPObj});" +ObjAnyBreak = "$db_breakwhen(${SimBPObj});" +ObjLevelBreak = "$db_breakwhen(${SimBPObj}, ${SimBPValue});" +LineBreak = "$db_breakatline(${SimBPLine}, ${SimBPScope}, \"${SimBPFile}\");" +AbsTimeBreak = "$db_breakbeforetime(${SimBPTime});" +RelTimeBreak = "$db_breakbeforetime(${SimBPTime});" +EnableBP = "$db_enablebreak(${SimBPId});" +DisableBP = "$db_disablebreak(${SimBPId});" +DeleteBP = "$db_deletebreak(${SimBPId});" +DeleteAllBP = "$db_deletebreak;" +FSDBInit = "$novasInteractive;" +FSDBDumpvars = "$novasDumpvars(0, ${SimDmpObj});" +FSDBDumpsingle = "$novasDumpsingle(${SimDmpObj});" +FSDBDumpvarsInFile = "$novasDumpvarsToFile(\"${SimDmpFile}\");" +FSDBDumpMem = "$novasDumpMemNow(${SimDmpObj}, ${SimDmpBegin}, ${SimDmpSize});" +[CoverageDetail] +cross_filter_limit = 1000 +branch_limit_vector_display = 50 +showgrid = TRUE +reuseFirst = TRUE +justify = TRUE +scrollbar_mode = per pane +test_combo_left_truncate = TRUE +instance_combo_left_truncate = TRUE +loop_navigation = TRUE +condSubExpr = 20 +tglMda = 1000 +linecoverable = 100000 +lineuncovered = 50000 +tglcoverable = 30000 +tgluncovered = 30000 +pendingMax = 1000 +show_full_more = FALSE +[CoverageHier] +showgrid = FALSE +[CoverageWeight] +Assert = 1 +Covergroup = 1 +Line = 1 +Condition = 1 +Toggle = 1 +FSM = 1 +Branch = 1 +[DesignTree] +IfShowModule = {TRUE, FALSE} +[DisabledMessages] +version = Verdi_N-2017.12-SP2 +[Editor] +editorName = TurboEditor +[Emacs] +EmacsFont = "Clean 14" +EmacsBG = white +EmacsFG = black +[Exclusion] +enableAsDefault = TRUE +saveAsDefault = TRUE +saveManually = TRUE +illegalBehavior = FALSE +DisplayExcludedItem = FALSE +adaptiveExclusion = TRUE +favorite_exclude_annotation = "" +[FSM] +viewport = 65 336 387 479 +WndBk-FillColor = Gray3 +Background-FillColor = gray5 +prefKey_Link-FillColor = yellow4 +prefKey_Link-TextColor = black +Trap = red3 +Hilight = blue4 +Window = Gray3 +Selected = white +Trans. = green2 +State = black +Init. = black +SmartTips = TRUE +VectorFont = FALSE +StopAskBkgndColor = FALSE +ShowStateAction = FALSE +ShowTransAction = FALSE +ShowTransCond = FALSE +StateLable = NAME +StateValueRadix = ORIG +State-LineColor = ID_BLACK +State-LineWidth = 1 +State-FillColor = ID_BLUE2 +State-TextColor = ID_WHITE +Init_State-LineColor = ID_BLACK +Init_State-LineWidth = 2 +Init_State-FillColor = ID_YELLOW2 +Init_State-TextColor = ID_BLACK +Reset_State-LineColor = ID_BLACK +Reset_State-LineWidth = 2 +Reset_State-FillColor = ID_YELLOW7 +Reset_State-TextColor = ID_BLACK +Trap_State-LineColor = ID_RED2 +Trap_State-LineWidth = 2 +Trap_State-FillColor = ID_CYAN5 +Trap_State-TextColor = ID_RED2 +State_Action-LineColor = ID_BLACK +State_Action-LineWidth = 1 +State_Action-FillColor = ID_WHITE +State_Action-TextColor = ID_BLACK +Junction-LineColor = ID_BLACK +Junction-LineWidth = 1 +Junction-FillColor = ID_GREEN2 +Junction-TextColor = ID_BLACK +Connection-LineColor = ID_BLACK +Connection-LineWidth = 1 +Connection-FillColor = ID_GRAY5 +Connection-TextColor = ID_BLACK +prefKey_Port-LineColor = ID_BLACK +prefKey_Port-LineWidth = 1 +prefKey_Port-FillColor = ID_ORANGE6 +prefKey_Port-TextColor = ID_YELLOW2 +Transition-LineColor = ID_BLACK +Transition-LineWidth = 1 +Transition-FillColor = ID_WHITE +Transition-TextColor = ID_BLACK +Trans_Condition-LineColor = ID_BLACK +Trans_Condition-LineWidth = 1 +Trans_Condition-FillColor = ID_WHITE +Trans_Condition-TextColor = ID_ORANGE2 +Trans_Action-LineColor = ID_BLACK +Trans_Action-LineWidth = 1 +Trans_Action-FillColor = ID_WHITE +Trans_Action-TextColor = ID_GREEN2 +SelectedSet-LineColor = ID_RED2 +SelectedSet-LineWidth = 1 +SelectedSet-FillColor = ID_RED2 +SelectedSet-TextColor = ID_WHITE +StickSet-LineColor = ID_ORANGE5 +StickSet-LineWidth = 1 +StickSet-FillColor = ID_PURPLE6 +StickSet-TextColor = ID_BLACK +HilightSet-LineColor = ID_RED5 +HilightSet-LineWidth = 1 +HilightSet-FillColor = ID_RED7 +HilightSet-TextColor = ID_BLUE5 +ControlPoint-LineColor = ID_BLACK +ControlPoint-LineWidth = 1 +ControlPoint-FillColor = ID_WHITE +Bundle-LineColor = ID_BLACK +Bundle-LineWidth = 1 +Bundle-FillColor = ID_WHITE +Bundle-TextColor = ID_BLUE4 +QtBackground-FillColor = ID_GRAY6 +prefKey_Link-LineColor = ID_ORANGE2 +prefKey_Link-LineWidth = 1 +Selection-LineColor = ID_BLUE2 +Selection-LineWidth = 1 +[FSM_Dlg-Print] +Orientation = Landscape +[FileBrowser] +nWaveOpenFsdbDirHistory = "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb\"" +[Form] +version = Verdi_N-2017.12-SP2 +wave/unknownSave.fm = 100,100,520,275 +[General] +autoSaveSession = FALSE +TclAutoSource = +cmd_enter_form = FALSE +SyncBrowserDir = TRUE +version = Verdi_N-2017.12-SP2 +SignalCaseInSensitive = FALSE +ShowWndCtntDuringResizing = FALSE +[GlobalProp] +ErrWindow_Font = Helvetica_M_R_12 +[Globals] +app_default_font = Bitstream Vera Sans,10,-1,5,50,0,0,0,0,0 +app_fixed_width_font = Courier,10,-1,5,50,0,0,0,0,0 +text_encoding = Unicode(utf8) +smart_resize = TRUE +smart_resize_child_limit = 2000 +tooltip_max_width = 200 +tooltip_max_height = 20 +tooltip_viewer_key = F3 +tooltip_display_time = 1000 +bookmark_name_length_limit = 12 +disable_tooltip = FALSE +auto_load_source = TRUE +max_array_size = 4096 +filter_when_typing = TRUE +filter_keep_children = TRUE +filter_syntax = Wildcards +filter_keystroke_interval = 800 +filter_case_sensitive = FALSE +filter_full_path = FALSE +load_detail_for_funcov = FALSE +sort_limit = 100000 +ignoreDBVersionChecking = FALSE +[HB] +ViewSchematic = FALSE +windowLayout = 0 0 804 500 182 214 804 148 +import_filter = *.v; *.vc; *.f +designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +import_filter_vhdl = *.vhd; *.vhdl; *.f +import_filter_verilog = *.v; *.vc; *.f +simulation_file_type = *.fsdb;*.fsdb.gz;*.fsdb.bz2;*.ff;*.dump +PrefetchViewableAnnot = TRUE +import_default_language = Verilog +import_from = source +[Hier] +filterTimeout = 1500 +[ImportLiberty] +SearchPriority = .lib++ +bSkipStateCell = False +bImportPowerInfo = False +bSkipFFCell = False +bScpecifyCellNameCase = False +bSpecifyPinNameCase = False +CellNameToCase = +PinNameToCase = +[Language] +EditWindow_Font = COURIER12 +Background = ID_WHITE +Comment = ID_GRAY4 +Keyword = ID_BLUE5 +UserKeyword = ID_GREEN2 +Text = ID_BLACK +SelText = ID_WHITE +SelBackground = ID_BLUE2 +[Library.Ikos] +pack = ./work.lib++ +vital = ./work.lib++ +work = ./work.lib++ +std = ${dls_std}.lib++ +ieee = ${dls_ieee}.lib++ +synopsys = ${dls_synopsys}.lib++ +silc = ${dls_silc}.lib++ +ikos = ${dls_ikos}.lib++ +novas = ${VOYAGER_LIB_VHDL}/${VOYAGER_MACHINE}/novas.lib++ +[MDT] +ART_RF_SP = spr[0-9]*bx[0-9]* +ART_RF_2P = dpr[0-9]*bx[0-9]* +ART_SRAM_SP = spm[0-9]*bx[0-9]* +ART_SRAM_DP = dpm[0-9]*bx[0-9]* +VIR_SRAM_SP = hdsd1_[0-9]*x[0-9]*cm4sw1 +VIR_SRAM_DP = hdsd2_[0-9]*x[0-9]*cm4sw1 +VIR_RF_SP = rfsd1_[0-9]*x[0-9]*cm2sw0 +VIR_RF_DP = rfsd2_[0-9]*x[0-9]*cm2sw1 +VIR_STAR_SRAM_SP = shsd1_[0-9]*x[0-9]*cm4sw0 +[NPExpanding] +functiongroups = FALSE +modules = FALSE +[NPFilter] +showAssertion = TRUE +showCoverGroup = TRUE +showProperty = TRUE +showSequence = TRUE +showDollarUnit = TRUE +[OtherEditor] +cmd1 = "xterm -font 9x15 -fg black -bg gray -e" +name = "vi" +options = "+${CurLine} ${CurFullFileName}" +[Power] +PowerDownInstance = ID_GRAY1 +RetentionSignal = ID_YELLOW2 +IsolationSignal = ID_RED6 +LevelShiftedSignal = ID_GREEN6 +PowerSwitchObject = ID_ORANGE5 +AlwaysOnObject = ID_GREEN5 +PowerNet = ID_RED2 +GroundNet = ID_RED2 +SimulationOnly = ID_CYAN3 +SRSN/SPA = ID_CYAN3 +CNSSignal = ID_CYAN3 +AcknowledgeSignal = ID_CYAN3 +BoundaryPort = ID_CYAN3 +DisplayInstrumentedCell = TRUE +ShowCmdByFile = FALSE +ShowPstAnnot = FALSE +ShowIsoSymbol = TRUE +ExtractIsoSameNets = FALSE +AnnotateSignal = TRUE +HighlightPowerObject = TRUE +HighlightPowerDomain = TRUE +BrightenPowerColorInSchematicWindow = FALSE +ShowAlias = FALSE +ShowVoltage = TRUE +MatchTreeNodesCaseInsensitive = FALSE +SearchHBNodeDynamically = FALSE +ContinueTracingSupplyOrLogicNet = FALSE +[Print] +PrinterName = lp +FileName = test.ps +PaperSize = A4 - 210x297 (mm) +ColorPrint = FALSE +[PropertyTools] +saveFsdbStat = TRUE +savePropStat = FALSE +savePropDtl = TRUE +[QtDialog] +openFileDlg = 658,311,602,483 +QwWarnMsgDlg = 650,740,600,250 +importDesignForm = 642,247,634,611 +QwUserAskDlg = 798,487,324,134 +[Relationship] +hideRecursiceNode = FALSE +[Session Cache] +2 = string (session file name) +3 = string (session file name) +4 = string (session file name) +5 = string (session file name) +1 = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses +[Simulation] +scsPath = scsim +scsOption = +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +osciPath = gdb +osciOption = +vcsPath = simv +vcsOption = +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +speedsimPath = +speedsimOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +interactiveDebugging = {True, False} +KeepBreakPoints = False +ScsDebugAll = False +simType = {vcssv, xl, nc, vcs, mti, mti_vlog, vhnc, scs, mixnc} +thirdpartyIdx = -1 +iscCmdSep = FALSE +NoAppendOption = False +[SimulationPlus] +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +vcsPath = simv +vcsOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +speedsimPath = verilog +speedsimOption = +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +scsPath = scsim +scsOption = +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +vcs_svPath = simv +vcs_svOption = +simType = vcssv +thirdpartyIdx = -1 +interactiveDebugging = FALSE +KeepBreakPoints = FALSE +iscCmdSep = FALSE +ScsDebugAll = FALSE +NoAppendOption = FALSE +invokeSimPath = work +[SimulationPlus2] +eventDumpUnfinish = FALSE +[Source] +wordWrapOn = TRUE +viewReuse = TRUE +lineNumberOn = TRUE +warnOutdatedDlg = TRUE +showEncrypt = FALSE +loadInclude = FALSE +showColorForActive = FALSE +tabWidth = 8 +editor = vi +reload = Never +sync_active_to_source = TRUE +navigateAsColored = FALSE +navigateCovered = FALSE +navigateUncovered = TRUE +navigateExcluded = FALSE +not_ask_for_source_path = FALSE +expandMacroOn = TRUE +[SourceVHDL] +vhSimType = ModelSim +ohSimType = VerilogXL +[TclShell] +nLineSize = 1024 +[Test] +verbose_progress = FALSE +[TestBenchBrowser] +-showUVMDynamicHierTreeWin = FALSE +[Text] +hdlTypeName = blue4 +hdlLibrary = blue4 +viewport = 396 392 445 487 +hdlOther = ID_BLACK +hdlComment = ID_GRAY1 +hdlKeyword = ID_BLUE5 +hdlEntity = ID_BLACK +hdlEntityInst = ID_BLACK +hdlSignal = ID_RED2 +hdlInSignal = ID_RED2 +hdlOutSignal = ID_RED2 +hdlInOutSignal = ID_RED2 +hdlOperator = ID_BLACK +hdlMinus = ID_BLACK +hdlSymbol = ID_BLACK +hdlString = ID_BLACK +hdlNumberBase = ID_BLACK +hdlNumber = ID_BLACK +hdlLiteral = ID_BLACK +hdlIdentifier = ID_BLACK +hdlSystemTask = ID_BLACK +hdlParameter = ID_BLACK +hdlIncFile = ID_BLACK +hdlDataFile = ID_BLACK +hdlCDSkipIf = ID_GRAY1 +hdlMacro = ID_BLACK +hdlMacroValue = ID_BLACK +hdlPlainText = ID_BLACK +hdlOvaId = ID_PURPLE2 +hdlPslId = ID_PURPLE2 +HvlEId = ID_BLACK +HvlVERAId = ID_BLACK +hdlEscSignal = ID_BLACK +hdlEscInSignal = ID_BLACK +hdlEscOutSignal = ID_BLACK +hdlEscInOutSignal = ID_BLACK +textBackgroundColor = ID_GRAY6 +textHiliteBK = ID_BLUE5 +textHiliteText = ID_WHITE +textTracedMark = ID_GREEN2 +textLineNo = ID_BLACK +textFoldedLineNo = ID_RED5 +textUserKeyword = ID_GREEN2 +textParaAnnotText = ID_BLACK +textFuncAnnotText = ID_BLUE2 +textAnnotText = ID_BLACK +textUserDefAnnotText = ID_BLACK +ComputedSignal = ID_PURPLE5 +textAnnotTextShadow = ID_WHITE +parenthesisBGColor = ID_YELLOW5 +codeInParenthesis = ID_CYAN5 +text3DLight = ID_WHITE +text3DShadow = ID_BLACK +textHvlDriver = ID_GREEN3 +textHvlLoad = ID_YELLOW3 +textHvlDriverLoad = ID_BLUE3 +irOutline = ID_RED2 +irDriver = ID_YELLOW5 +irLoad = ID_BLACK +irBookMark = ID_YELLOW2 +irIndicator = ID_WHITE +irBreakpoint = ID_GREEN5 +irCurLine = ID_BLUE5 +hdlVhEntity = ID_BLACK +hdlArchitecture = ID_BLACK +hdlPackage = ID_BLUE5 +hdlRefPackage = ID_BLUE5 +hdlAlias = ID_BLACK +hdlGeneric = ID_BLUE5 +specialAnnotShadow = ID_BLUE1 +hdlZeroInHead = ID_GREEN2 +hdlZeroInComment = ID_GREEN2 +hdlPslHead = ID_BLACK +hdlPslComment = ID_BLACK +hdlSynopsysHead = ID_GREEN2 +hdlSynopsysComment = ID_GREEN2 +pdmlIdentifier = ID_BLACK +pdmlCommand = ID_BLACK +pdmlMacro = ID_BLACK +font = COURIER12 +annotFont = Helvetica_M_R_10 +[Text.1] +viewport = -1 27 1920 977 45 +[TextPrinter] +Orientation = Landscape +Indicator = FALSE +LineNum = TRUE +FontSize = 7 +Column = 2 +Annotation = TRUE +[Texteditor] +TexteditorFont = "Clean 14" +TexteditorBG = white +TexteditorFG = black +[ThirdParty] +ThirdPartySimTool = verisity surefire ikos finsim +[TurboEditor] +autoBackup = TRUE +[UserButton.mixnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +Button8 = "FSDB Ver" "call fsdbVersion" +Button9 = "Dump On" "call fsdbDumpon" +Button10 = "Dump Off" "call fsdbDumpoff" +Button11 = "All Tasks" "call" +Button12 = "Dump Selected Instance" "call fsdbDumpvars 1 ${SelInst}" +[UserButton.mti] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.mti_vlog] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.nc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.scs] +Button1 = "Dump All Signals" "call fsdbDumpvars(0, \"${TopScope}\");\n" +Button2 = "Next 1000 Time" "run 1000 \n" +Button3 = "Next ? Time" "run ${Arg:Next Time} \n" +Button4 = "Run Step" "step\n" +Button5 = "Show Variables" "ls -v {${SelVars}}\n" +[UserButton.vhnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.xl] +Button13 = "Dump Off" "$fsdbDumpoff;\n" +Button12 = "Dump On" "$fsdbDumpon;\n" +Button11 = "Delete Focus" "$db_deletefocus(${treeSelScope});\n" +Button10 = "Set Focus" "$db_setfocus(${treeSelScope});\n" +Button9 = "Deposit Variable" "$deposit(${SelVar},${Arg:New Value});\n" +Button8 = "Release Variable" "release ${SelVar};\n" +Button7 = "Force Variable" "force ${SelVar} = ${Arg:New Value};\n" +Button6 = "Show Variables" "$showvars(${SelVars});\n" +Button5 = "Next ? Event" "$db_step(${Arg:Next Event});\n" +Button4 = "Next Event" "$db_step(1);\n" +Button3 = "Next ? Time" "#${Arg:Next Time} $stop;.\n" +Button2 = "Next 1000 Time" "#1000 $stop;.\n" +Button1 = "Dump All Signals" "$fsdbDumpvars;\n" +[VIA] +viaLogViewerDefaultRuleOneSearchForm = "share/VIA/Apps/PredefinedRules/Misc/Onesearch_rule.rc" +[VIA.oneSearch.preference] +DefaultDisplayTimeUnit = "1.000000ns" +DefaultLogTimeUnit = "1.000000ns" +[VIA.oneSearch.preference.vgifColumnSettingRC] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0] +parRuleSets = "" +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column0] +name = Message +width = 2000 +visualIndex = 4 +isHidden = FALSE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] +name = Time +width = 60 +visualIndex = 0 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] +name = Code +width = 60 +visualIndex = 2 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +name = Type +width = 60 +visualIndex = 3 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +name = Severity +width = 60 +visualIndex = 1 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[Vi] +ViFont = "Clean 14" +ViBG = white +ViFG = black +[Wave] +ovaEventSuccessColor = -c ID_CYAN5 +ovaEventFailureColor = -c ID_RED5 +ovaBooleanSuccessColor = -c ID_CYAN5 +ovaBooleanFailureColor = -c ID_RED5 +ovaAssertSuccessColor = -c ID_GREEN5 +ovaAssertFailureColor = -c ID_RED5 +ovaForbidSuccessColor = -c ID_GREEN5 +SigGroupRuleFile = +DisplayFileName = FALSE +waveform_vertical_scroll_bar = TRUE +scope_to_save_with_macro +open_file_dir +open_rc_file_dir +getSignalForm = 0 0 800 479 100 30 100 30 +viewPort = 0 28 1920 392 100 65 +signalSpacing = 5 +digitalSignalHeight = 15 +analogSignalHeight = 98 +commentSignalHeight = 98 +transactionSignalHeight = 98 +messageSignalHeight = 98 +minCompErrWidth = 4 +DragZoomTolerance = 4 +maxTransExpandedLayer = 10 +WaveMaxPoint = 512 +legendBackground = -c ID_BLACK +valueBackground = -c ID_BLACK +curveBackground = -c ID_BLACK +getSignalSignalList_BackgroundColor = -c ID_GRAY6 +glitchColor = -c ID_RED5 +cursor = -c ID_YELLOW5 -lw 1 -ls long_dashed +marker = -c ID_WHITE -lw 1 -ls dash_dot_l +usermarker = -c ID_GREEN5 -lw 1 -ls long_dashed +trace = -c ID_GRAY5 -lw 1 -ls long_dashed +grid = -c ID_WHITE -lw 1 -ls short_dashed +rulerBackground = -c ID_GRAY3 +rulerForeground = -c ID_YELLOW5 +busTextColor = -c ID_ORANGE8 +region(Active)Background = -c ID_YELLOW1 +region(NBA)Background = -c ID_RED1 +region(Re-Active)Background = -c ID_YELLOW3 +region(Re-NBA)Background = -c ID_RED3 +region(VHDL-Delta)Background = -c ID_ORANGE3 +region(Dump-Off)Background = -c ID_GRAY4 +High_Light = -c ID_GRAY2 +Input_Signal = -c ID_RED5 +Output_Signal = -c ID_GREEN5 +InOut_Signal = -c ID_BLUE5 +Net_Signal = -c ID_YELLOW5 +Register_Signal = -c ID_PURPLE5 +Verilog_Signal = -c ID_CYAN5 +VHDL_Signal = -c ID_ORANGE5 +SystemC_Signal = -c ID_BLUE7 +Dump_Off_Color = -c ID_BLUE2 +Compress_Bar_Color = -c ID_YELLOW4 +Vector_Dense_Block_Color = -c ID_ORANGE8 +Scalar_Dense_Block_Color = -c ID_GREEN6 +Composite_Dense_Block_Color = -c ID_ORANGE5 +DB_Power_Off_Layer = -c ID_BLUE4 -stipple dots +SPA_Driver_Power_Off_Layer = -c ID_ORANGE4 -stipple dots +SPA_Receiver_Power_Off_Layer = -c ID_GREEN5 -stipple dots +SRSN_Power_Off_Layer = -c ID_GREEN4 -stipple dots +Isolation_Power_Off_Layer = -c ID_RED4 -stipple dots +PD_Power_Off_Layer = -c ID_GRAY4 -stipple dots +Isolation_Layer = -c ID_RED4 -stipple vLine +Retention_Level_Trigger_Layer = -c ID_ORANGE1 -stipple fill_solid +Retention_Edge_Trigger_Layer = -c ID_YELLOW6 -stipple fill_solid +Driving_Power_Off_Layer = -c ID_YELLOW2 -stipple x +Toggle_Layer = -c ID_YELLOW4 -stipple slash +analogRealStyle = pwl +analogVoltageStyle = pwl +analogCurrentStyle = pwl +analogOthersStyle = pwl +busSignalLayer = -c ID_ORANGE8 +busXLayer = -c ID_RED5 +busZLayer = -c ID_ORANGE6 +busMixedLayer = -c ID_GREEN5 +busNotComputedLayer = -c ID_GRAY1 +busNoValueLayer = -c ID_BLUE2 +signalGridLayer = -c ID_WHITE +analogGridLayer = -c ID_GRAY6 +analogRulerLayer = -c ID_GRAY6 +keywordLayer = -c ID_RED5 +loadedLayer = -c ID_BLUE5 +loadingLayer = -c ID_BLACK +qdsCurMarkerLayer = -c ID_BLUE5 +qdsBrkMarkerLayer = -c ID_GREEN5 +qdsTrgMarkerLayer = -c ID_RED5 +arrowDefaultColor = -c ID_ORANGE6 +startNodeArrowColor = -c ID_WHITE +endNodeArrowColor = -c ID_YELLOW5 +propertyEventMatchColor = -c ID_GREEN5 +propertyEventNoMatchColor = -c ID_RED5 +propertyVacuousSuccessMatchColor = -c ID_YELLOW2 +propertyStatusBoundaryColor = -c ID_WHITE +propertyBooleanSuccessColor = -c ID_CYAN5 +propertyBooleanFailureColor = -c ID_RED5 +propertyAssertSuccessColor = -c ID_GREEN5 +propertyAssertFailureColor = -c ID_RED5 +propertyForbidSuccessColor = -c ID_GREEN5 +transactionForegroundColor = -c ID_YELLOW8 +transactionBackgroundColor = -c ID_BLACK +transactionHighLightColor = -c ID_CYAN6 +transactionRelationshipColor = -c ID_PURPLE6 +transactionErrorTypeColor = -c ID_RED5 +coverageFullyCoveredColor = -c ID_GREEN5 +coverageNoCoverageColor = -c ID_RED5 +coveragePartialCoverageColor = -c ID_YELLOW5 +coverageReferenceLineColor = -c ID_GRAY4 +messageForegroundColor = -c ID_YELLOW4 +messageBackgroundColor = -c ID_PURPLE1 +messageHighLightColor = -c ID_CYAN6 +messageInformationColor = -c ID_RED5 +ComputedAnnotColor = -c ID_PURPLE5 +fsvSecurityDataColor = -c ID_PURPLE3 +qdsAutoBusGroup = TRUE +qdsTimeStampMode = FALSE +qdsVbfBusOrderAscending = FALSE +openDumpFilter = *.fsdb;*.vf;*.jf +DumpFileFilter = *.vcd +RestoreSignalFilter = *.rc +SaveSignalFilter = *.rc +AddAliasFilter = *.alias;*.adb +CompareSignalFilter = *.err +ConvertFFFilter = *.vcd;*.out;*.tr0;*.xp;*.raw;*.wfm +Scroll_Ratio = 100 +Zoom_Ratio = 10 +EventSequence_SyncCursorTime = TRUE +EventSequence_Sorting = FALSE +EventSequence_RemoveGrid = FALSE +EventSequence_IsGridMode = FALSE +SetDefaultRadix = TRUE +DefaultRadix = Hex +SigSearchSignalMatchCase = FALSE +SigSearchSignalScopeOption = FALSE +SigSearchSignalSamenetInterface = FALSE +SigSearchSignalFullScope = FALSE +SigSearchSignalWithRegExp = FALSE +SigSearchDynamically = FALSE +SigDisplayBySelectionOrder = FALSE +SigDisplayRowMajor = FALSE +SigDragSelFollowColumn = FALSE +SigDisplayHierarchyBox = TRUE +SigDisplaySubscopeBox = TRUE +SigDisplayEmptyScope = TRUE +SigDisplaySignalNavigationBox = FALSE +SigDisplayFormBus = TRUE +SigShowSubProgram = TRUE +SigSearchScopeDynamically = TRUE +SigCollapseSubtreeNodes = FALSE +activeFileApplyToAnnotation = FALSE +GrpSelMode = TRUE +dispGridCount = FALSE +hierarchyName = FALSE +partial_level_name = FALSE +partial_level_head = 1 +partial_level_tail = 1 +displayMessageLabelOnly = TRUE +autoInsertDumpoffs = TRUE +displayMessageCallStack = FALSE +displayCallStackWithFullSections = TRUE +displayCallStackWithLastSection = FALSE +limitMessageMaxWidth = FALSE +messageMaxWidth = 50 +displayTransBySpecificColor = FALSE +fittedTransHeight = FALSE +snap = TRUE +gravitySnap = FALSE +displayLeadingZero = FALSE +displayGlitchs = FALSE +allfileTimeRange = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +restoreFromActiveFile = TRUE +restoreToEnd = FALSE +dispCompErr = TRUE +showMsgDes = TRUE +anaAutoFit = FALSE +anaAutoPattn = FALSE +anaAuto100VertFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE +denseBlockDrawing = TRUE +relativeFreqPrecision = 3 +showMarkerAbsolute = FALSE +showMarkerAdjacent = FALSE +showMarkerRelative = FALSE +showMarkerFrequency = FALSE +stickCursorMarkerOnWaveform = TRUE +keepMarkerAtEndTimeOfTransaction = FALSE +doubleClickToExpandTransaction = TRUE +expandTransactionAssociatedSignals = TRUE +expandTransactionAttributeSignals = FALSE +WaveExtendLastTick = TRUE +InOutSignal = FALSE +NetRegisterSignal = FALSE +VerilogVHDLSignal = FALSE +LabelMarker = TRUE +ResolveSymbolicLink = TRUE +signal_rc_abspath = TRUE +signal_rc_no_natural_bus_range = FALSE +save_scope_with_macro = FALSE +TipInSignalWin = FALSE +DisplayPackedSiganlInBitwiseManner = FALSE +DisplaySignalTypeAheadOfSignalName = TRUE ICON +TipInCurveWin = FALSE +MouseGesturesInCurveWin = TRUE +DisplayLSBsFirst = FALSE +PaintSpecificColorPattern = FALSE +ModuleName = TRUE +form_all_memory_signal = FALSE +formBusSignalFromPartSelects = FALSE +read_value_change_on_demand_for_drawing = FALSE +load_scopes_on_demand = on 5 +TransitionMode = TRUE +DisplayRadix = FALSE +SchemaX = FALSE +Hilight = TRUE +UseBeforeValue = FALSE +DisplayFileNameAheadOfSignalName = FALSE +DisplayFileNumberAheadOfSignalName = FALSE +DisplayValueSpace = TRUE +FitAnaByBusSize = FALSE +displayTransactionAttributeName = FALSE +expandOverlappedTrans = FALSE +dispSamplePointForAttrSig = TRUE +dispClassName = TRUE +ReloadActiveFileOnly = FALSE +NormalizeEVCD = FALSE +OverwriteAliasWithRC = TRUE +overlay_added_analog_signals = FALSE +case_insensitive = FALSE +vhdlVariableCalculate = TRUE +signal_vertical_scroll_bar = TRUE +showPortNameForDroppedInstance = FALSE +truncateFilePathInTitleBar = TRUE +filterPropVacuousSuccess = FALSE +includeLocalSignals = FALSE +encloseSignalsByGroup = TRUE +resaveSignals = TRUE +adjustBusPrefix = adjustBus_ +adjustBusBits = 1 +adjustBusSettings = 69889 +maskPowerOff = TRUE +maskIsolation = TRUE +maskRetention = TRUE +maskDrivingPowerOff = TRUE +maskToggle = TRUE +autoBackupSignals = off 5 "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog\"" "\"novas_autosave_sig\"" +signal_rc_attribute = 65535 +signal_rc_alias_attribute = 0 +ConvertAttr1 = -inc FALSE +ConvertAttr2 = -hier FALSE +ConvertAttr3 = -ucase FALSE +ConvertAttr4 = -lcase FALSE +ConvertAttr5 = -org FALSE +ConvertAttr6 = -mem 24 +ConvertAttr7 = -deli . +ConvertAttr8 = -hier_scope FALSE +ConvertAttr9 = -inst_array FALSE +ConvertAttr10 = -vhdlnaming FALSE +ConvertAttr11 = -orgScope FALSE +analogFmtPrecision = Automatic 2 +confirmOverwrite = TRUE +confirmExit = TRUE +confirmGetAll = TRUE +printTimeRange = TRUE 0.000000 0.000000 0.000000 +printPageRange = TRUE 1 1 +printOption = 0 +printBasic = 1 0 0 FALSE FALSE +printDest = -printer {} +printSignature = {%f %h %t} {} +curveWindow_Drag&Drop_Mode = TRUE +hspiceIncOpenMode = TRUE +pcSelectMode = TRUE +hierarchyDelimiter = / +RecentFile1 = "\"/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb\"" +open_file_time_range = FALSE +value_window_aligment = Right +signal_window_alignment = Auto +ShowDeltaTime = TRUE +legend_window_font = -f COURIER12 -c ID_CYAN5 +value_window_font = -f COURIER12 -c ID_CYAN5 +curve_window_font = -f COURIER12 -c ID_CYAN5 +group_name_font = -f COURIER12 -c ID_GREEN5 +ruler_value_font = -f COURIER12 -c ID_CYAN5 +analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +comment_string_font = -f COURIER12 -c ID_RED5 +getsignal_form_font = -f COURIER12 +SigsCheckNum = on 1000 +filter_synthesized_net = off n +filterOutNet = on +filter_synthesized_instance = off +filterOutInstance = on +showGroupTree = TRUE +hierGroupDelim = / +MsgSeverityColor = {y \"Severity\"==\"1\" ID_RED5} {y \"Severity\"==\"2\" ID_RED6} {y \"Severity\"==\"3\" ID_RED7} {y \"Severity\"==\"4\" ID_RED8} {y \"Severity\"==\"5\" ID_ORANGE5} {y \"Severity\"==\"6\" ID_ORANGE6} {y \"Severity\"==\"7\" ID_ORANGE7} {y \"Severity\"==\"8\" \ +ID_GREEN7} {y \"Severity\"==\"9\" ID_GREEN6} {y \"Severity\"==\"10\" ID_GREEN5} +AutoApplySeverityColor = TRUE +AutoAdjustMsgWidthByLabel = off +verilogStrengthDispType = type1 +waveDblClkActiveTrace = on +autoConnectTBrowser = FALSE +connectTBrowserInContainer = TRUE +SEQShowComparisonIcon = TRUE +SEQAddDriverLoadInSameGroup = TRUE +autoSyncCursorMarker = FALSE +autoSyncHorizontalRange = FALSE +autoSyncVerticalScroll = FALSE +[cov_hier_name_column] +justify = TRUE +[coverageColors] +sou_uncov = TRUE +sou_pc = TRUE +sou_cov = TRUE +sou_exuncov = TRUE +sou_excov = TRUE +sou_unreach = TRUE +sou_unreachcon = TRUE +sou_fillColor_uncov = red +sou_fillColor_pc = yellow +sou_fillColor_cov = green3 +sou_fillColor_exuncov = grey +sou_fillColor_excov = #3C9371 +sou_fillColor_unreach = grey +sou_fillColor_unreachcon = orange +numberOfBins = 6 +rangeMin_0 = 0 +rangeMax_0 = 20 +fillColor_0 = #FF6464 +rangeMin_1 = 20 +rangeMax_1 = 40 +fillColor_1 = #FF9999 +rangeMin_2 = 40 +rangeMax_2 = 60 +fillColor_2 = #FF8040 +rangeMin_3 = 60 +rangeMax_3 = 80 +fillColor_3 = #FFFF99 +rangeMin_4 = 80 +rangeMax_4 = 100 +fillColor_4 = #99FF99 +rangeMin_5 = 100 +rangeMax_5 = 100 +fillColor_5 = #64FF64 +[coveragesetting] +urgAppendOptions = +group_instance_new_format_name = TRUE +showvalue = FALSE +computeGroupsScoreByRatio = FALSE +computeGroupsScoreByInst = FALSE +showConditionId = FALSE +showfullhier = FALSE +nameLeftAlignment = TRUE +showAllInfoInTooltips = FALSE +copyItemHvpName = TRUE +ignoreGroupWeight = FALSE +absTestName = FALSE +HvpMergeTool = +ShowMergeMenuItem = FALSE +fsmScoreMode = transition +[eco] +NameRule = +IsFreezeSilicon = FALSE +cellQuantityManagement = FALSE +ManageMode = INSTANCE_NAME +SpareCellsPinsManagement = TRUE +LogCommitReport = FALSE +InputPinStatus = 1 +OutputPinStatus = 2 +RevisedComponentColor = ID_BLUE5 +SpareCellColor = ID_RED5 +UserName = yzzhang +CommentFormat = Novas ECO updated by ${UserName} ${Date} ${Time} +PrefixN = eco_n +PrefixP = eco_p +PrefixI = eco_i +DefaultTieUpNet = 1'b1 +DefaultTieDownNet = 1'b0 +MultipleInstantiations = TRUE +KeepClockPinConnection = FALSE +KeepAsyncResetPinConnection = FALSE +ScriptFileModeType = 1 +MagmaScriptPower = VDD +MagmaScriptGround = GND +ShowModeMsg = TRUE +AstroScriptPower = VDD +AstroScriptGround = VSS +ClearFloatingPorts = FALSE +[eco_connection] +Port/NetIsUnique = TRUE +SerialNet = 0 +SerialPort = 0 +SerialInst = 0 +[finsim] +TPLanguage = Verilog +TPName = Super-FinSim +TPPath = TOP.sim +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[hvpsetting] +importExcelXMLOptions = +use_test_loca_as_source = FALSE +autoTurnOffHideMeetGoalInit = FALSE +autoTurnOffHideMeetGoal = TRUE +autoTurnOffModifierInit = FALSE +autoTurnOffModifier = TRUE +enableNumbering = TRUE +autoSaveCheck = TRUE +autoSaveTime = 5 +ShowMissingScore = TRUE +enableFeatureId = FALSE +enableMeasureConcealment = FALSE +enableBCCGVarNoEscapeName = FALSE +HvpCloneHierShowMsgAgain = 1 +HvpCloneHierType = tree +HvpCloneHierMetrics = Line,Cond,FSM,Toggle,Branch,Assert +autoRecalPlanAfterLoadingCovDBUserDataPlan = false +warnMeAutoRecalPlanAfterLoadingCovDBUserDataPlan = true +autoRecalExclWithPlan = false +warnMeAutoRecalExclWithPlan = true +autoRecalPlanWithExcl = false +warnMeAutoRecalPlanWithExcl = true +warnPopupWarnWhenMultiFilters = true +warnPopupWarnIfHvpReadOnly = true +unmappedObjsReportLevel = def_var_inst +unmappedObjsReportInst = true +unmappedObjsNumOfObjs = High +[ikos] +TPLanguage = VHDL +TPName = Voyager +TPPath = vsh +TPOption = -X +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[imp] +options = NULL +libPath = NULL +libDir = NULL +[nCompare] +ErrorViewport = 80 180 800 550 +EditorViewport = 409 287 676 475 +EditorHeightWidth = 802 380 +WaveCommand = "novas" +WaveArgs = "-nWave" +[nCompare.Wnd0] +ViewByHier = FALSE +[nMemory] +dispMode = ADDR_HINT +addrColWidth = 120 +valueColWidth = 100 +showCellBitRangeWithAddr = TRUE +wordsShownInOneRow = 8 +syncCursorTime = FALSE +fixCellColumnWidth = FALSE +font = Fixed 14 +[planColors] +plan_fillColor_inactive = lightGray +plan_fillColor_warning = orange +plan_fillColor_error = red +plan_fillColor_invalid = #F0DCDB +plan_fillColor_subplan = lightGray +[schematics] +viewport = 178 262 638 516 +schBackgroundColor = black lineSolid +schBodyColor = orange6 lineSolid +schAsmBodyColor = blue7 lineSolid +schPortColor = orange6 lineSolid +schCellNameColor = Gray6 lineSolid +schCLKNetColor = red6 lineSolid +schPWRNetColor = red4 lineSolid +schGNDNetColor = cyan4 lineSolid +schSIGNetColor = green8 lineSolid +schTraceColor = yellow4 lineSolid +schBackAnnotateColor = white lineSolid +schValue0 = yellow4 lineSolid +schValue1 = green3 lineSolid +schValueX = red4 lineSolid +schValueZ = purple7 lineSolid +dimColor = cyan2 lineSolid +schPreSelColor = green4 lineDash +schSIGBusNetColor = green8 lineSolid +schGNDBusNetColor = cyan4 lineSolid +schPWRBusNetColor = red4 lineSolid +schCLKBusNetColor = red6 lineSolid +schEdgeSensitiveColor = orange6 lineSolid +schAnnotColor = cyan4 lineSolid +schInstNameColor = orange6 lineSolid +schPortNameColor = cyan4 lineSolid +schAsmLatchColor = cyan4 lineSolid +schAsmRegColor = cyan4 lineSolid +schAsmTriColor = cyan4 lineSolid +pre_select = True +ShowPassThroughNet = False +ComputedAnnotColor = ID_PURPLE5 +[schematics_print] +Signature = FALSE +DesignName = PCU +DesignerName = bai +SignatureLocation = LowerRight +MultiPage = TRUE +AutoSliver = FALSE +[sourceColors] +BackgroundActive = gray88 +BackgroundInactive = lightgray +InactiveCode = dimgray +Selection = darkblue +Standard = black +Keyword = blue +Comment = gray25 +Number = black +String = black +Identifier = darkred +Inline = green +colorIdentifier = green +Value = darkgreen +MacroBackground = white +Missing = #400040 +[specColors] +top_plan_linked = #ADFFA6 +top_plan_ignore = #D3D3D3 +top_plan_todo = #EECBAD +sub_plan_ignore = #919191 +sub_plan_todo = #EFAFAF +sub_plan_linked = darkorange +[spec_link_setting] +use_spline = true +goto_section = false +exclude_ignore = true +compare_strategy = 2 +auto_apply_margin = FALSE +margin_top = 0.80 +margin_bottom = 0.80 +margin_left = 0.50 +margin_right = 0.50 +margin_unit = inches +[spiceDebug] +ThroughNet = ID_YELLOW5 +InterfaceElement = ID_GREEN5 +Run-timeInterfaceElement = ID_BLUE5 +HighlightThroughNet = TRUE +HighlightInterfaceElement = TRUE +HighlightRuntimeInterfaceElement = TRUE +HighlightSameNet = TRUE +[surefire] +TPLanguage = Verilog +TPName = SureFire +TPPath = verilog +TPOption = +AddImportArgument = TRUE +LineBreakWithScope = TRUE +StopAfterCompileOption = -tcl +[turboSchema_Printer_Options] +Orientation = Landscape +[turbo_library] +bdb_load_scope +[vdCovFilteringSearchesStrings] +keepLastUsedFiltersMaxNum = 10 +[verisity] +TPLanguage = Verilog +TPName = "Verisity SpeXsim" +TPPath = vlg +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = TRUE +StopAfterCompileOption = -s +[wave.0] +viewPort = 0 28 1920 392 100 65 +[wave.1] +viewPort = 127 219 960 332 100 65 +[wave.2] +viewPort = 38 314 686 205 100 65 +[wave.3] +viewPort = 63 63 700 400 65 41 +[wave.4] +viewPort = 84 84 700 400 65 41 +[wave.5] +viewPort = 92 105 700 400 65 41 +[wave.6] +viewPort = 0 0 700 400 65 41 +[wave.7] +viewPort = 21 21 700 400 65 41 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses new file mode 100644 index 0000000..1922051 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses @@ -0,0 +1,82 @@ +@verdi rc file Version 1.0 +[General] +saveDB = TRUE +relativePath = FALSE +saveSingleView = FALSE +saveNWaveWinId = +VerdiVersion = Verdi_N-2017.12-SP2 +[KeyNote] +Line1 = Automatic Backup 0 +Line2 = Save Open Database Information: Yes +Line3 = Path Option: Absolute Paths +Line4 = Windows Option: All Windows +[TestBench] +ConstrViewShow = 0 +InherViewShow = 0 +FSDBMsgShow = 0 +AnnotationShow = 0 +powerDumped = 0 +[hb] +postSimFile = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb +syncTime = 0 +viewport = 0 27 1920 977 0 0 391 1918 +activeNode = "tb.inst_hilbert_fir_dpi" +activeScope = "tb.inst_hilbert_fir_dpi" +activeFile = "./hilbert_fir_dpi.sv" +interactiveMode = False +viewType = Source +simulatorMode = False +sourceBeginLine = 21 +baMode = False +srcLineNum = True +AutoWrap = True +IdentifyFalseLogic = False +syncSignal = False +traceMode = Hierarchical +showTraceInSchema = True +paMode = False +funcMode = False +powerAwareAnnot = True +amsAnnot = True +traceCrossHier = True +DnDtraceCrossHierOnly = True +traceIncTopPort = False +leadingZero = False +signalPane = False +Scope1 = "tb.inst_hilbert_fir_dpi" +Scope2 = "tb" +sdfCheckUndef = FALSE +simFlow = FALSE +[hb.design] +importCmd = "-f" "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/files.f" +workPath = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir +invokeDir = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir +[hb.sourceTab.1] +scope = tb.inst_hilbert_fir_dpi +File = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir_dpi.sv +Line = 22 +[nMemoryManager] +FsdbFile = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb +UserActionNum = 0 +nMemWindowNum = 0 +[wave.0] +viewPort = 0 28 1920 394 100 65 +primaryWindow = TRUE +SessionFile = /data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.wave.0 +displayGrid = FALSE +hierarchicalName = FALSE +snap = TRUE +displayLeadingZeros = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +highlightGlitchs = FALSE +waveformSyncCursorMarker = FALSE +waveformSyncHorizontalRange = FALSE +waveformSyncVerticalscroll = FALSE +displayErrors = TRUE +displayMsgSymbols = TRUE +showMsgDescriptions = TRUE +autoFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.config b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.config new file mode 100644 index 0000000..b0f1f16 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.config @@ -0,0 +1,55 @@ +[qBaseWindowStateGroup] +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\Verdi=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\nWave=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\hdlHier=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\hdlSrc=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\messageWindow=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\svtbHier=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\OneSearch=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1=7 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_0=widgetDock_hdlHier_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_1=widgetDock_messageWindow_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_2=widgetDock_hdlSrc_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_3=widgetDock_signalList_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_4=widgetDock_svtbHier_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_5=windowDock_OneSearch_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_6=windowDock_nWave_1 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_encode_to_relative_window_id_name=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_restoreNewChildState=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlHier_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlHier_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlHier_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlHier_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_messageWindow_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_messageWindow_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_messageWindow_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_messageWindow_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlSrc_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlSrc_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlSrc_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_hdlSrc_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_signalList_1\isVisible=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_svtbHier_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_svtbHier_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_svtbHier_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\widgetDock_svtbHier_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_OneSearch_1\isNestedWindow=1 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_OneSearch_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_OneSearch_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_OneSearch_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_OneSearch_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\isNestedWindow=1 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\SELECTION_MESSAGE_TOOLBAR=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\ProductVersion=201712 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+Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isNestedWindow=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\size=@Size(1920 977) +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_x=-1 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_y=27 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_width=1920 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_height=977 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.png b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.png new file mode 100644 index 0000000..fc0003e Binary files /dev/null and b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.png differ diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.wave.0 b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.wave.0 new file mode 100644 index 0000000..cd55311 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/novas_autosave.ses.wave.0 @@ -0,0 +1,52 @@ +Magic 271485 +Revision Verdi_N-2017.12-SP2 + +; Window Layout +viewPort 0 28 1920 394 100 65 + +; File list: +; openDirFile [-d delimiter] [-s time_offset] [-rf auto_bus_rule_file] path_name file_name +openDirFile -d / "" "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb" + +; file time scale: +; fileTimeScale ### s|ms|us|ns|ps + +; signal spacing: +signalSpacing 5 + +; windowTimeUnit is used for zoom, cursor & marker +; waveform viewport range +zoom 0.000000 16556.930000 +cursor 0.000000 +marker 0.000000 + +; user define markers +; userMarker time_pos marker_name color linestyle +; visible top row signal index +top 0 +; marker line index +markerPos 0 + +; event list +; addEvent event_name event_expression +; curEvent event_name + + + +COMPLEX_EVENT_BEGIN + + +COMPLEX_EVENT_END + + + +; toolbar current search type +; curSTATUS search_type +curSTATUS ByChange + + +addGroup "G1" + +; getSignalForm Scope Hierarchy Status +; active file of getSignalForm + diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/pes.bat b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/pes.bat new file mode 100644 index 0000000..7c6e4ac --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/pes.bat @@ -0,0 +1,3 @@ +where +detach +quit diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/turbo.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/turbo.log new file mode 100644 index 0000000..a390900 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/turbo.log @@ -0,0 +1,3 @@ +Command Line: /opt/synopsys/verdi/Verdi_N-2017.12-SP2/platform/LINUXAMD64/bin/Novas +uname(Linux cryo1 3.10.0-1160.92.1.el7.x86_64 #1 SMP Tue Jun 20 11:48:01 UTC 2023 x86_64) +au time 435.828291 9.073482 5.031866 delta 1206132736 1206132736 total 1620897792 1620897792 diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd new file mode 100644 index 0000000..6e12ff3 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd @@ -0,0 +1,44 @@ +verdiWindowResize -win $_Verdi_1 -1 "27" "1920" "977" +debImport "-f" \ + "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/files.f" \ + -path \ + {/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir} +wvCreateWindow +wvSetPosition -win $_nWave2 {("G1" 0)} +wvOpenFile -win $_nWave2 \ + {/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb} +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcSetScope -win $_nTrace1 "tb.inst_hilbert_fir_dpi" -delim "." +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "bit" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "q_data_temp" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcSetScope -win $_nTrace1 "tb.inst_hilbert_fir_dpi" -delim "." +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcSetScope -win $_nTrace1 "tb.inst_hilbert_fir_dpi" -delim "." +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "q_data_temp" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "i_data_temp" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "i_data_temp" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcDeselectAll -win $_nTrace1 +debExit diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd.bak b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd.bak new file mode 100644 index 0000000..16cf7e0 --- /dev/null +++ b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi.cmd.bak @@ -0,0 +1,51 @@ +verdiWindowResize -win $_Verdi_1 -1 "27" "1920" "977" +debImport "-f" \ + "/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/files.f" \ + -path \ + {/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir} +wvCreateWindow +wvSetPosition -win $_nWave2 {("G1" 0)} +wvOpenFile -win $_nWave2 \ + {/data/work/yzzhang/hdl/readout_chip/up/EZQ_readout/testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/TB.fsdb} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "q_data" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcSetScope -win $_nTrace1 "tb.inst_hilbert_fir_dpi" -delim "." +srcHBSelect "tb.inst_hilbert_fir_dpi" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 15 5 4 -win $_nTrace1 -name "i_data" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcAction -pos 16 5 2 -win $_nTrace1 -name "q_data" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "q_data_temp" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "i_data_temp" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 41 1 2 -win $_nTrace1 -name "i_data" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcAction -pos 36 1 2 -win $_nTrace1 -name "q_data" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "q_data_temp" -win $_nTrace1 +srcAction -pos 36 3 5 -win $_nTrace1 -name "q_data_temp" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "i_data_temp" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +srcHBSelect "tb" -win $_nTrace1 +srcSetScope -win $_nTrace1 "tb" -delim "." +srcHBSelect "tb" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "i_data\[0\]" -win $_nTrace1 +srcAddSelectedToWave -clipboard -win $_nTrace1 +wvDrop -win $_nWave2 +debExit diff --git a/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi_perf_err.log b/hilbert_dpi/codegen/dll/hilbert_fir/verdiLog/verdi_perf_err.log new file mode 100644 index 0000000..e69de29 diff --git a/nco_dpi/codegen/dll/nco_model/DPI_Component.so b/nco_dpi/codegen/dll/nco_model/DPI_Component.so new file mode 100755 index 0000000..b1b7fc2 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/DPI_Component.so differ diff --git a/nco_dpi/codegen/dll/nco_model/Porting_DPIC.mk b/nco_dpi/codegen/dll/nco_model/Porting_DPIC.mk new file mode 100644 index 0000000..4b04ec8 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/Porting_DPIC.mk @@ -0,0 +1,13 @@ +SRC=$(wildcard *.c) +OBJ=$(SRC:.c=.o) + +SHARE_LIB_NAME=DPI_Component.so + +all: $(SRC) $(SHARE_LIB_NAME) + @echo "### Successfully generated all binary outputs." + +$(SHARE_LIB_NAME): $(OBJ) + gcc -shared -lm $(OBJ) -o $@ + +.c.o: + gcc -c -fPIC -Wall -pedantic -Wno-long-long -fwrapv -O0 $< -o $@ diff --git a/nco_dpi/codegen/dll/nco_model/_clang-format b/nco_dpi/codegen/dll/nco_model/_clang-format new file mode 100644 index 0000000..55a16f7 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/_clang-format @@ -0,0 +1,27 @@ +BasedOnStyle: LLVM +Language: Cpp +IndentWidth: 2 +ColumnLimit: 80 +AllowShortBlocksOnASingleLine: false +AllowShortCaseLabelsOnASingleLine: false +AllowShortFunctionsOnASingleLine: None +AllowShortIfStatementsOnASingleLine: false +AllowShortLoopsOnASingleLine: false +MaxEmptyLinesToKeep: 1 +NamespaceIndentation: None +CommentPragmas: '^(Return Type|Arguments)\s*' +DeriveLineEnding : true +BreakBeforeBraces: Custom +BraceWrapping: + AfterClass: false + AfterControlStatement: false + AfterEnum: true + AfterFunction: true + AfterNamespace: false + AfterStruct: false + AfterUnion: false + AfterExternBlock: false + BeforeCatch: false + BeforeElse: false + SplitEmptyFunction: true + SplitEmptyRecord: true diff --git a/nco_dpi/codegen/dll/nco_model/buildInfo.mat b/nco_dpi/codegen/dll/nco_model/buildInfo.mat new file mode 100644 index 0000000..5c1a668 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/buildInfo.mat differ diff --git a/nco_dpi/codegen/dll/nco_model/codeInfo.mat b/nco_dpi/codegen/dll/nco_model/codeInfo.mat new file mode 100644 index 0000000..eb3a4b3 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/codeInfo.mat differ diff --git a/nco_dpi/codegen/dll/nco_model/codedescriptor.dmr b/nco_dpi/codegen/dll/nco_model/codedescriptor.dmr new file mode 100644 index 0000000..e09c56d Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/codedescriptor.dmr differ diff --git a/nco_dpi/codegen/dll/nco_model/compileInfo.mat b/nco_dpi/codegen/dll/nco_model/compileInfo.mat new file mode 100644 index 0000000..6cbb4e4 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/compileInfo.mat differ diff --git a/nco_dpi/codegen/dll/nco_model/examples/main.c b/nco_dpi/codegen/dll/nco_model/examples/main.c new file mode 100644 index 0000000..adb20c4 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/examples/main.c @@ -0,0 +1,95 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: main.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/*************************************************************************/ +/* This automatically generated example C main file shows how to call */ +/* entry-point functions that MATLAB Coder generated. You must customize */ +/* this file for your application. Do not modify this file directly. */ +/* Instead, make a copy of this file, modify it, and integrate it into */ +/* your development environment. */ +/* */ +/* This file initializes entry-point function arguments to a default */ +/* size and value before calling the entry-point functions. It does */ +/* not store or use any values returned from the entry-point functions. */ +/* If necessary, it does pre-allocate memory for returned values. */ +/* You can use this file as a starting point for a main function that */ +/* you can deploy in your application. */ +/* */ +/* After you copy the file, and before you deploy it, you must make the */ +/* following changes: */ +/* * For variable-size function arguments, change the example sizes to */ +/* the sizes that your application requires. */ +/* * Change the example values of function arguments to the values that */ +/* your application requires. */ +/* * If the entry-point functions return values, store these values or */ +/* otherwise use them as required by your application. */ +/* */ +/*************************************************************************/ + +/* Include Files */ +#include "main.h" +#include "nco.h" +#include "rt_nonfinite.h" + +/* Function Declarations */ +static double argInit_real_T(void); + +/* Function Definitions */ +/* + * Arguments : void + * Return Type : double + */ +static double argInit_real_T(void) +{ + return 0.0; +} + +/* + * Arguments : int argc + * char **argv + * Return Type : int + */ +int main(int argc, char **argv) +{ + (void)argc; + (void)argv; + /* Initialize the application. +You do not need to do this more than one time. */ + nco_initialize(); + /* Invoke the entry-point functions. +You can call entry-point functions multiple times. */ + main_nco(); + /* Terminate the application. +You do not need to do this more than one time. */ + nco_terminate(); + return 0; +} + +/* + * Arguments : void + * Return Type : void + */ +void main_nco(void) +{ + double acc_o; + double fcw_tmp; + double my_c; + double my_s; + /* Initialize function 'nco' input arguments. */ + fcw_tmp = argInit_real_T(); + /* Call the entry-point 'nco'. */ + nco(fcw_tmp, fcw_tmp, fcw_tmp, fcw_tmp, &my_c, &my_s, &acc_o); +} + +/* + * File trailer for main.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/examples/main.h b/nco_dpi/codegen/dll/nco_model/examples/main.h new file mode 100644 index 0000000..912b561 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/examples/main.h @@ -0,0 +1,62 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: main.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/*************************************************************************/ +/* This automatically generated example C main file shows how to call */ +/* entry-point functions that MATLAB Coder generated. You must customize */ +/* this file for your application. Do not modify this file directly. */ +/* Instead, make a copy of this file, modify it, and integrate it into */ +/* your development environment. */ +/* */ +/* This file initializes entry-point function arguments to a default */ +/* size and value before calling the entry-point functions. It does */ +/* not store or use any values returned from the entry-point functions. */ +/* If necessary, it does pre-allocate memory for returned values. */ +/* You can use this file as a starting point for a main function that */ +/* you can deploy in your application. */ +/* */ +/* After you copy the file, and before you deploy it, you must make the */ +/* following changes: */ +/* * For variable-size function arguments, change the example sizes to */ +/* the sizes that your application requires. */ +/* * Change the example values of function arguments to the values that */ +/* your application requires. */ +/* * If the entry-point functions return values, store these values or */ +/* otherwise use them as required by your application. */ +/* */ +/*************************************************************************/ + +#ifndef MAIN_H +#define MAIN_H + +/* Include Files */ +#include "rtwtypes.h" +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Function Declarations */ +extern int main(int argc, char **argv); + +extern void main_nco(void); + +#ifdef __cplusplus +} +#endif + +#endif +/* + * File trailer for main.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.c b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.c new file mode 100644 index 0000000..48702b9 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.c @@ -0,0 +1,211 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_api.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* Include Files */ +#include "_coder_nco_api.h" +#include "_coder_nco_mex.h" + +/* Variable Definitions */ +emlrtCTX emlrtRootTLSGlobal = NULL; + +emlrtContext emlrtContextGlobal = { + true, /* bFirstTime */ + false, /* bInitialized */ + 131643U, /* fVersionInfo */ + NULL, /* fErrorFunction */ + "nco", /* fFunctionName */ + NULL, /* fRTCallStack */ + false, /* bDebugMode */ + {2045744189U, 2170104910U, 2743257031U, 4284093946U}, /* fSigWrd */ + NULL /* fSigMem */ +}; + +/* Function Declarations */ +static real_T b_emlrt_marshallIn(const emlrtStack *sp, const mxArray *u, + const emlrtMsgIdentifier *parentId); + +static real_T c_emlrt_marshallIn(const emlrtStack *sp, const mxArray *src, + const emlrtMsgIdentifier *msgId); + +static void emlrtExitTimeCleanupDtorFcn(const void *r); + +static real_T emlrt_marshallIn(const emlrtStack *sp, const mxArray *nullptr, + const char_T *identifier); + +static const mxArray *emlrt_marshallOut(const real_T u); + +/* Function Definitions */ +/* + * Arguments : const emlrtStack *sp + * const mxArray *u + * const emlrtMsgIdentifier *parentId + * Return Type : real_T + */ +static real_T b_emlrt_marshallIn(const emlrtStack *sp, const mxArray *u, + const emlrtMsgIdentifier *parentId) +{ + real_T y; + y = c_emlrt_marshallIn(sp, emlrtAlias(u), parentId); + emlrtDestroyArray(&u); + return y; +} + +/* + * Arguments : const emlrtStack *sp + * const mxArray *src + * const emlrtMsgIdentifier *msgId + * Return Type : real_T + */ +static real_T c_emlrt_marshallIn(const emlrtStack *sp, const mxArray *src, + const emlrtMsgIdentifier *msgId) +{ + static const int32_T dims = 0; + real_T ret; + emlrtCheckBuiltInR2012b((emlrtConstCTX)sp, msgId, src, "double", false, 0U, + (const void *)&dims); + ret = *(real_T *)emlrtMxGetData(src); + emlrtDestroyArray(&src); + return ret; +} + +/* + * Arguments : const void *r + * Return Type : void + */ +static void emlrtExitTimeCleanupDtorFcn(const void *r) +{ + emlrtExitTimeCleanup(&emlrtContextGlobal); +} + +/* + * Arguments : const emlrtStack *sp + * const mxArray *nullptr + * const char_T *identifier + * Return Type : real_T + */ +static real_T emlrt_marshallIn(const emlrtStack *sp, const mxArray *nullptr, + const char_T *identifier) +{ + emlrtMsgIdentifier thisId; + real_T y; + thisId.fIdentifier = (const char_T *)identifier; + thisId.fParent = NULL; + thisId.bParentIsCell = false; + y = b_emlrt_marshallIn(sp, emlrtAlias(nullptr), &thisId); + emlrtDestroyArray(&nullptr); + return y; +} + +/* + * Arguments : const real_T u + * Return Type : const mxArray * + */ +static const mxArray *emlrt_marshallOut(const real_T u) +{ + const mxArray *m; + const mxArray *y; + y = NULL; + m = emlrtCreateDoubleScalar(u); + emlrtAssign(&y, m); + return y; +} + +/* + * Arguments : const mxArray * const prhs[4] + * int32_T nlhs + * const mxArray *plhs[3] + * Return Type : void + */ +void nco_api(const mxArray *const prhs[4], int32_T nlhs, const mxArray *plhs[3]) +{ + emlrtStack st = { + NULL, /* site */ + NULL, /* tls */ + NULL /* prev */ + }; + real_T acc; + real_T acc_o; + real_T clr; + real_T fcw; + real_T my_c; + real_T my_s; + real_T ptw; + st.tls = emlrtRootTLSGlobal; + /* Marshall function inputs */ + fcw = emlrt_marshallIn(&st, emlrtAliasP(prhs[0]), "fcw"); + ptw = emlrt_marshallIn(&st, emlrtAliasP(prhs[1]), "ptw"); + clr = emlrt_marshallIn(&st, emlrtAliasP(prhs[2]), "clr"); + acc = emlrt_marshallIn(&st, emlrtAliasP(prhs[3]), "acc"); + /* Invoke the target function */ + nco(fcw, ptw, clr, acc, &my_c, &my_s, &acc_o); + /* Marshall function outputs */ + plhs[0] = emlrt_marshallOut(my_c); + if (nlhs > 1) { + plhs[1] = emlrt_marshallOut(my_s); + } + if (nlhs > 2) { + plhs[2] = emlrt_marshallOut(acc_o); + } +} + +/* + * Arguments : void + * Return Type : void + */ +void nco_atexit(void) +{ + emlrtStack st = { + NULL, /* site */ + NULL, /* tls */ + NULL /* prev */ + }; + mexFunctionCreateRootTLS(); + st.tls = emlrtRootTLSGlobal; + emlrtPushHeapReferenceStackR2021a( + &st, false, NULL, (void *)&emlrtExitTimeCleanupDtorFcn, NULL, NULL, NULL); + emlrtEnterRtStackR2012b(&st); + emlrtDestroyRootTLS(&emlrtRootTLSGlobal); + nco_xil_terminate(); + nco_xil_shutdown(); + emlrtExitTimeCleanup(&emlrtContextGlobal); +} + +/* + * Arguments : void + * Return Type : void + */ +void nco_initialize(void) +{ + emlrtStack st = { + NULL, /* site */ + NULL, /* tls */ + NULL /* prev */ + }; + mexFunctionCreateRootTLS(); + st.tls = emlrtRootTLSGlobal; + emlrtClearAllocCountR2012b(&st, false, 0U, NULL); + emlrtEnterRtStackR2012b(&st); + emlrtFirstTimeR2012b(emlrtRootTLSGlobal); +} + +/* + * Arguments : void + * Return Type : void + */ +void nco_terminate(void) +{ + emlrtDestroyRootTLS(&emlrtRootTLSGlobal); +} + +/* + * File trailer for _coder_nco_api.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.h b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.h new file mode 100644 index 0000000..8397f60 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_api.h @@ -0,0 +1,54 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_api.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef _CODER_NCO_API_H +#define _CODER_NCO_API_H + +/* Include Files */ +#include "emlrt.h" +#include "mex.h" +#include "tmwtypes.h" +#include + +/* Variable Declarations */ +extern emlrtCTX emlrtRootTLSGlobal; +extern emlrtContext emlrtContextGlobal; + +#ifdef __cplusplus +extern "C" { +#endif + +/* Function Declarations */ +void nco(real_T fcw, real_T ptw, real_T clr, real_T acc, real_T *my_c, + real_T *my_s, real_T *acc_o); + +void nco_api(const mxArray *const prhs[4], int32_T nlhs, + const mxArray *plhs[3]); + +void nco_atexit(void); + +void nco_initialize(void); + +void nco_terminate(void); + +void nco_xil_shutdown(void); + +void nco_xil_terminate(void); + +#ifdef __cplusplus +} +#endif + +#endif +/* + * File trailer for _coder_nco_api.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.c b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.c new file mode 100644 index 0000000..04a6d30 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.c @@ -0,0 +1,89 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_info.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* Include Files */ +#include "_coder_nco_info.h" +#include "emlrt.h" +#include "tmwtypes.h" + +/* Function Declarations */ +static const mxArray *c_emlrtMexFcnResolvedFunctionsI(void); + +/* Function Definitions */ +/* + * Arguments : void + * Return Type : const mxArray * + */ +static const mxArray *c_emlrtMexFcnResolvedFunctionsI(void) +{ + static const int32_T iv[2] = {0, 1}; + const mxArray *m; + const mxArray *nameCaptureInfo; + nameCaptureInfo = NULL; + m = emlrtCreateNumericArray(2, (const void *)&iv[0], mxDOUBLE_CLASS, mxREAL); + emlrtAssign(&nameCaptureInfo, m); + return nameCaptureInfo; +} + +/* + * Arguments : void + * Return Type : mxArray * + */ +mxArray *emlrtMexFcnProperties(void) +{ + mxArray *xEntryPoints; + mxArray *xInputs; + mxArray *xResult; + const char_T *propFieldName[9] = {"Version", + "ResolvedFunctions", + "Checksum", + "EntryPoints", + "CoverageInfo", + "IsPolymorphic", + "PropertyList", + "UUID", + "ClassEntryPointIsHandle"}; + const char_T *epFieldName[8] = { + "Name", "NumberOfInputs", "NumberOfOutputs", "ConstantInputs", + "FullPath", "TimeStamp", "Constructor", "Visible"}; + xEntryPoints = + emlrtCreateStructMatrix(1, 1, 8, (const char_T **)&epFieldName[0]); + xInputs = emlrtCreateLogicalMatrix(1, 4); + emlrtSetField(xEntryPoints, 0, "Name", emlrtMxCreateString("nco")); + emlrtSetField(xEntryPoints, 0, "NumberOfInputs", + emlrtMxCreateDoubleScalar(4.0)); + emlrtSetField(xEntryPoints, 0, "NumberOfOutputs", + emlrtMxCreateDoubleScalar(3.0)); + emlrtSetField(xEntryPoints, 0, "ConstantInputs", xInputs); + emlrtSetField(xEntryPoints, 0, "FullPath", + emlrtMxCreateString("C:\\Users\\Administrator\\Desktop\\gc_" + "awg\\demod_algorithm\\daq_matlab\\nco.m")); + emlrtSetField(xEntryPoints, 0, "TimeStamp", + emlrtMxCreateDoubleScalar(739716.09597222228)); + emlrtSetField(xEntryPoints, 0, "Constructor", + emlrtMxCreateLogicalScalar(false)); + emlrtSetField(xEntryPoints, 0, "Visible", emlrtMxCreateLogicalScalar(true)); + xResult = + emlrtCreateStructMatrix(1, 1, 9, (const char_T **)&propFieldName[0]); + emlrtSetField(xResult, 0, "Version", + emlrtMxCreateString("24.1.0.2537033 (R2024a)")); + emlrtSetField(xResult, 0, "ResolvedFunctions", + (mxArray *)c_emlrtMexFcnResolvedFunctionsI()); + emlrtSetField(xResult, 0, "Checksum", + emlrtMxCreateString("UZNV6GSDjNHqUjgyPa3PcG")); + emlrtSetField(xResult, 0, "EntryPoints", xEntryPoints); + return xResult; +} + +/* + * File trailer for _coder_nco_info.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.h b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.h new file mode 100644 index 0000000..8936e94 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_info.h @@ -0,0 +1,33 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_info.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef _CODER_NCO_INFO_H +#define _CODER_NCO_INFO_H + +/* Include Files */ +#include "mex.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Function Declarations */ +MEXFUNCTION_LINKAGE mxArray *emlrtMexFcnProperties(void); + +#ifdef __cplusplus +} +#endif + +#endif +/* + * File trailer for _coder_nco_info.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.c b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.c new file mode 100644 index 0000000..1cd8d98 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.c @@ -0,0 +1,93 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_mex.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* Include Files */ +#include "_coder_nco_mex.h" +#include "_coder_nco_api.h" + +/* Function Definitions */ +/* + * Arguments : int32_T nlhs + * mxArray *plhs[] + * int32_T nrhs + * const mxArray *prhs[] + * Return Type : void + */ +void mexFunction(int32_T nlhs, mxArray *plhs[], int32_T nrhs, + const mxArray *prhs[]) +{ + mexAtExit(&nco_atexit); + /* Module initialization. */ + nco_initialize(); + /* Dispatch the entry-point. */ + unsafe_nco_mexFunction(nlhs, plhs, nrhs, prhs); + /* Module termination. */ + nco_terminate(); +} + +/* + * Arguments : void + * Return Type : emlrtCTX + */ +emlrtCTX mexFunctionCreateRootTLS(void) +{ + emlrtCreateRootTLSR2022a(&emlrtRootTLSGlobal, &emlrtContextGlobal, NULL, 1, + NULL, "GBK", true); + return emlrtRootTLSGlobal; +} + +/* + * Arguments : int32_T nlhs + * mxArray *plhs[3] + * int32_T nrhs + * const mxArray *prhs[4] + * Return Type : void + */ +void unsafe_nco_mexFunction(int32_T nlhs, mxArray *plhs[3], int32_T nrhs, + const mxArray *prhs[4]) +{ + emlrtStack st = { + NULL, /* site */ + NULL, /* tls */ + NULL /* prev */ + }; + const mxArray *b_prhs[4]; + const mxArray *outputs[3]; + int32_T i; + st.tls = emlrtRootTLSGlobal; + /* Check for proper number of arguments. */ + if (nrhs != 4) { + emlrtErrMsgIdAndTxt(&st, "EMLRT:runTime:WrongNumberOfInputs", 5, 12, 4, 4, + 3, "nco"); + } + if (nlhs > 3) { + emlrtErrMsgIdAndTxt(&st, "EMLRT:runTime:TooManyOutputArguments", 3, 4, 3, + "nco"); + } + /* Call the function. */ + b_prhs[0] = prhs[0]; + b_prhs[1] = prhs[1]; + b_prhs[2] = prhs[2]; + b_prhs[3] = prhs[3]; + nco_api(b_prhs, nlhs, outputs); + /* Copy over outputs to the caller. */ + if (nlhs < 1) { + i = 1; + } else { + i = nlhs; + } + emlrtReturnArrays(i, &plhs[0], &outputs[0]); +} + +/* + * File trailer for _coder_nco_mex.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.h b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.h new file mode 100644 index 0000000..3776733 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/interface/_coder_nco_mex.h @@ -0,0 +1,41 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: _coder_nco_mex.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef _CODER_NCO_MEX_H +#define _CODER_NCO_MEX_H + +/* Include Files */ +#include "emlrt.h" +#include "mex.h" +#include "tmwtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Function Declarations */ +MEXFUNCTION_LINKAGE void mexFunction(int32_T nlhs, mxArray *plhs[], + int32_T nrhs, const mxArray *prhs[]); + +emlrtCTX mexFunctionCreateRootTLS(void); + +void unsafe_nco_mexFunction(int32_T nlhs, mxArray *plhs[3], int32_T nrhs, + const mxArray *prhs[4]); + +#ifdef __cplusplus +} +#endif + +#endif +/* + * File trailer for _coder_nco_mex.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/nco.c b/nco_dpi/codegen/dll/nco_model/nco.c new file mode 100644 index 0000000..20fcc5d --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco.c @@ -0,0 +1,309 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: nco.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* Include Files */ +#include "nco.h" +#include "rt_nonfinite.h" +#include "rt_nonfinite.h" +#include + +/* Function Declarations */ +static double rt_roundd_snf(double u); + +/* Function Definitions */ +/* + * Arguments : double u + * Return Type : double + */ +static double rt_roundd_snf(double u) +{ + double y; + if (fabs(u) < 4.503599627370496E+15) { + if (u >= 0.5) { + y = floor(u + 0.5); + } else if (u > -0.5) { + y = u * 0.0; + } else { + y = ceil(u - 0.5); + } + } else { + y = u; + } + return y; +} + +/* + * Arguments : double fcw + * double ptw + * double clr + * double acc + * double *my_c + * double *my_s + * double *acc_o + * Return Type : void + */ +void nco(double fcw, double ptw, double clr, double acc, double *my_c, + double *my_s, double *acc_o) +{ + static const int res_cos[96] = { + 39, 39, 39, 39, 39, 39, 39, 39, 39, + 38, 38, 38, 38, 37, 37, 37, 36, 36, + 35, 35, 35, 34, 34, 33, 33, 32, 31, + 31, 30, 30, 29, 28, 0, 79, 158, 237, + 315, 394, 472, 550, 628, 705, 782, 858, 934, + 1009, 1084, 1158, 1231, 1304, 1376, 1446, 1517, 1586, + 1654, 1721, 1787, 1852, 1916, 1979, 2041, 2101, 2161, + 2218, 262143, 262065, 261828, 261434, 260882, 260173, 259307, 258285, + 257107, 255774, 254288, 252648, 250856, 248913, 246820, 244578, 242189, + 239655, 236975, 234153, 231190, 228088, 224848, 221473, 217965, 214325, + 210556, 206660, 202640, 198498, 194236, 189857}; + static const int res_sin[96] = { + 0, 1, 2, 3, 4, 5, 6, 7, 8, + 9, 10, 11, 12, 13, 14, 15, 16, 16, + 17, 18, 19, 20, 21, 22, 22, 23, 24, + 25, 25, 26, 27, 28, 3217, 3216, 3213, 3208, + 3202, 3193, 3182, 3170, 3155, 3139, 3121, 3101, 3079, + 3055, 3029, 3002, 2972, 2941, 2908, 2874, 2837, 2799, + 2759, 2718, 2675, 2630, 2584, 2536, 2487, 2436, 2384, + 2330, 0, 6433, 12863, 19284, 25695, 32089, 38464, 44817, + 51142, 57436, 63696, 69917, 76096, 82230, 88314, 94344, 100318, + 106232, 112081, 117863, 123574, 129210, 134769, 140246, 145639, 150945, + 156159, 161279, 166302, 171225, 176045, 180759}; + double cn; + double longp; + double pha; + double pha_n; + double r; + double x; + double y; + int acc_o_tmp; + /* function + * [my_c,my_s,acc_o,pha,qua,longp,longn,segp,segn,pha_p,pha_n,cp,sp,cn,sn]=nco(fcw,ptw,clr,acc) + */ + x = acc + fcw; + if (rtIsNaN(x) || rtIsInf(x)) { + pha = rtNaN; + } else if (x == 0.0) { + pha = 0.0; + } else { + pha = fmod(x, 2.81474976710656E+14); + if (pha == 0.0) { + pha = 0.0; + } else if (x < 0.0) { + pha += 2.81474976710656E+14; + } + } + acc_o_tmp = (clr == 0.0); + *acc_o = (double)acc_o_tmp * pha; + /* res = coef(); */ + /* pha = round(acc_o/2^29) + ptw*2^3; */ + /* qua = floor(mod(pha/2^16,8)); */ + /* seg = floor(mod((pha/2^11),32)); */ + /* segp = seg + 1; */ + /* segn = 32 - seg; */ + /* pha = mod(pha,2^11); */ + /* */ + /* c2_list_hex=["3ffff","3ffb1","3fec4","3fd3a","3fb12","3f84d","3f4eb","3f0ed","3ec53","3e71e","3e150","3dae8","3d3e8","3cc51","3c424","3bb62","3b20d","3a827","39daf","392a9",... + */ + /* "38716","37af8","36e50","36121","3536d","34535","3367c","32744","31790","30762","2f6bc","2e5a1"]; + */ + /* c1_list_hex=["3ffff","3ffb1","3fec4","3fd3a","3fb12","3f84d","3f4eb","3f0ed","3ec53","3e71e","3e150","3dae8","3d3e8","3cc51","3c424","3bb62","3b20d","3a827","39daf","392a9",... + */ + /* "38716","37af8","36e50","36121","3536d","34535","3367c","32744","31790","30762","2f6bc","2e5a1"]; + */ + /* */ + pha = floor((double)acc_o_tmp * acc / 5.36870912E+8) + ptw * 8.0; + x = pha / 65536.0; + if (rtIsNaN(x) || rtIsInf(x)) { + r = rtNaN; + } else if (x == 0.0) { + r = 0.0; + } else { + r = fmod(x, 8.0); + if (r == 0.0) { + r = 0.0; + } else if (x < 0.0) { + r += 8.0; + } + } + if (rtIsNaN(pha) || rtIsInf(pha)) { + longp = rtNaN; + } else if (pha == 0.0) { + longp = 0.0; + } else { + longp = fmod(pha, 65536.0); + if (longp == 0.0) { + longp = 0.0; + } else if (pha < 0.0) { + longp += 65536.0; + } + } + /* 低16位 */ + x = longp / 2048.0; + if (rtIsNaN(x)) { + pha = rtNaN; + } else if (x == 0.0) { + pha = 0.0; + } else { + pha = fmod(x, 32.0); + if (pha == 0.0) { + pha = 0.0; + } else if (x < 0.0) { + pha += 32.0; + } + } + y = floor(pha); + x = (65535.0 - longp) / 2048.0; + if (rtIsNaN(x)) { + pha = rtNaN; + } else if (x == 0.0) { + pha = 0.0; + } else { + pha = fmod(x, 32.0); + if (pha == 0.0) { + pha = 0.0; + } else if (x < 0.0) { + pha += 32.0; + } + } + x = floor(pha); + if (rtIsNaN(longp)) { + pha = rtNaN; + pha_n = rtNaN; + } else { + if (longp == 0.0) { + pha = 0.0; + } else { + pha = fmod(longp, 2048.0); + if (pha == 0.0) { + pha = 0.0; + } else if (longp < 0.0) { + pha += 2048.0; + } + } + if (65535.0 - longp == 0.0) { + pha_n = 0.0; + } else { + pha_n = fmod(65535.0 - longp, 2048.0); + if (pha_n == 0.0) { + pha_n = 0.0; + } else if (65535.0 - longp < 0.0) { + pha_n += 2048.0; + } + } + } + /* cp = round((round((round(res_cos(segp,1)*pha_p/2^11) + + * res_cos(segp,2))*pha_p/2^10) + res_cos(segp,3))/2^3); */ + /* sp = round((round((round(res_sin(segp,1)*pha_p/2^11) + + * res_sin(segp,2))*pha_p/2^10) + res_sin(segp,3))/2^3); */ + /* cn = round((round((round(res_cos(segn,1)*pha_n/2^11) + + * res_cos(segn,2))*pha_n/2^10) + res_cos(segn,3))/2^3); */ + /* sn = round((round((round(res_sin(segn,1)*pha_n/2^11) + + * res_sin(segn,2))*pha_n/2^10) + res_sin(segn,3))/2^3); */ + longp = rt_roundd_snf( + ((double)res_cos[(int)(y + 1.0) + 63] - + rt_roundd_snf( + (rt_roundd_snf((double)res_cos[(int)(y + 1.0) - 1] * pha / 2048.0) + + (double)res_cos[(int)(y + 1.0) + 31]) * + pha / 1024.0)) / + 8.0); + cn = rt_roundd_snf( + ((double)res_cos[(int)(x + 1.0) + 63] - + rt_roundd_snf((rt_roundd_snf((double)res_cos[(int)(x + 1.0) - 1] * + pha_n / 2048.0) + + (double)res_cos[(int)(x + 1.0) + 31]) * + pha_n / 1024.0)) / + 8.0); + *my_s = rt_roundd_snf( + ((double)res_sin[(int)(y + 1.0) + 63] + + rt_roundd_snf( + ((double)res_sin[(int)(y + 1.0) + 31] - + rt_roundd_snf((double)res_sin[(int)(y + 1.0) - 1] * pha / 2048.0)) * + pha / 1024.0)) / + 8.0); + pha = rt_roundd_snf( + ((double)res_sin[(int)(x + 1.0) + 63] + + rt_roundd_snf(((double)res_sin[(int)(x + 1.0) + 31] - + rt_roundd_snf((double)res_sin[(int)(x + 1.0) - 1] * + pha_n / 2048.0)) * + pha_n / 1024.0)) / + 8.0); + switch ((int)floor(r)) { + case 0: + *my_c = longp; + break; + case 1: + *my_c = pha; + *my_s = cn; + break; + case 2: + *my_c = -*my_s; + *my_s = longp; + break; + case 3: + *my_c = -cn; + *my_s = pha; + break; + case 4: + *my_c = -longp; + *my_s = -*my_s; + break; + case 5: + *my_c = -pha; + *my_s = -cn; + break; + case 6: + *my_c = *my_s; + *my_s = -longp; + break; + case 7: + *my_c = cn; + *my_s = -pha; + break; + default: + *my_c = 0.0; + *my_s = 0.0; + break; + } + if (*my_c >= 32768.0) { + *my_c = 32767.0; + } else if (*my_c < -32768.0) { + *my_c = -32768.0; + } + if (*my_s >= 32768.0) { + *my_s = 32767.0; + } else if (*my_s < -32768.0) { + *my_s = -32768.0; + } + /* result.pha = round(acc/2^29 + ptw*2^3); */ +} + +/* + * Arguments : void + * Return Type : void + */ +void nco_initialize(void) +{ + rt_InitInfAndNaN(); +} + +/* + * Arguments : void + * Return Type : void + */ +void nco_terminate(void) +{ +} + +/* + * File trailer for nco.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/nco.def b/nco_dpi/codegen/dll/nco_model/nco.def new file mode 100644 index 0000000..8a7d51d --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco.def @@ -0,0 +1,4 @@ +EXPORTS +nco +nco_initialize +nco_terminate diff --git a/nco_dpi/codegen/dll/nco_model/nco.h b/nco_dpi/codegen/dll/nco_model/nco.h new file mode 100644 index 0000000..02912b9 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco.h @@ -0,0 +1,40 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: nco.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef NCO_H +#define NCO_H + +/* Include Files */ +#include "rtwtypes.h" +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* Function Declarations */ +extern void nco(double fcw, double ptw, double clr, double acc, double *my_c, + double *my_s, double *acc_o); + +extern void nco_initialize(void); + +extern void nco_terminate(void); + +#ifdef __cplusplus +} +#endif + +#endif +/* + * File trailer for nco.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/nco.o b/nco_dpi/codegen/dll/nco_model/nco.o new file mode 100644 index 0000000..54fc004 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/nco.o differ diff --git a/nco_dpi/codegen/dll/nco_model/nco_dpi.c b/nco_dpi/codegen/dll/nco_model/nco_dpi.c new file mode 100644 index 0000000..7b62d40 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco_dpi.c @@ -0,0 +1,52 @@ +/* + +*File: C:\Users\Administrator\Desktop\gc_awg\demod_algorithm\daq_matlab\codegen\dll\nco\nco_dpi.c +*Created: 2025-04-09 02:18:36 +*Generated by MATLAB 24.1 and HDL Verifier 24.1 + +*/ + +#include "nco.h" +#include "nco_dpi.h" +#include + + + + +DPI_DLL_EXPORT void * DPI_nco_initialize(void* existhandle) +{ + + nco_initialize(); + existhandle=NULL; + return NULL; + +} + +DPI_DLL_EXPORT void * DPI_nco_reset(void* objhandle,real_T fcw,real_T ptw,real_T clr,real_T acc,real_T * my_c,real_T * my_s,real_T * acc_o) +{ + DPI_nco_terminate(objhandle); + objhandle=NULL; + objhandle=DPI_nco_initialize(NULL); + DPI_nco(objhandle,fcw,ptw,clr,acc,my_c,my_s,acc_o); + DPI_nco_terminate(objhandle); + objhandle=NULL; + return DPI_nco_initialize(NULL); + +} + +DPI_DLL_EXPORT void DPI_nco(void* objhandle,real_T fcw,real_T ptw,real_T clr,real_T acc,real_T * my_c,real_T * my_s,real_T * acc_o) +{ + + + nco(fcw,ptw,clr,acc,my_c,my_s,acc_o); + objhandle=NULL; + + +} + +DPI_DLL_EXPORT void DPI_nco_terminate(void* existhandle) +{ + existhandle=NULL; + nco_terminate(); + +} diff --git a/nco_dpi/codegen/dll/nco_model/nco_dpi.h b/nco_dpi/codegen/dll/nco_model/nco_dpi.h new file mode 100644 index 0000000..c0363e0 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco_dpi.h @@ -0,0 +1,34 @@ +/* + +*File: C:\Users\Administrator\Desktop\gc_awg\demod_algorithm\daq_matlab\codegen\dll\nco\nco_dpi.h +*Created: 2025-04-09 02:18:36 +*Generated by MATLAB 24.1 and HDL Verifier 24.1 + +*/ + +#ifndef RTW_HEADER_nco_dpi_h_ +#define RTW_HEADER_nco_dpi_h_ + +#ifdef __cplusplus +#define DPI_LINK_DECL extern "C" +#else +#define DPI_LINK_DECL +#endif + +#ifndef DPI_DLL_EXPORT +#if defined(_MSC_VER) || defined(__MINGW64__) +#define DPI_DLL_EXPORT __declspec(dllexport) +#else +#define DPI_DLL_EXPORT +#endif +#endif + +DPI_LINK_DECL +DPI_DLL_EXPORT void * DPI_nco_initialize(void* existhandle); +DPI_LINK_DECL +DPI_DLL_EXPORT void * DPI_nco_reset(void* objhandle,real_T fcw,real_T ptw,real_T clr,real_T acc,real_T * my_c,real_T * my_s,real_T * acc_o); +DPI_LINK_DECL +DPI_DLL_EXPORT void DPI_nco(void* objhandle,real_T fcw,real_T ptw,real_T clr,real_T acc,real_T * my_c,real_T * my_s,real_T * acc_o); +DPI_LINK_DECL +DPI_DLL_EXPORT void DPI_nco_terminate(void* existhandle); +#endif diff --git a/nco_dpi/codegen/dll/nco_model/nco_dpi.o b/nco_dpi/codegen/dll/nco_model/nco_dpi.o new file mode 100644 index 0000000..be84a64 Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/nco_dpi.o differ diff --git a/nco_dpi/codegen/dll/nco_model/nco_dpi.sv b/nco_dpi/codegen/dll/nco_model/nco_dpi.sv new file mode 100644 index 0000000..fe02359 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco_dpi.sv @@ -0,0 +1,54 @@ +// File: C:\Users\Administrator\Desktop\gc_awg\demod_algorithm\daq_matlab\codegen\dll\nco\nco_dpi.sv +// Created: 2025-04-09 02:18:36 +// Generated by MATLAB 24.1 and HDL Verifier 24.1 + +`timescale 1ns / 1ns + +import nco_dpi_pkg::*; + + + +module nco_dpi( + input bit clk, + input bit clk_enable, + input bit reset, + input real fcw, + input real ptw, + input real clr, + input real acc, + output real my_c, + output real my_s, + output real acc_o +); + + chandle objhandle=null; + real my_c_temp; + real my_s_temp; + real acc_o_temp; + + + initial begin + objhandle=DPI_nco_initialize(objhandle); + end + + final begin + DPI_nco_terminate(objhandle); + end + + always @(posedge clk or posedge reset) begin + if(reset== 1'b1) begin + objhandle=DPI_nco_reset(objhandle,fcw,ptw,clr,acc,my_c_temp,my_s_temp,acc_o_temp); + my_c<=my_c_temp; + my_s<=my_s_temp; + acc_o<=acc_o_temp; + + end + else if(clk_enable) begin + DPI_nco(objhandle,fcw,ptw,clr,acc,my_c_temp,my_s_temp,acc_o_temp); + my_c<=my_c_temp; + my_s<=my_s_temp; + acc_o<=acc_o_temp; + + end + end +endmodule diff --git a/nco_dpi/codegen/dll/nco_model/nco_dpi_pkg.sv b/nco_dpi/codegen/dll/nco_model/nco_dpi_pkg.sv new file mode 100644 index 0000000..ffc4595 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco_dpi_pkg.sv @@ -0,0 +1,17 @@ +// File: C:\Users\Administrator\Desktop\gc_awg\demod_algorithm\daq_matlab\codegen\dll\nco\nco_dpi_pkg.sv +// Created: 2025-04-09 02:18:36 +// Generated by MATLAB 24.1 and HDL Verifier 24.1 + +`timescale 1ns / 1ns +package nco_dpi_pkg; + + +// Declare imported C functions +import "DPI-C" function chandle DPI_nco_initialize(input chandle existhandle); +import "DPI-C" function chandle DPI_nco_reset(input chandle objhandle,input real fcw,input real ptw,input real clr,input real acc,output real my_c,output real my_s,output real acc_o); +import "DPI-C" function void DPI_nco(input chandle objhandle,input real fcw,input real ptw,input real clr,input real acc,output real my_c,output real my_s,output real acc_o); +import "DPI-C" function void DPI_nco_terminate(input chandle existhandle); + + + +endpackage : nco_dpi_pkg diff --git a/nco_dpi/codegen/dll/nco_model/nco_types.h b/nco_dpi/codegen/dll/nco_model/nco_types.h new file mode 100644 index 0000000..43fa5e9 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/nco_types.h @@ -0,0 +1,22 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: nco_types.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef NCO_TYPES_H +#define NCO_TYPES_H + +/* Include Files */ +#include "rtwtypes.h" + +#endif +/* + * File trailer for nco_types.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetInf.c b/nco_dpi/codegen/dll/nco_model/rtGetInf.c new file mode 100644 index 0000000..b36ff63 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtGetInf.c @@ -0,0 +1,130 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rtGetInf.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* + * Abstract: + * MATLAB for code generation function to initialize non-finite, Inf and + * MinusInf + */ +/* Include Files */ +#include "rtGetInf.h" +#include "rt_nonfinite.h" + +/* + * Function: rtGetInf + * ================================================================== Abstract: + * Initialize rtInf needed by the generated code. + */ +real_T rtGetInf(void) +{ + real_T inf = 0.0; + uint16_T one = 1U; + enum + { + LittleEndian, + BigEndian + } machByteOrder = (*((uint8_T *)&one) == 1U) ? LittleEndian : BigEndian; + switch (machByteOrder) { + case LittleEndian: { + union { + LittleEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0x7FF00000U; + tmpVal.bitVal.words.wordL = 0x00000000U; + inf = tmpVal.fltVal; + break; + } + case BigEndian: { + union { + BigEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0x7FF00000U; + tmpVal.bitVal.words.wordL = 0x00000000U; + inf = tmpVal.fltVal; + break; + } + } + return inf; +} + +/* + * Function: rtGetInfF + * ================================================================= Abstract: + * Initialize rtInfF needed by the generated code. + */ +real32_T rtGetInfF(void) +{ + IEEESingle infF; + infF.wordL.wordLuint = 0x7F800000U; + return infF.wordL.wordLreal; +} + +/* + * Function: rtGetMinusInf + * ============================================================= Abstract: + * Initialize rtMinusInf needed by the generated code. + */ +real_T rtGetMinusInf(void) +{ + real_T minf = 0.0; + uint16_T one = 1U; + enum + { + LittleEndian, + BigEndian + } machByteOrder = (*((uint8_T *)&one) == 1U) ? LittleEndian : BigEndian; + switch (machByteOrder) { + case LittleEndian: { + union { + LittleEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0xFFF00000U; + tmpVal.bitVal.words.wordL = 0x00000000U; + minf = tmpVal.fltVal; + break; + } + case BigEndian: { + union { + BigEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0xFFF00000U; + tmpVal.bitVal.words.wordL = 0x00000000U; + minf = tmpVal.fltVal; + break; + } + } + return minf; +} + +/* + * Function: rtGetMinusInfF + * ============================================================ Abstract: + * Initialize rtMinusInfF needed by the generated code. + */ +real32_T rtGetMinusInfF(void) +{ + IEEESingle minfF; + minfF.wordL.wordLuint = 0xFF800000U; + return minfF.wordL.wordLreal; +} + +/* + * File trailer for rtGetInf.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetInf.h b/nco_dpi/codegen/dll/nco_model/rtGetInf.h new file mode 100644 index 0000000..f41d835 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtGetInf.h @@ -0,0 +1,34 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rtGetInf.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef RTGETINF_H +#define RTGETINF_H + +/* Include Files */ +#include "rtwtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +extern real_T rtGetInf(void); +extern real32_T rtGetInfF(void); +extern real_T rtGetMinusInf(void); +extern real32_T rtGetMinusInfF(void); + +#ifdef __cplusplus +} +#endif +#endif +/* + * File trailer for rtGetInf.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetInf.o b/nco_dpi/codegen/dll/nco_model/rtGetInf.o new file mode 100644 index 0000000..1c8562e Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/rtGetInf.o differ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetNaN.c b/nco_dpi/codegen/dll/nco_model/rtGetNaN.c new file mode 100644 index 0000000..0e37a6c --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtGetNaN.c @@ -0,0 +1,97 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rtGetNaN.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* + * Abstract: + * MATLAB for code generation function to initialize non-finite, NaN + */ +/* Include Files */ +#include "rtGetNaN.h" +#include "rt_nonfinite.h" + +/* + * Function: rtGetNaN + * ====================================================================== + * Abstract: + * Initialize rtNaN needed by the generated code. + * NaN is initialized as non-signaling. Assumes IEEE. + */ +real_T rtGetNaN(void) +{ + real_T nan = 0.0; + uint16_T one = 1U; + enum + { + LittleEndian, + BigEndian + } machByteOrder = (*((uint8_T *)&one) == 1U) ? LittleEndian : BigEndian; + switch (machByteOrder) { + case LittleEndian: { + union { + LittleEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0xFFF80000U; + tmpVal.bitVal.words.wordL = 0x00000000U; + nan = tmpVal.fltVal; + break; + } + case BigEndian: { + union { + BigEndianIEEEDouble bitVal; + real_T fltVal; + } tmpVal; + + tmpVal.bitVal.words.wordH = 0x7FFFFFFFU; + tmpVal.bitVal.words.wordL = 0xFFFFFFFFU; + nan = tmpVal.fltVal; + break; + } + } + return nan; +} + +/* + * Function: rtGetNaNF + * ===================================================================== + * Abstract: + * Initialize rtNaNF needed by the generated code. + * NaN is initialized as non-signaling. Assumes IEEE + */ +real32_T rtGetNaNF(void) +{ + IEEESingle nanF = {{0}}; + uint16_T one = 1U; + enum + { + LittleEndian, + BigEndian + } machByteOrder = (*((uint8_T *)&one) == 1U) ? LittleEndian : BigEndian; + switch (machByteOrder) { + case LittleEndian: { + nanF.wordL.wordLuint = 0xFFC00000U; + break; + } + + case BigEndian: { + nanF.wordL.wordLuint = 0x7FFFFFFFU; + break; + } + } + + return nanF.wordL.wordLreal; +} + +/* + * File trailer for rtGetNaN.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetNaN.h b/nco_dpi/codegen/dll/nco_model/rtGetNaN.h new file mode 100644 index 0000000..2010578 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtGetNaN.h @@ -0,0 +1,32 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rtGetNaN.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef RTGETNAN_H +#define RTGETNAN_H + +/* Include Files */ +#include "rtwtypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +extern real_T rtGetNaN(void); +extern real32_T rtGetNaNF(void); + +#ifdef __cplusplus +} +#endif +#endif +/* + * File trailer for rtGetNaN.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rtGetNaN.o b/nco_dpi/codegen/dll/nco_model/rtGetNaN.o new file mode 100644 index 0000000..18b663e Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/rtGetNaN.o differ diff --git a/nco_dpi/codegen/dll/nco_model/rt_nonfinite.c b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.c new file mode 100644 index 0000000..3d7453b --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.c @@ -0,0 +1,87 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rt_nonfinite.c + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +/* + * Abstract: + * MATLAB for code generation function to initialize non-finites, + * (Inf, NaN and -Inf). + */ +/* Include Files */ +#include "rt_nonfinite.h" +#include "rtGetInf.h" +#include "rtGetNaN.h" + +real_T rtInf; +real_T rtMinusInf; +real_T rtNaN; +real32_T rtInfF; +real32_T rtMinusInfF; +real32_T rtNaNF; + +/* + * Function: rt_InitInfAndNaN ================================================== + * Abstract: + * Initialize the rtInf, rtMinusInf, and rtNaN needed by the + * generated code. NaN is initialized as non-signaling. Assumes IEEE. + */ +void rt_InitInfAndNaN(void) +{ + rtNaN = rtGetNaN(); + rtNaNF = rtGetNaNF(); + rtInf = rtGetInf(); + rtInfF = rtGetInfF(); + rtMinusInf = rtGetMinusInf(); + rtMinusInfF = rtGetMinusInfF(); +} +/* + * Function: rtIsInf ================================================== + * Abstract: + * Test if value is infinite + */ +boolean_T rtIsInf(real_T value) +{ + return ((value == rtInf || value == rtMinusInf) ? true : false); +} + +/* + * Function: rtIsInfF ================================================= + * Abstract: + * Test if single-precision value is infinite + */ +boolean_T rtIsInfF(real32_T value) +{ + return ((value == rtInfF || value == rtMinusInfF) ? true : false); +} + +/* + * Function: rtIsNaN ================================================== + * Abstract: + * Test if value is not a number + */ +boolean_T rtIsNaN(real_T value) +{ + return ((value != value) ? true : false); +} + +/* + * Function: rtIsNaNF ================================================= + * Abstract: + * Test if single-precision value is not a number + */ +boolean_T rtIsNaNF(real32_T value) +{ + return ((value != value) ? true : false); +} + +/* + * File trailer for rt_nonfinite.c + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rt_nonfinite.h b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.h new file mode 100644 index 0000000..52c22e4 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.h @@ -0,0 +1,64 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rt_nonfinite.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef RT_NONFINITE_H +#define RT_NONFINITE_H + +/* Include Files */ +#include "rtwtypes.h" + +typedef struct { + struct { + uint32_T wordH; + uint32_T wordL; + } words; +} BigEndianIEEEDouble; + +typedef struct { + struct { + uint32_T wordL; + uint32_T wordH; + } words; +} LittleEndianIEEEDouble; + +typedef struct { + union { + real32_T wordLreal; + uint32_T wordLuint; + } wordL; +} IEEESingle; + +#ifdef __cplusplus +extern "C" { +#endif + +extern real_T rtInf; +extern real_T rtMinusInf; +extern real_T rtNaN; +extern real32_T rtInfF; +extern real32_T rtMinusInfF; +extern real32_T rtNaNF; + +extern void rt_InitInfAndNaN(void); + +extern boolean_T rtIsInf(real_T value); +extern boolean_T rtIsInfF(real32_T value); +extern boolean_T rtIsNaN(real_T value); +extern boolean_T rtIsNaNF(real32_T value); + +#ifdef __cplusplus +} +#endif +#endif +/* + * File trailer for rt_nonfinite.h + * + * [EOF] + */ diff --git a/nco_dpi/codegen/dll/nco_model/rt_nonfinite.o b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.o new file mode 100644 index 0000000..dc0528a Binary files /dev/null and b/nco_dpi/codegen/dll/nco_model/rt_nonfinite.o differ diff --git a/nco_dpi/codegen/dll/nco_model/rtw_proj.tmw b/nco_dpi/codegen/dll/nco_model/rtw_proj.tmw new file mode 100644 index 0000000..a446523 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtw_proj.tmw @@ -0,0 +1 @@ +Code generation project for nco using toolchain "LCC-win64 v2.4.1 | gmake (64-bit Windows)". MATLAB root = D:\matlab2024a. diff --git a/nco_dpi/codegen/dll/nco_model/rtwtypes.h b/nco_dpi/codegen/dll/nco_model/rtwtypes.h new file mode 100644 index 0000000..5a795b9 --- /dev/null +++ b/nco_dpi/codegen/dll/nco_model/rtwtypes.h @@ -0,0 +1,166 @@ +/* + * Academic License - for use in teaching, academic research, and meeting + * course requirements at degree granting institutions only. Not for + * government, commercial, or other organizational use. + * File: rtwtypes.h + * + * MATLAB Coder version : 24.1 + * C/C++ source code generated on : 2025-04-09 02:18:34 + */ + +#ifndef RTWTYPES_H +#define RTWTYPES_H + +/* Include Files */ + +#ifdef __cplusplus +extern "C" { +#endif + +/*=======================================================================* + * Target hardware information +* Device type: Generic->MATLAB Host Computer +* Number of bits: char: 8 short: 16 int: 32 +* long: 32 long long: 64 + +* native word size: 64 +* Byte ordering: LittleEndian +* Signed integer division rounds to: Zero +* Shift right on a signed integer as arithmetic shift: on +*=======================================================================*/ + +/*=======================================================================* + * Fixed width word size data types: * + * int8_T, int16_T, int32_T - signed 8, 16, or 32 bit integers * + * uint8_T, uint16_T, uint32_T - unsigned 8, 16, or 32 bit integers * + * real32_T, real64_T - 32 and 64 bit floating point numbers * + *=======================================================================*/ +typedef signed char int8_T; +typedef unsigned char uint8_T; +typedef short int16_T; +typedef unsigned short uint16_T; +typedef int int32_T; +typedef unsigned int uint32_T; +typedef long long int64_T; +typedef unsigned long long uint64_T; +typedef float real32_T; +typedef double real64_T; + +/*===========================================================================* + * Generic type definitions: real_T, time_T, boolean_T, int_T, uint_T, * + * ulong_T, ulonglong_T, char_T and byte_T. * + *===========================================================================*/ + +typedef double real_T; +typedef double time_T; +typedef unsigned char boolean_T; +typedef int int_T; +typedef unsigned int uint_T; +typedef unsigned long ulong_T; +typedef unsigned long long ulonglong_T; +typedef char char_T; +typedef char_T byte_T; + +/*===========================================================================* + * Complex number type definitions * + *===========================================================================*/ +#define CREAL_T + +typedef struct { + real32_T re; + real32_T im; +} creal32_T; + +typedef struct { + real64_T re; + real64_T im; +} creal64_T; + +typedef struct { + real_T re; + real_T im; +} creal_T; + +typedef struct { + int8_T re; + int8_T im; +} cint8_T; + +typedef struct { + uint8_T re; + uint8_T im; +} cuint8_T; + +typedef struct { + int16_T re; + int16_T im; +} cint16_T; + +typedef struct { + uint16_T re; + uint16_T im; +} cuint16_T; + +typedef struct { + int32_T re; + int32_T im; +} cint32_T; + +typedef struct { + uint32_T re; + uint32_T im; +} cuint32_T; + +typedef struct { + int64_T re; + int64_T im; +} cint64_T; + +typedef struct { + uint64_T re; + uint64_T im; +} cuint64_T; + +/*=======================================================================* + * Min and Max: * + * int8_T, int16_T, int32_T - signed 8, 16, or 32 bit integers * + * uint8_T, uint16_T, uint32_T - unsigned 8, 16, or 32 bit integers * + *=======================================================================*/ + +#define MAX_int8_T ((int8_T)(127)) +#define MIN_int8_T ((int8_T)(-128)) +#define MAX_uint8_T ((uint8_T)(255)) +#define MIN_uint8_T ((uint8_T)(0)) +#define MAX_int16_T ((int16_T)(32767)) +#define MIN_int16_T ((int16_T)(-32768)) +#define MAX_uint16_T ((uint16_T)(65535)) +#define MIN_uint16_T ((uint16_T)(0)) +#define MAX_int32_T ((int32_T)(2147483647)) +#define MIN_int32_T ((int32_T)(-2147483647 - 1)) +#define MAX_uint32_T ((uint32_T)(0xFFFFFFFFU)) +#define MIN_uint32_T ((uint32_T)(0)) +#define MAX_int64_T ((int64_T)(9223372036854775807LL)) +#define MIN_int64_T ((int64_T)(-9223372036854775807LL - 1LL)) +#define MAX_uint64_T ((uint64_T)(0xFFFFFFFFFFFFFFFFULL)) +#define MIN_uint64_T ((uint64_T)(0ULL)) + +/* Logical type definitions */ +#if (!defined(__cplusplus)) && (!defined(__true_false_are_keywords)) && \ + (!defined(__bool_true_false_are_defined)) +#ifndef false +#define false 0U +#endif +#ifndef true +#define true 1U +#endif +#endif + +#ifdef __cplusplus +} +#endif +#endif +/* + * File trailer for rtwtypes.h + * + * [EOF] + */ diff --git a/nco_dpi/nco.m b/nco_dpi/nco.m index e442d77..ca7b0cb 100644 --- a/nco_dpi/nco.m +++ b/nco_dpi/nco.m @@ -1,81 +1,82 @@ -function result=nco(fcw,ptw,clr,acc) - - acc_o = (clr==0)*mod((acc+fcw),2^48); - - % res = coef(); - % pha = round(acc_o/2^29) + ptw*2^3; - % qua = floor(mod(pha/2^16,8)); - % seg = floor(mod((pha/2^11),32)); - % segp = seg + 1; - % segn = 32 - seg; - % pha = mod(pha,2^11); - % - %c2_list_hex=["3ffff","3ffb1","3fec4","3fd3a","3fb12","3f84d","3f4eb","3f0ed","3ec53","3e71e","3e150","3dae8","3d3e8","3cc51","3c424","3bb62","3b20d","3a827","39daf","392a9",... - % "38716","37af8","36e50","36121","3536d","34535","3367c","32744","31790","30762","2f6bc","2e5a1"]; - - - - - c0_list=[262143,262065, 261828, 261434, 260882, 260173, 259307, 258285, 257107, 255774, 254288, 252648, 250856, 248913,... - 246820, 244578, 242189, 239655, 236975, 234153, 231190, 228088, 224848, 221473, 217965, 214325, 210556, 206660, 202640, 198498, 194236, 189857]; - c1_list=[0, 79, 158, 237, 315, 394, 472, 550, 628, 705, 782, 858, 934,1009,1084,1158,1231,1304,1376,1446,1517,1586,... - 1654,1721,1787,1852,1916,1979,2041,2101,2161,2218]; - c2_list=[39,39,39,39,39,39,39,39,39,38,38,38,38,37,37,37,36,36,35,35,35,34,34,33,33,32,31,31,30,30,29,28]; - - s0_list=[0,6433,12863,19284,25695,32089,38464,44817,51142,57436,63696,69917,76096,82230,88314,94344,100318,106232,112081,117863,123574,129210,134769,... - 140246,145639,150945,156159,161279,166302,171225,176045,180759]; - s1_list=[3217,3216,3213,3208,3202,3193,3182,3170,3155,3139,3121,3101,3079,3055,3029,3002,2972,2941,2908,2874,2837,2799,2759,2718,2675,2630,2584,2536,2487,2436,2384,2330]; - s2_list=[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,16,17,18,19,20,21,22,22,23,24,25,25,26,27,28]; - - res_cos = [c2_list',c1_list',c0_list']; - res_sin = [s2_list',s1_list',s0_list']; - - pha = round((clr==0)*acc/2^29) + ptw*2^3; - qua = floor(mod(pha/2^16,8)); - longp = mod(pha,2^16); - longn = 2^16-1 - longp; - segp = floor(mod((longp/2^11),32)) + 1; - segn = floor(mod((longn/2^11),32)) + 1; - pha_p = mod(longp,2^11); - pha_n = mod(longn,2^11); - - cp = round((round((round(res_cos(segp,1)*pha_p/2^11) + res_cos(segp,2))*pha_p/2^10) + res_cos(segp,3))/2^3); - sp = round((round((round(res_sin(segp,1)*pha_p/2^11) + res_sin(segp,2))*pha_p/2^10) + res_sin(segp,3))/2^3); - cn = round((round((round(res_cos(segn,1)*pha_n/2^11) + res_cos(segn,2))*pha_n/2^10) + res_cos(segn,3))/2^3); - sn = round((round((round(res_sin(segn,1)*pha_n/2^11) + res_sin(segn,2))*pha_n/2^10) + res_sin(segn,3))/2^3); - - switch qua - case 0 - my_c = cp; - my_s = sp; - case 1 - my_c = sn; - my_s = cn; - case 2 - my_c = -sp; - my_s = cp; - case 3 - my_c = -cn; - my_s = sn; - case 4 - my_c = -cp; - my_s = -sp; - case 5 - my_c = -sn; - my_s = -cn; - case 6 - my_c = sp; - my_s = -cp; - case 7 - my_c = cn; - my_s = -sn; - otherwise - my_c = 0; - my_s = 0; - end - - result.cos = my_c; - result.sin = my_s; - result.acc = acc_o; - %result.pha = round(acc/2^29 + ptw*2^3); -end \ No newline at end of file +function result=nco(fcw,ptw,clr,acc) + + acc_o = (clr==0)*mod((acc+fcw),2^48); + + % res = coef(); + % pha = round(acc_o/2^29) + ptw*2^3; + % qua = floor(mod(pha/2^16,8)); + % seg = floor(mod((pha/2^11),32)); + % segp = seg + 1; + % segn = 32 - seg; + % pha = mod(pha,2^11); + % + %c2_list_hex=["3ffff","3ffb1","3fec4","3fd3a","3fb12","3f84d","3f4eb","3f0ed","3ec53","3e71e","3e150","3dae8","3d3e8","3cc51","3c424","3bb62","3b20d","3a827","39daf","392a9",... + % "38716","37af8","36e50","36121","3536d","34535","3367c","32744","31790","30762","2f6bc","2e5a1"]; + + + + + c0_list=[262143,262065, 261828, 261434, 260882, 260173, 259307, 258285, 257107, 255774, 254288, 252648, 250856, 248913,... + 246820, 244578, 242189, 239655, 236975, 234153, 231190, 228088, 224848, 221473, 217965, 214325, 210556, 206660, 202640, 198498, 194236, 189857]; + c1_list=[0, 79, 158, 237, 315, 394, 472, 550, 628, 705, 782, 858, 934,1009,1084,1158,1231,1304,1376,1446,1517,1586,... + 1654,1721,1787,1852,1916,1979,2041,2101,2161,2218]; + c2_list=[39,39,39,39,39,39,39,39,39,38,38,38,38,37,37,37,36,36,35,35,35,34,34,33,33,32,31,31,30,30,29,28]; + + s0_list=[0,6433,12863,19284,25695,32089,38464,44817,51142,57436,63696,69917,76096,82230,88314,94344,100318,106232,112081,117863,123574,129210,134769,... + 140246,145639,150945,156159,161279,166302,171225,176045,180759]; + s1_list=[3217,3216,3213,3208,3202,3193,3182,3170,3155,3139,3121,3101,3079,3055,3029,3002,2972,2941,2908,2874,2837,2799,2759,2718,2675,2630,2584,2536,2487,2436,2384,2330]; + s2_list=[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,16,17,18,19,20,21,22,22,23,24,25,25,26,27,28]; + + res_cos = [c2_list',c1_list',c0_list']; + res_sin = [s2_list',s1_list',s0_list']; + + pha = round((clr==0)*acc/2^29) + ptw*2^3; + qua = floor(mod(pha/2^16,8)); + longp = mod(pha,2^16); + longn = 2^16-1 - longp; + segp = floor(mod((longp/2^11),32)) + 1; + segn = floor(mod((longn/2^11),32)) + 1; + pha_p = mod(longp,2^11); + pha_n = mod(longn,2^11); + + cp = round( ( res_cos(segp,3) - round( ((round(res_cos(segp,1)*pha_p/2^11) + res_cos(segp,2)) *pha_p/2^10) ))/2^3); + cn = round( ( res_cos(segn,3) - round( ((round(res_cos(segn,1)*pha_n/2^11) + res_cos(segn,2)) *pha_n/2^10) ))/2^3); + + sp = round( ( res_sin(segp,3) + round( ((res_sin(segp,2) - round(res_sin(segp,1)*pha_p/2^11)) *pha_p/2^10) ))/2^3); + sn = round( ( res_sin(segn,3) + round( ((res_sin(segn,2) - round(res_sin(segn,1)*pha_n/2^11)) *pha_n/2^10) ))/2^3); + + switch qua + case 0 + my_c = cp; + my_s = sp; + case 1 + my_c = sn; + my_s = cn; + case 2 + my_c = -sp; + my_s = cp; + case 3 + my_c = -cn; + my_s = sn; + case 4 + my_c = -cp; + my_s = -sp; + case 5 + my_c = -sn; + my_s = -cn; + case 6 + my_c = sp; + my_s = -cp; + case 7 + my_c = cn; + my_s = -sn; + otherwise + my_c = 0; + my_s = 0; + end + + result.cos = my_c; + result.sin = my_s; + result.acc = acc_o; + %result.pha = round(acc/2^29 + ptw*2^3); +end diff --git a/readout_awg_rm.sv b/readout_awg_rm.sv index 7aad31a..a10dd56 100644 --- a/readout_awg_rm.sv +++ b/readout_awg_rm.sv @@ -2,89 +2,96 @@ //FILE_NAME : readout_awg_rm.sv //DEPARTEMENT : QuantumCTek-ASIC //AUTHOR : Yunzhuo Zhang -//TIME : 2024.10.21 +//TIME : 2025.4.10 //******************************************************************* //DESCRIPTION : awg reference model define //******************************************************************* //END_HEADER********************************************************* -//问题待解决：数据类型定义 -//pulsewidth信号定义在mcu_reg中 - -`ifdef READOUT_AWG_RM +`ifndef READOUT_AWG_RM `define READOUT_AWG_RM -//import uvm_pkg::*; +`include "../testbench/refm/mcu_cw_item.sv" +`include "../testbench/refm/nco_dpi/codegen/dll/nco_model/nco_dpi_pkg.sv" +`include "../testbench/refm/hilbert_dpi/codegen/dll/hilbert_fir/hilbert_fir_dpi_pkg.sv" + import nco_dpi_pkg::*; import hilbert_fir_dpi_pkg::*; class readout_awg_rm extends uvm_component; - virtual rm_if rm_if; //clk和sync - - uvm_blocking_get_export #(EZQ_readout_dac_item) dac_rm2scb_port; //wave输出给scoreboard - uvm_blocking_get_port #(mcu_item) mcu_get_port; //从mcu获取带时间戳的包，包含cw，time - - EZQ_readout_dac_item dac_item_pkt; - mcu_item mcu_item_pkt; - `uvm_component_utils(readout_awg_rm); + virtual rm_if rm_if; //sync - static int NUM_WAY = 8; - static int DATA_WIDTH = 16; + uvm_analysis_port #(EZQ_readout_dac_item) dac_rm2scb_port; + uvm_blocking_get_port #(mcu_cw_item) mcu_get_port; + + bit [31:0] mcu_timer ; + bit [31:0] mcu_counter ; + bit [31:0] loc_state ; + bit [31:0] glb_state ; + bit [31:0] feed_data ; + bit [31:0] wave_ctrl ; + bit [31:0] amplitude ; + bit [31:0] frequency ; + bit [31:0] phase ; + bit [31:0] command ; + bit [31:0] func_ctrl ; + bit [31:0] pump_ctrl ; + bit [31:0] mark_ctrl ; + + bit [31:0] cw_data ; + bit cw_valid ; + mcu_cw_item cw_queue[$] ; + bit [31:0] clock_cycle ; + bit [31:0] awg_clock_cycle ; + bit [15:0] env_len ; + + + + + + bit [31:0] ram_data[bit[31:0]]; + bit [31:0] wr_data ; + bit [31:0] wr_addr ; + + bit [31:0] dac_send_cnt ; + + bit [15:0]data_out_0[$]; + bit [15:0]data_out_1[$]; + bit [15:0]data_out_2[$]; + bit [15:0]data_out_3[$]; + bit [15:0]data_out_4[$]; + bit [15:0]data_out_5[$]; + bit [15:0]data_out_6[$]; + bit [15:0]data_out_7[$]; + bit [15:0]data_outb_0[$]; + bit [15:0]data_outb_1[$]; + bit [15:0]data_outb_2[$]; + bit [15:0]data_outb_3[$]; + bit [15:0]data_outb_4[$]; + bit [15:0]data_outb_5[$]; + bit [15:0]data_outb_6[$]; + bit [15:0]data_outb_7[$]; + + + extern function new(string name,uvm_component parent); extern function void build_phase(uvm_phase phase); extern virtual task run_phase(uvm_phase phase); - extern task wave_play( //根据cw获取波形数据 - logic [5:0] wave_id, - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mem_out[$], - logic [15:0] wave_len; - - logic [15:0]time_in, - logic [15:0]time_out - ); - - extern task wave_mode( //awg算法 - logic clr_valid, //sync - logic clr_en, //cw_data[6] - logic [1 :0] mod_mode, //func_ctrl[1:0] - logic [31:0] fcw, - logic [15:0] phase, //phase[31:16] - - logic [DATA_WIDTH*NUM_WAY-1:0] wave_in, - logic [DATA_WIDTH-1:0] wave_mod_out[NUM_WAY], - - logic [15:0]time_in, - logic [15:0]time_out - ); - - extern task wave_amp( - logic [15:0] amplitude, //amp[31:16] - logic [DATA_WIDTH-1:0] wave_amp_in[NUM_WAY], - logic [DATA_WIDTH-1:0] wave_amp_out[NUM_WAY], - logic [15:0]time_in, - logic [15:0]time_out - ); - - extern task wave_mix( - logic mix_en , //~func_ctrl[2] - logic [DATA_WIDTH-1:0] wave_in[NUM_WAY], - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mix_out, - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mix_outb, - logic [15:0]time_in, - logic [15:0]time_out - ); -/* - extern task pulse_generator_pump( - logic pulse_en , - logic [15:0] delay, - logic [31:0] width, - logic inv_en , - logic [15:0] pulse - ); -*/ + extern task get_mcu_cw_item(); + extern task get_spi_item(); + extern task get_config_data(); + extern task send_dac_item(); + extern task awg_exe(); + extern task if_pump_mark(); + extern task hilbert_fir( + input bit signed [15:0] hilbert_in[$], + input bit [15:0] data_size, + output bit signed [15:0] hilbert_out[$] + ); endclass function readout_awg_rm::new(string name,uvm_component parent); @@ -100,347 +107,636 @@ function void readout_awg_rm::build_phase(uvm_phase phase); endfunction -task readout_awg_rm::run_phase(uvm_phase phase);//main task -//cw - logic clk; - logic [31:0] cw_data; - logic sync; -//awg config signal - logic [31:0] mcu_timer, - logic [31:0] mcu_counter, - logic [31:0] pulse_width, +task readout_awg_rm::get_mcu_cw_item(); + mcu_cw_item mcu_cw_item; + forever begin + mcu_get_port.get(mcu_cw_item); + cw_data = mcu_cw_item.cw_data; + cw_valid = mcu_cw_item.cw_valid; + `uvm_info(get_type_name(),$sformatf("awg_mcu_cw_data = %0h,awg_mcu_cycle = %0h,awg_cw_valid = %h",cw_data,mcu_cw_item.clock_cycle,cw_valid),UVM_LOW) - logic [31:0] amplitude, - logic [31:0] frequency, - logic [31:0] phase, + if(cw_valid)begin + clock_cycle = mcu_cw_item.clock_cycle; + cw_queue.push_back(mcu_cw_item); + `uvm_info(get_type_name(),$sformatf("cw_queue_size = %0h",cw_queue.size()),UVM_MEDIUM) + end + end +endtask + +task readout_awg_rm::get_spi_item(); + forever begin + @(wr_data or wr_addr) + ram_data[wr_addr] = wr_data; + `uvm_info(get_type_name(),$sformatf("wr_addr = %0h,wr_data = %0h",wr_addr,wr_data),UVM_LOW) + end +endtask + + +task readout_awg_rm::get_config_data(); + forever begin + @(posedge `CLK); + if(ram_data.exists(`AWG_MCU_TIMER))begin + mcu_timer = ram_data[`AWG_MCU_TIMER]; + end + if(ram_data.exists(`AWG_MCU_COUNTER))begin + mcu_counter = ram_data[`AWG_MCU_COUNTER]; + end + if(ram_data.exists(`AWG_LOC_STATE))begin + loc_state = ram_data[`AWG_LOC_STATE]; + end + if(ram_data.exists(`AWG_GLB_STATE))begin + glb_state = ram_data[`AWG_GLB_STATE]; + end +/* + if(ram_data.exists(`AWG_FEED_DATA))begin + feed_data = ram_data[`AWG_FEED_DATA]; + end +*/ + if(ram_data.exists(`WAVE_CTRL))begin + wave_ctrl = ram_data[`WAVE_CTRL]; + end + if(ram_data.exists(`AMPLITUDE))begin + amplitude = ram_data[`AMPLITUDE]; + end + if(ram_data.exists(`FREQUENCY))begin + frequency = ram_data[`FREQUENCY]; + end + if(ram_data.exists(`PHASE))begin + phase = ram_data[`PHASE]; + end + if(ram_data.exists(`AWG_COMMAND))begin + command = ram_data[`AWG_COMMAND]; + end + if(ram_data.exists(`AWG_FUNC_CTRL))begin + func_ctrl = ram_data[`AWG_FUNC_CTRL]; + end + if(ram_data.exists(`PUMP_CTRL))begin + pump_ctrl = ram_data[`PUMP_CTRL]; + end + else begin + pump_ctrl = 32'h10010; + end + if(ram_data.exists(`MARK_CTRL))begin + mark_ctrl = ram_data[`MARK_CTRL]; + end + else begin + mark_ctrl = 32'h10010; + end + + end +endtask + +task readout_awg_rm::send_dac_item(); + EZQ_readout_dac_item dac_item_pkt; + forever begin + if(data_out_0.size()>`DAC_MON_CYCLE)begin + dac_item_pkt = new(); + + dac_item_pkt.data_out0 = data_out_0[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out1 = data_out_1[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out2 = data_out_2[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out3 = data_out_3[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out4 = data_out_4[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out5 = data_out_5[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out6 = data_out_6[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_out7 = data_out_7[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb0 = data_outb_0[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb1 = data_outb_1[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb2 = data_outb_2[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb3 = data_outb_3[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb4 = data_outb_4[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb5 = data_outb_5[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb6 = data_outb_6[0+: `DAC_MON_CYCLE]; + dac_item_pkt.data_outb7 = data_outb_7[0+: `DAC_MON_CYCLE]; +// dac_item_pkt.delay_cycle = awg_clock_cycle; + + dac_rm2scb_port.write(dac_item_pkt); + + `uvm_info(get_type_name(),$sformatf("dac_send_cnt = %0h",dac_send_cnt),UVM_LOW) + + `uvm_info(get_type_name(),$sformatf("data_out_0[0+: `DAC_MON_CYCLE] = %0p",data_out_0[0+: `DAC_MON_CYCLE]),UVM_LOW) +/* + `uvm_info(get_type_name(),$sformatf("data_out_1 = %0p",data_out_1),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_2 = %0p",data_out_2),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_3 = %0p",data_out_3),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_4 = %0p",data_out_4),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_5 = %0p",data_out_5),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_6 = %0p",data_out_6),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_out_7 = %0p",data_out_7),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_0 = %0p",data_outb_0),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_1 = %0p",data_outb_1),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_2 = %0p",data_outb_2),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_3 = %0p",data_outb_3),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_4 = %0p",data_outb_4),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_5 = %0p",data_outb_5),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_6 = %0p",data_outb_6),UVM_LOW + `uvm_info(get_type_name(),$sformatf("data_outb_7 = %0p",data_outb_7),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("data_outb_7 = %0p",data_outb_7),UVM_LOW) +*/ + data_out_0 = data_out_0[`DAC_MON_CYCLE : $]; + data_out_1 = data_out_1[`DAC_MON_CYCLE : $]; + data_out_2 = data_out_2[`DAC_MON_CYCLE : $]; + data_out_3 = data_out_3[`DAC_MON_CYCLE : $]; + data_out_4 = data_out_4[`DAC_MON_CYCLE : $]; + data_out_5 = data_out_5[`DAC_MON_CYCLE : $]; + data_out_6 = data_out_6[`DAC_MON_CYCLE : $]; + data_out_7 = data_out_7[`DAC_MON_CYCLE : $]; + data_outb_0 = data_outb_0[`DAC_MON_CYCLE : $]; + data_outb_1 = data_outb_1[`DAC_MON_CYCLE : $]; + data_outb_2 = data_outb_2[`DAC_MON_CYCLE : $]; + data_outb_3 = data_outb_3[`DAC_MON_CYCLE : $]; + data_outb_4 = data_outb_4[`DAC_MON_CYCLE : $]; + data_outb_5 = data_outb_5[`DAC_MON_CYCLE : $]; + data_outb_6 = data_outb_6[`DAC_MON_CYCLE : $]; + data_outb_7 = data_outb_7[`DAC_MON_CYCLE : $]; + + dac_send_cnt++; + end + @(posedge `CLK); + end + +endtask + +task readout_awg_rm::awg_exe(); +//fid + chandle objhandle = null ; + chandle OBJhandle = null ; + bit [31:0] zeros_len; - logic [31:0] loc_state, - logic [31:0] glb_state, - logic [31:0] feed_data, -//control signal - logic [31:0] command; - logic [31:0] func_ctrl; - logic [31:0] pump_ctrl; - logic [31:0] mark_ctrl; //get wave_idx & wave - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mem_out[$]; + bit [5 :0] wave_id ; + bit [24:0] env_map_addr ; + bit [31:0] env_idx ; + bit [24:0] env_addr ; + bit [24:0] env_addr_1 ; + bit [24:0] env_addr_2 ; + bit [24:0] env_addr_3 ; + + + bit [`NUM_WAY*`DATA_WIDTH-1 :0] wave_out ; + bit [31:0] wave_out_0 ; + bit [31:0] wave_out_1 ; + bit [31:0] wave_out_2 ; + bit [31:0] wave_out_3 ; + + bit [127:0] wave_out_queue[$] ; + int k ; + //wave_mod output signal - logic [DATA_WIDTH-1:0] wave_mod_out[NUM_WAY]; + bit [1 :0] mod_mode ; + bit loc_rst_n ; + bit hilbert_en ; + bit iq_mod_en ; + bit clr_en ; + bit mix_en ; + int j ; + + bit [47:0] frequency_48; + real nco_acc_out ; + real nco_acc_in ; + + bit signed[15:0] nco_cos[`NUM_WAY-1 :0] ; + bit signed[15:0] nco_sin[`NUM_WAY-1 :0] ; + bit signed[15:0] nco_cos_queue[$] ; + bit signed[15:0] nco_sin_queue[$] ; + + bit signed[15:0] hilbert_in[$]; + bit signed[15:0] hilbert_out[$]; + + bit signed[15:0] iq_mod_data_i_queue[$]; + bit signed[15:0] iq_mod_data_q_queue[$]; + + bit signed[31:0] iq_mod_data_i_temp ; + bit signed[31:0] iq_mod_data_q_temp ; + bit signed[31:0] i_mult_cos; + bit signed[31:0] i_mult_sin; + bit signed[31:0] q_mult_cos; + bit signed[31:0] q_mult_sin; + + bit signed[15:0] iq_mod_data_i[`NUM_WAY-1 :0] ; + bit signed[15:0] iq_mod_data_q[`NUM_WAY-1 :0] ; + + bit signed[15:0] wave_mod_out[$] ; + //wave_amp output siganl - logic [DATA_WIDTH-1:0] wave_amp_out[NUM_WAY]; + bit [31:0] wave_amp_out_temp; + bit [`DATA_WIDTH-1:0] wave_amp_out[`NUM_WAY-1 :0]; //wave_mix output siganl - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mix_out; - logic [DATA_WIDTH*NUM_WAY-1:0] wave_mix_outb; -//wave_out queue - logic [DATA_WIDTH*NUM_WAY-1:0] wave_out_list[$]; - logic [DATA_WIDTH*NUM_WAY-1:0] wave_outb_list[$]; + bit [`DATA_WIDTH-1:0] wave_mix_out[`NUM_WAY-1:0]; + bit [`DATA_WIDTH-1:0] wave_mix_outb[`NUM_WAY-1:0]; //Pump & Mark signal - logic pump_trig; - logic mark_trig; - logic pump_delay; - logic mark_delay; - logic [15:0] pump_width; - logic [15:0] mark_width; -//时间戳，mcu_item_pkt到来时，继承pkt中的时间 - logic [15:0] time_cw; - logic [15:0] time_play; - logic [15:0] time_mode; - logic [15:0] time_amp; - logic [15:0] time_mix; -// sync signal - sync = rm_if.sync; -//MCU packet - mcu_get_port.get(mcu_item_pkt); - time_cw = mcu_item_pkt.clock_cycle; - cw_data = mcu_item_pkt.cw_data; - pulse_width = mcu_item_pkt.pulse_width;//该信号通过MCU的packet传送 +//wait sync signal + `uvm_info(get_type_name(),"awg wait sync_in",UVM_LOW) + wait (`SYNC_IN); + `uvm_info(get_type_name(),"awg sync_in come",UVM_LOW) -//AWG reg - frequency = reg_mems::awg_regfile.get("Frequency"); - phase = reg_mems::awg_regfile.get("Phase"); - amplitude = reg_mems::awg_regfile.get("Amplitude"); - mcu_timer = reg_mems::awg_regfile.get("Timer"); - mcu_counter = reg_mems::awg_regfile.get("Counter"); +forever begin + wait(cw_valid == 1); + `uvm_info(get_type_name(),$sformatf("awg_cw_data = %h,wave_ctrl = %h,func_ctrl = %h",cw_data,wave_ctrl,func_ctrl),UVM_LOW) - loc_state = reg_mems::awg_regfile.get("LOC_State"); - glb_state = reg_mems::awg_regfile.get("GLB_State"); - feed_data = reg_mems::awg_regfile.get("FEED_Data"); +//config signals + mod_mode = func_ctrl[1:0]; + clr_en = cw_data[6]; + loc_rst_n = (mod_mode == 2'b01) | (mod_mode == 2'b11); + hilbert_en = (mod_mode == 2'b01) | (mod_mode == 2'b10); + iq_mod_en = (mod_mode == 2'b01); + mix_en = ~func_ctrl[2]; + `uvm_info(get_type_name(),$sformatf("mod_mode = %h,clr_en = %h",mod_mode,clr_en),UVM_LOW); + `uvm_info(get_type_name(),$sformatf("loc_rst_n = %h,hilbert_en = %h,iq_mod_en = %h",loc_rst_n,hilbert_en,iq_mod_en),UVM_LOW); - func_ctrl = reg_mems::awg_regfile.get("Function"); - command = reg_mems::awg_regfile.get("Command"); - pump_ctrl = reg_mems::awg_regfile.get("pump_ctrl"); - mark_ctrl = reg_mems::awg_regfile.get("maker_ctrl"); +//////////////////////////////////////// +//delay calculator +/////////////////////////////////////// +//wave_play : 3 +//hilbert : 8 +//nco : 11 +//iq_mod+mux: 2 + 1 +//amp : 1 +//mix : 1 +//awg_out to dac_if :3 + awg_clock_cycle = clock_cycle + 3; //wave_play + case(mod_mode) + 2'b00 : awg_clock_cycle = awg_clock_cycle + 2 + 3; //hilbert_in + 2'b01 : awg_clock_cycle = awg_clock_cycle + 8 + 2 + 1 + 2 + 3; //iq_mod + 2'b10 : awg_clock_cycle = awg_clock_cycle + 8 + 1 + 2 + 3; //hilbert_q + 2'b11 : awg_clock_cycle = awg_clock_cycle + 8 + 1 + 2 + 3; //nco_cos + endcase + `uvm_info(get_type_name(),$sformatf("mod_mode = %0h,awg_clock_cycle = %0h",mod_mode,awg_clock_cycle),UVM_LOW); + zeros_len = awg_clock_cycle - data_out_0.size() - dac_send_cnt * `DAC_MON_CYCLE; + `uvm_info(get_type_name(),$sformatf("data_out_0.size() = %0h",data_out_0.size()),UVM_LOW); + + for (int i = 0; i < zeros_len; i++)begin + data_out_0.push_back(16'h8000); + data_out_1.push_back(16'h8000); + data_out_2.push_back(16'h8000); + data_out_3.push_back(16'h8000); + data_out_4.push_back(16'h8000); + data_out_5.push_back(16'h8000); + data_out_6.push_back(16'h8000); + data_out_7.push_back(16'h8000); + + data_outb_0.push_back(16'h8000); + data_outb_1.push_back(16'h8000); + data_outb_2.push_back(16'h8000); + data_outb_3.push_back(16'h8000); + data_outb_4.push_back(16'h8000); + data_outb_5.push_back(16'h8000); + data_outb_6.push_back(16'h8000); + data_outb_7.push_back(16'h8000); + end + `uvm_info(get_type_name(),$sformatf("dac_send_cnt = %0h,zeros_len = %0h,data_out_0.size() = %0h",dac_send_cnt,zeros_len,data_out_0.size()),UVM_LOW); + + +///////////////////////////////////////////// //AWG functions - wave_play( - .wave_id(cw_data[5:0]), - .wave_mem_out(wave_mem_out), - .wave_len(wave_len) - .time_in(time_cw), - .time_out(time_play) - ); +///////////////////////////////////////////// -for(k=0;k32767) iq_mod_data_i[k] = 32767; - if(iq_mod_data_i[k]<-32767) iq_mod_data_i[k] = -32767; - end - - for(k=0;k32767) iq_mod_data_q[k] = 32767; - if(iq_mod_data_q[k]<-32767) iq_mod_data_q[k] = -32767; - end - - foreach (iq_mod_data_i[index]) - $display("iq_mod_data_i is :%b",iq_mod_data_i[index]); //mux case(mod_mode) 2'b00 : wave_mod_out = hilbert_in; - 2'b01 : wave_mod_out = iq_mod_data_i; - 2'b10 : wave_mod_out = hilbert_out_q; - 2'b11 : wave_mod_out = cos_list; + 2'b01 : wave_mod_out = iq_mod_data_i_queue; + 2'b10 : wave_mod_out = hilbert_out; + 2'b11 : wave_mod_out = nco_cos_queue; endcase - -task readout_awg_rm::wave_amp( - logic [15:0] amplitude, //amp[31:16] - logic [DATA_WIDTH-1:0] wave_amp_in[NUM_WAY], - logic [DATA_WIDTH-1:0] wave_amp_out[NUM_WAY], - logic [15:0]time_in, - logic [15:0]time_out -); - time_out = time_in +16'd1; - - logic [DATA_WIDTH*2-1:0]wave_amp_out_temp; - for(k=0;k32767) wave_amp_out[k] = 32767; - if(wave_amp_out[k]<-32767) wave_amp_out[k] = -32767; + `uvm_info(get_type_name(),$sformatf("wave_mod_out = %p,wave_mod_out.size()=%0h",wave_mod_out,wave_mod_out.size()),UVM_LOW); + +//wave_amp,mix + `uvm_info(get_type_name(),$sformatf("AMP = %0h",amplitude[31:16]),UVM_LOW); + for(k =0; k0 && pump_flag == 1 && mark_flag == 1)begin + mcu_cw_item = cw_queue.pop_front(); + wait_cycle = mcu_cw_item.clock_cycle; + cw_data_if = mcu_cw_item.cw_data; + + pump_flag = 1'b0; + mark_flag = 1'b0; + pump_trig = cw_data_if[8]; + mark_trig = cw_data_if[9]; + `uvm_info(get_type_name(),$sformatf("pump_trig = %0h,mark_trig = %0h",pump_trig,mark_trig),UVM_LOW); + `uvm_info(get_type_name(),$sformatf("wait_cycle = %0h,cw_data_if= 0%h",wait_cycle,cw_data_if),UVM_LOW); + + case (func_ctrl[1:0]) + 2'b00 : align_del = 4'h0; + 2'b01 : align_del = 4'ha; + 2'b10 : align_del = 4'h8; + 2'b11 : align_del = 4'h8; + endcase + + pump_delay = pump_ctrl[31:16] + align_del + 2; //compare to cw_valid + pump_width = pump_ctrl[15:0] + env_len; + `uvm_info(get_type_name(),$sformatf("pump_delay = %0h,pump_width = %0h,align_del = %0h",pump_delay,pump_width,align_del),UVM_LOW); + + mark_delay = mark_ctrl[31:16] + 2; //compare to cw_valid + mark_width = mark_ctrl[15:0]; + `uvm_info(get_type_name(),$sformatf("mark_delay = %0h,mark_width = %0h",mark_delay,mark_width),UVM_LOW); + end + + fork + if(cnt == wait_cycle)begin + repeat(pump_delay)begin + rm_if.pump_rm = func_ctrl[4]; + @(posedge `CLK); + end + repeat(pump_width)begin + if(pump_trig)begin + rm_if.pump_rm = ~func_ctrl[4]; + @(posedge `CLK); + end + else begin + rm_if.pump_rm = func_ctrl[4]; + @(posedge `CLK); + end + end + rm_if.pump_rm = 1'b0; + pump_flag = 1; + end +//mark + if(cnt == wait_cycle)begin + repeat(mark_delay)begin + rm_if.mark_rm = func_ctrl[5]; + @(posedge `CLK); + end + repeat(mark_width)begin + if(mark_trig)begin + rm_if.mark_rm = ~func_ctrl[5]; + @(posedge `CLK); + end + else begin + rm_if.mark_rm = func_ctrl[5]; + @(posedge `CLK); + end + end + rm_if.mark_rm = 1'b0; + mark_flag = 1; + end + + if(cnt == wait_cycle)begin + if(pump_delay + pump_width >= mark_delay + mark_width)begin + repeat(pump_delay + pump_width)begin + cnt++; + rm_if.cnt = cnt; + @(posedge `CLK); + end + end + else begin + repeat(mark_delay + mark_width)begin + cnt++; + rm_if.cnt = cnt; + @(posedge `CLK); + end + end + end + join + end +endtask + + +task readout_awg_rm::hilbert_fir( + input bit signed[15:0] hilbert_in[$], + input bit [15:0] data_size, + output bit signed[15:0] hilbert_out[$] +); + localparam COEFF_LEN = 33; + + bit signed [15:0] coeff [0:COEFF_LEN-1] = { + 16'd0, -16'd69, 16'd0, -16'd202, 16'd0, -16'd471, + 16'd0, -16'd950, 16'd0, -16'd1766, 16'd0, -16'd3213, + 16'd0, -16'd6337, 16'd0, -16'd20648, 16'd0, 16'd20648, + 16'd0, 16'd6337, 16'd0, 16'd3213, 16'd0, 16'd1766, + 16'd0, 16'd950, 16'd0, 16'd471, 16'd0, 16'd202, + 16'd0, 16'd69, 16'd0 + }; + bit signed [31:0] acc ; + bit signed [31:0] mul; +//conv + `uvm_info(get_type_name(),$sformatf("hilbert_in_queue = %p",hilbert_in),UVM_LOW); + `uvm_info(get_type_name(),$sformatf("coeff = %p,data_size = %0d",coeff,data_size),UVM_LOW); + + for (int i = 0; i < COEFF_LEN + data_size; i++) begin + for (int j = 0 ; j <= i; j++)begin + mul = coeff[i-j] * hilbert_in[j]; + acc = acc + mul; +// `uvm_info(get_type_name(),$sformatf("coeff[%0d-%0d] = %0d ,hilbert_in[%0d] = %0d",i,j,coeff[i-j],j,hilbert_in[j]),UVM_LOW); + +// `uvm_info(get_type_name(),$sformatf("mul = %0d, mul[31:16] = %0d,acc = %0d",mul,$signed(mul[31:16]),acc),UVM_LOW); + end + + if(acc[31] == 1)begin + if(acc[15:0] == 0)begin + hilbert_out[i] = $floor(acc/32768); + end else begin + hilbert_out[i] = $floor(acc/32768)- 1; + end + end + else begin + hilbert_out[i] = $floor(acc/32768); + end + + // hilbert_out[i] = $floor(acc/32768); + `uvm_info(get_type_name(),$sformatf("acc = %0d ,acc[31:16] = %0d,hilbert_out = %0d",acc,$floor(acc/32768),hilbert_out[i]),UVM_LOW); + acc = 32'b0; + end +`uvm_info(get_type_name(),$sformatf("hilbert_out = %p,hilbert_out.size() = %d",hilbert_out,hilbert_out.size()),UVM_LOW); + + hilbert_out = hilbert_out[16:COEFF_LEN + data_size-18]; +`uvm_info(get_type_name(),$sformatf("hilbert_out = %p,hilbert_out.size() = %d",hilbert_out,hilbert_out.size()),UVM_LOW); + + +endtask + + + +task readout_awg_rm::run_phase(uvm_phase phase); + fork + get_mcu_cw_item(); + get_spi_item(); + get_config_data(); + awg_exe(); + if_pump_mark(); + send_dac_item(); + join +endtask + + + + +`endif diff --git a/readout_daq_rm.sv b/readout_daq_rm.sv index ee1fa2c..4480df1 100644 --- a/readout_daq_rm.sv +++ b/readout_daq_rm.sv @@ -8,71 +8,125 @@ //******************************************************************* //END_HEADER********************************************************* - - `ifndef READOUT_DAQ_RM `define READOUT_DAQ_RM - -//import uvm_pkg::*; -//import +`include "../testbench/refm/mcu_cw_item.sv" +//`include "../testbench/refm/reg_rfm.sv" class readout_daq_rm extends uvm_component; `uvm_component_utils(readout_daq_rm); virtual rm_if rm_if; //sync uvm_blocking_get_port #(EZQ_readout_adc_item) adc_get_port; //get adc wave - uvm_blocking_get_port #(mcu_cw_item) mcu_get_port; //从mcu获取带时间戳的包，包含cw，time - uvm_analysis_port #(spi_item) spi_rm2scb_port; //send spi_item - spi_item spi_item_2scb_queue[$]; - extern function new(string name,uvm_component parent); - extern function void build_phase(uvm_phase phase); - extern virtual task run_phase(uvm_phase phase); + uvm_blocking_get_port #(mcu_cw_item) mcu_get_port; //get cw_data + uvm_analysis_port #(spi_item) spi_rm2scb_port; //send iq_sum, iq_state to scb +// parameter NUM_QUBIT = 1; +// parameter NUM_WAY = 1; + + bit [31:0] ram_data[bit[31:0]]; + bit [31:0] wr_data; + bit [31:0] wr_addr; + + bit [63:0] clock_cycle ; + bit [31:0] cw_data ; + bit cw_valid ; + bit [63:0] adc_wave[$]; + bit [31:0] delay_cycle; + bit [31:0] all_queue[$]; + + + bit [31:0] cw_data_cur; + bit [31:0] clock_cycle_cur; + bit cw_valid_cur; + bit [63:0] adc_wave_cur[$]; + bit [31:0] delay_cycle_cur; + bit [31:0] time_interval; + bit flag; + + + mcu_cw_item cw_queue[$]; + bit [63:0] adc_data_queue[$]; + + bit [31:0] mcu_timer; + bit [31:0] mcu_counter; + bit [31:0] loc_state; + bit [31:0] glb_state; + bit [31:0] feed_data; + bit [31:0] send_data; + bit [31:0] sram_count; + bit [31:0] push_count; + bit [31:0] command; + bit [31:0] func_ctrl; + bit [31:0] sample_depth; + bit [31:0] int_threshold; + bit [31:0] qubit_state; + bit [31:0] read_req_ctrl; + bit [31:0] demod_width [15:0]; + bit [31:0] demod_freq [15:0]; + bit [31:0] count_state_0 [15:0]; + bit [31:0] count_state_1 [15:0]; + bit [31:0] count_state_2 [15:0]; + bit [31:0] count_state_3 [15:0]; + bit [31:0] i_sum [15:0]; + bit [31:0] q_sum [15:0]; + bit [31:0] para_ab0 [15:0]; + bit [31:0] para_ab1 [15:0]; + bit [31:0] para_ab2 [15:0]; + bit [31:0] para_c0 [15:0]; + bit [31:0] para_c1 [15:0]; + bit [31:0] para_c2 [15:0]; + + + extern function new(string name,uvm_component parent); + extern function void build_phase(uvm_phase phase); + extern virtual task run_phase(uvm_phase phase); extern task get_mcu_cw_item(); - extern task get_adc_item(); - extern task daq_exe(ref bit[31:0]cw_data, ref logic[63:0]adc_wave, ref int clock_cycle, ref spi_item_2scb_queue[$]); + extern task get_adc_item(); + extern task get_spi_item(); + extern task get_config_data(); extern task send_spi_item(); - extern task daq_block( - ref logic [31:0]i, - ref logic [31:0]cw_data , - ref logic [31:0]func_ctrl , - ref logic [31:0]demod_freq , - ref logic [31:0]demod_width , - ref logic [31:0]para_ab0 , - ref logic [31:0]para_ab1 , - ref logic [31:0]para_ab2 , - ref logic [31:0]para_c0 , - ref logic [31:0]para_c1 , - ref logic [31:0]para_c2 , - ref logic [1 :0]state_data , - ref logic [31:0]iq_save_en , - ref logic [31:0]i_sum , - ref logic [31:0]q_sum , - ref logic [31:0]count_save_en , - ref logic [31:0]count_state_0 , - ref logic [31:0]count_state_1 , - ref logic [31:0]count_state_2 , - ref logic [31:0]count_state_3 + extern task daq_exe( + ref bit [31:0] mcu_timer, + ref bit [31:0] mcu_counter, + ref bit [31:0] loc_state, + ref bit [31:0] glb_state, + ref bit [31:0] feed_data, + ref bit [31:0] sram_count, + ref bit [31:0] push_count, + ref bit [31:0] qubit_state, + ref bit [31:0] i_sum [15:0], + ref bit [31:0] q_sum [15:0], + ref bit [31:0] count_state_0 [15:0], + ref bit [31:0] count_state_1 [15:0], + ref bit [31:0] count_state_2 [15:0], + ref bit [31:0] count_state_3 [15:0] + ); + extern task daq_block( + + input bit [15:0] i, + input bit demod_valid, + input bit [31:0]demod_freq , + input bit [31:0]demod_width , + input bit [31:0]para_ab0 , + input bit [31:0]para_ab1 , + input bit [31:0]para_ab2 , + input bit [31:0]para_c0 , + input bit [31:0]para_c1 , + input bit [31:0]para_c2 , + ref bit [1 :0]state_data , + ref bit [31:0]i_sum , + ref bit [31:0]q_sum , + ref bit [31:0]count_state_0 , + ref bit [31:0]count_state_1 , + ref bit [31:0]count_state_2 , + ref bit [31:0]count_state_3 ); extern task dds( - ref logic [9 :0] address, - ref logic [7 :0] dds_cos[NUM_WAY-1:0], - ref logic [7 :0] dds_sin[NUM_WAY-1:0] + input bit unsigned[9 :0] address, + output bit signed[7 :0] dds_cos, + output bit signed[7 :0] dds_sin ); - extern task data2sram( - ref logic [31:0] qubit_state , - ref logic [31:0] state0_count [15:0], - ref logic [31:0] state1_count [15:0], - ref logic [31:0] state2_count [15:0], - ref logic [31:0] state3_count [15:0], - ref logic [31:0] i_sum [15:0], - ref logic [31:0] q_sum [15:0] - ); - static int NUM_WAY = 8; - static int NUM_QUBIT = 16; - int clock_cycle ; - bit [31:0] cw_data ; - logic [63:0] adc_wave ; endclass function readout_daq_rm::new(string name,uvm_component parent); @@ -86,409 +140,325 @@ function void readout_daq_rm::build_phase(uvm_phase phase); //create port mcu_get_port = new("mcu_get_port",this); adc_get_port = new("adc_get_port",this); + spi_rm2scb_port = new("spi_rm2scb_port",this); endfunction +//task get_adc_item task readout_daq_rm::get_adc_item(); EZQ_readout_adc_item EZQ_readout_adc_item; forever begin adc_get_port.get(EZQ_readout_adc_item); - adc_wave = EZQ_readout_adc_item.adc_wave; - `uvm_info(get_type_name(),$sformatf("mcu_cw_data = %0h",EZQ_readout_adc_item.adc_wave),UVM_LOW) + adc_wave = EZQ_readout_adc_item.adc_wave; + `uvm_info(get_type_name(),$sformatf("get_adc_data = %0p",adc_wave),UVM_LOW) + for(int i = 0; i < adc_wave.size(); i++)begin + adc_data_queue.push_back(adc_wave[i]); + end + `uvm_info(get_type_name(),$sformatf("adc_data_queue.size = %0h",adc_data_queue.size()),UVM_LOW) end endtask +//task get_mcu_cw_item task readout_daq_rm::get_mcu_cw_item(); mcu_cw_item mcu_cw_item; forever begin mcu_get_port.get(mcu_cw_item); - clock_cycle = mcu_cw_item.clock_cycle; - cw_data = mcu_cw_item.cw_data; - `uvm_info(get_type_name(),$sformatf("daq_mcu_cw_data = %0h,daq_mcu_cycle = %0h",mcu_cw_item.cw_data,mcu_cw_item.clock_cycle),UVM_LOW) + clock_cycle = mcu_cw_item.clock_cycle; + cw_data = mcu_cw_item.cw_data; + cw_valid = mcu_cw_item.cw_valid; + `uvm_info(get_type_name(),$sformatf("mcu_cw_data = %0h,mcu_cw_valid = %0h,mcu_cycle = %0h",mcu_cw_item.cw_data,mcu_cw_item.cw_valid,mcu_cw_item.clock_cycle),UVM_LOW) + if(cw_valid)begin + cw_queue.push_back(mcu_cw_item); + `uvm_info(get_type_name(),$sformatf("cw_queue_size = %0h",cw_queue.size()),UVM_LOW) + end end endtask -task send_spi_item(); - spi_item spi_item; +//task get_spi_item +task readout_daq_rm::get_spi_item(); forever begin - if(spi_item_2scb_queue.size > 0) - spi_item = spi_item_2scb_queue.pop_front(); - spi_rm2scb_port.write(spi_item); - `uvm_info(get_type_name(),$sformatf("spi_item_data = %0h",spi_item.data),UVM_LOW) - end + @(wr_addr or wr_data); + `uvm_info(get_type_name(),$sformatf("wr_data=%0h, wr_addr=%h",wr_data,wr_addr),UVM_LOW) + ram_data[wr_addr] = wr_data; + end endtask +//task send_spi_item +task readout_daq_rm::send_spi_item(); + spi_item spi_item; + bit [31:0]spi_item_addr=32'h600000; + wait(int_threshold!=0) + `uvm_info(get_type_name(),$sformatf("int_threshold = %0h",int_threshold),UVM_LOW) + + forever begin + if(all_queue.size()> int_threshold)begin + spi_item = new(); + spi_item.cmd = 1 ; + spi_item.addr = spi_item_addr ; + spi_item.cfgid = 5'd0 ; + + for (int i = 0; i < int_threshold; i++) begin + spi_item.data.push_back(all_queue[i]); + end + spi_rm2scb_port.write(spi_item); + `uvm_info(get_type_name(),"daq_rm send spi_item",UVM_LOW) + spi_item.print(); + `uvm_info(get_type_name(),$sformatf("int_threshold = %0h",int_threshold),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("send_spi_item = %0p",spi_item.data),UVM_LOW) + `uvm_info(get_type_name(),$sformatf("spi_item_size = %0p",spi_item.data.size()),UVM_LOW) + + all_queue = all_queue[int_threshold:$]; + spi_item_addr = spi_item_addr + 25'h4 * int_threshold ; + end + @(posedge `CLK); + end +endtask + + task readout_daq_rm::run_phase(uvm_phase phase);//main task fork get_mcu_cw_item(); get_adc_item(); - daq_exe(cw_data,clock_cycle,adc_wave); + get_spi_item(); + get_config_data(); + daq_exe( + mcu_timer, + mcu_counter, + loc_state, + glb_state, + feed_data, + sram_count, + push_count, + qubit_state, + i_sum , + q_sum , + count_state_0 , + count_state_1 , + count_state_2 , + count_state_3 + ); send_spi_item(); + join endtask -task readout_daq_rm::daq_exe(ref bit[31:0]cw_data, ref logic[63:0]adc_wave, ref int clock_cycle); - logic sync; -//DAQ reg - logic [31:0] mcu_timer; - logic [31:0] mcu_counter; - logic [31:0] loc_state; - logic [31:0] glb_state; - logic [31:0] feed_data; - logic [31:0] send_data; - logic [31:0] sram_count; - logic [31:0] push_count; - logic [31:0] command; - logic [31:0] func_ctrl; - logic [31:0] sample_depth; - logic [31:0] int_threshold; - logic [31:0] qubit_state; - logic [31:0] read_req_ctrl; - spi_item spi_item; - logic [31:0] demod_width [15:0]; - logic [31:0] demod_freq [15:0]; - logic [31:0] count_state_0 [15:0]; - logic [31:0] count_state_1 [15:0]; - logic [31:0] count_state_2 [15:0]; - logic [31:0] count_state_3 [15:0]; - logic [31:0] i_sum [15:0]; - logic [31:0] q_sum [15:0]; - logic [31:0] para_ab0 [15:0]; - logic [31:0] para_ab1 [15:0]; - logic [31:0] para_ab2 [15:0]; - logic [31:0] para_c0 [15:0]; - logic [31:0] para_c1 [15:0]; - logic [31:0] para_c2 [15:0]; +task readout_daq_rm::daq_exe( + ref bit [31:0] mcu_timer, + ref bit [31:0] mcu_counter, + ref bit [31:0] loc_state, + ref bit [31:0] glb_state, + ref bit [31:0] feed_data, + ref bit [31:0] sram_count, + ref bit [31:0] push_count, + ref bit [31:0] qubit_state, + ref bit [31:0] i_sum [15:0], + ref bit [31:0] q_sum [15:0], + ref bit [31:0] count_state_0 [15:0], + ref bit [31:0] count_state_1 [15:0], + ref bit [31:0] count_state_2 [15:0], + ref bit [31:0] count_state_3 [15:0] +); +//DAQ signal + bit [15:0] iq_save_en; + bit [15:0] state_save_en; + bit [15:0] count_save_en; + + bit [1 :0] state_data[15:0]; + bit [15:0] demod_valid; -// sync signal + bit [15:0] i; +//wait sync signal + `uvm_info(get_type_name(),"daq wait sync_in",UVM_LOW) wait (`SYNC_IN); - `uvm_info(get_type_name(),"wait sync_in",UVM_LOW) - sync = rm_if.sync; -//MCU packet : get cw_data & cycle - //mcu_get_port.get(mcu_cw_item); - //clock_cycle = mcu_cw_item.clock_cycle; - //cw_data = mcu_cw_item.cw_data; + `uvm_info(get_type_name(),"daq sync_in come",UVM_LOW) +// sync_in = rm_if.sync_in; +forever begin + mcu_cw_item mcu_cw_item; +// @(posedge `CLK) + wait(cw_queue.size()>0 ); + mcu_cw_item = cw_queue.pop_front(); + cw_data_cur = mcu_cw_item.cw_data; + clock_cycle_cur = mcu_cw_item.clock_cycle; + cw_valid_cur = mcu_cw_item.cw_valid; + wait(adc_data_queue.size()> clock_cycle_cur + sample_depth + 4); + adc_wave_cur = adc_data_queue[clock_cycle_cur+4 : clock_cycle_cur + sample_depth + 3]; + `uvm_info(get_type_name(),$sformatf("mcu_cw_item.cw_data = %0h,mcu_cw_item.cycle = %0h,mcu_cw_item.cw_valid = %0h",mcu_cw_item.cw_data,mcu_cw_item.clock_cycle,mcu_cw_item.cw_valid),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("adc_wave_cur = %0p,adc_wave_cur.size = %0h",adc_wave_cur,adc_wave_cur.size()),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("adc_data_queue.size = %0h",adc_data_queue.size()),UVM_HIGH) -//get DAQ reg - mcu_timer = reg_mems::daq_regfile.get("timer"); - mcu_counter = reg_mems::daq_regfile.get("counter"); - loc_state = reg_mems::daq_regfile.get("loc_state"); - glb_state = reg_mems::daq_regfile.get("glb_state"); - feed_data = reg_mems::daq_regfile.get("feed_data"); - send_data = reg_mems::daq_regfile.get("send_data"); - sram_count = reg_mems::daq_regfile.get("sram_count"); - push_count = reg_mems::daq_regfile.get("push_count"); - command = reg_mems::daq_regfile.get("Command"); - func_ctrl = reg_mems::daq_regfile.get("function"); - sample_depth = reg_mems::daq_regfile.get("sample_depth"); - int_threshold = reg_mems::daq_regfile.get("int_threshold"); -// qubit_state = reg_mems::daq_regfile.get("qubit_state"); - read_req_ctrl = reg_mems::daq_regfile.get("read_req_ctrl"); - demod_freq[ 0] = reg_mems::daq_regfile.get("demod_freq_0"); - demod_freq[ 1] = reg_mems::daq_regfile.get("demod_freq_1"); - demod_freq[ 2] = reg_mems::daq_regfile.get("demod_freq_2"); - demod_freq[ 3] = reg_mems::daq_regfile.get("demod_freq_3"); - demod_freq[ 4] = reg_mems::daq_regfile.get("demod_freq_4"); - demod_freq[ 5] = reg_mems::daq_regfile.get("demod_freq_5"); - demod_freq[ 6] = reg_mems::daq_regfile.get("demod_freq_6"); - demod_freq[ 7] = reg_mems::daq_regfile.get("demod_freq_7"); - demod_freq[ 8] = reg_mems::daq_regfile.get("demod_freq_8"); - demod_freq[ 9] = reg_mems::daq_regfile.get("demod_freq_9"); - demod_freq[10] = reg_mems::daq_regfile.get("demod_freq_10"); - demod_freq[11] = reg_mems::daq_regfile.get("demod_freq_11"); - demod_freq[12] = reg_mems::daq_regfile.get("demod_freq_12"); - demod_freq[13] = reg_mems::daq_regfile.get("demod_freq_13"); - demod_freq[14] = reg_mems::daq_regfile.get("demod_freq_14"); - demod_freq[15] = reg_mems::daq_regfile.get("demod_freq_15"); - - demod_width[ 0] = reg_mems::daq_regfile.get("demod_width_0"); - demod_width[ 1] = reg_mems::daq_regfile.get("demod_width_1"); - demod_width[ 2] = reg_mems::daq_regfile.get("demod_width_2"); - demod_width[ 3] = reg_mems::daq_regfile.get("demod_width_3"); - demod_width[ 4] = reg_mems::daq_regfile.get("demod_width_4"); - demod_width[ 5] = reg_mems::daq_regfile.get("demod_width_5"); - demod_width[ 6] = reg_mems::daq_regfile.get("demod_width_6"); - demod_width[ 7] = reg_mems::daq_regfile.get("demod_width_7"); - demod_width[ 8] = reg_mems::daq_regfile.get("demod_width_8"); - demod_width[ 9] = reg_mems::daq_regfile.get("demod_width_9"); - demod_width[10] = reg_mems::daq_regfile.get("demod_width_10"); - demod_width[11] = reg_mems::daq_regfile.get("demod_width_11"); - demod_width[12] = reg_mems::daq_regfile.get("demod_width_12"); - demod_width[13] = reg_mems::daq_regfile.get("demod_width_13"); - demod_width[14] = reg_mems::daq_regfile.get("demod_width_14"); - demod_width[15] = reg_mems::daq_regfile.get("demod_width_15"); - - para_ab0[ 0] = reg_mems::daq_regfile.get("Q0_state_est_ab_0"); - para_ab0[ 1] = reg_mems::daq_regfile.get("Q0_state_est_ab_1"); - para_ab0[ 2] = reg_mems::daq_regfile.get("Q0_state_est_ab_2"); - para_ab0[ 3] = reg_mems::daq_regfile.get("Q0_state_est_ab_3"); - para_ab0[ 4] = reg_mems::daq_regfile.get("Q0_state_est_ab_4"); - para_ab0[ 5] = reg_mems::daq_regfile.get("Q0_state_est_ab_5"); - para_ab0[ 6] = reg_mems::daq_regfile.get("Q0_state_est_ab_6"); - para_ab0[ 7] = reg_mems::daq_regfile.get("Q0_state_est_ab_7"); - para_ab0[ 8] = reg_mems::daq_regfile.get("Q0_state_est_ab_8"); - para_ab0[ 9] = reg_mems::daq_regfile.get("Q0_state_est_ab_9"); - para_ab0[10] = reg_mems::daq_regfile.get("Q0_state_est_ab_10"); - para_ab0[11] = reg_mems::daq_regfile.get("Q0_state_est_ab_11"); - para_ab0[12] = reg_mems::daq_regfile.get("Q0_state_est_ab_12"); - para_ab0[13] = reg_mems::daq_regfile.get("Q0_state_est_ab_13"); - para_ab0[14] = reg_mems::daq_regfile.get("Q0_state_est_ab_14"); - para_ab0[15] = reg_mems::daq_regfile.get("Q0_state_est_ab_15"); - - para_ab1[ 0] = reg_mems::daq_regfile.get("Q1_state_est_ab_0"); - para_ab1[ 1] = reg_mems::daq_regfile.get("Q1_state_est_ab_1"); - para_ab1[ 2] = reg_mems::daq_regfile.get("Q1_state_est_ab_2"); - para_ab1[ 3] = reg_mems::daq_regfile.get("Q1_state_est_ab_3"); - para_ab1[ 4] = reg_mems::daq_regfile.get("Q1_state_est_ab_4"); - para_ab1[ 5] = reg_mems::daq_regfile.get("Q1_state_est_ab_5"); - para_ab1[ 6] = reg_mems::daq_regfile.get("Q1_state_est_ab_6"); - para_ab1[ 7] = reg_mems::daq_regfile.get("Q1_state_est_ab_7"); - para_ab1[ 8] = reg_mems::daq_regfile.get("Q1_state_est_ab_8"); - para_ab1[ 9] = reg_mems::daq_regfile.get("Q1_state_est_ab_9"); - para_ab1[10] = reg_mems::daq_regfile.get("Q1_state_est_ab_10"); - para_ab1[11] = reg_mems::daq_regfile.get("Q1_state_est_ab_11"); - para_ab1[12] = reg_mems::daq_regfile.get("Q1_state_est_ab_12"); - para_ab1[13] = reg_mems::daq_regfile.get("Q1_state_est_ab_13"); - para_ab1[14] = reg_mems::daq_regfile.get("Q1_state_est_ab_14"); - para_ab1[15] = reg_mems::daq_regfile.get("Q1_state_est_ab_15"); - - para_ab2[ 0] = reg_mems::daq_regfile.get("Q2_state_est_ab_0"); - para_ab2[ 1] = reg_mems::daq_regfile.get("Q2_state_est_ab_1"); - para_ab2[ 2] = reg_mems::daq_regfile.get("Q2_state_est_ab_2"); - para_ab2[ 3] = reg_mems::daq_regfile.get("Q2_state_est_ab_3"); - para_ab2[ 4] = reg_mems::daq_regfile.get("Q2_state_est_ab_4"); - para_ab2[ 5] = reg_mems::daq_regfile.get("Q2_state_est_ab_5"); - para_ab2[ 6] = reg_mems::daq_regfile.get("Q2_state_est_ab_6"); - para_ab2[ 7] = reg_mems::daq_regfile.get("Q2_state_est_ab_7"); - para_ab2[ 8] = reg_mems::daq_regfile.get("Q2_state_est_ab_8"); - para_ab2[ 9] = reg_mems::daq_regfile.get("Q2_state_est_ab_9"); - para_ab2[10] = reg_mems::daq_regfile.get("Q2_state_est_ab_10"); - para_ab2[11] = reg_mems::daq_regfile.get("Q2_state_est_ab_11"); - para_ab2[12] = reg_mems::daq_regfile.get("Q2_state_est_ab_12"); - para_ab2[13] = reg_mems::daq_regfile.get("Q2_state_est_ab_13"); - para_ab2[14] = reg_mems::daq_regfile.get("Q2_state_est_ab_14"); - para_ab2[15] = reg_mems::daq_regfile.get("Q2_state_est_ab_15"); - - para_c0[ 0] = reg_mems::daq_regfile.get("Q0_state_est_c_0"); - para_c0[ 1] = reg_mems::daq_regfile.get("Q0_state_est_c_1"); - para_c0[ 2] = reg_mems::daq_regfile.get("Q0_state_est_c_2"); - para_c0[ 3] = reg_mems::daq_regfile.get("Q0_state_est_c_3"); - para_c0[ 4] = reg_mems::daq_regfile.get("Q0_state_est_c_4"); - para_c0[ 5] = reg_mems::daq_regfile.get("Q0_state_est_c_5"); - para_c0[ 6] = reg_mems::daq_regfile.get("Q0_state_est_c_6"); - para_c0[ 7] = reg_mems::daq_regfile.get("Q0_state_est_c_7"); - para_c0[ 8] = reg_mems::daq_regfile.get("Q0_state_est_c_8"); - para_c0[ 9] = reg_mems::daq_regfile.get("Q0_state_est_c_9"); - para_c0[10] = reg_mems::daq_regfile.get("Q0_state_est_c_10"); - para_c0[11] = reg_mems::daq_regfile.get("Q0_state_est_c_11"); - para_c0[12] = reg_mems::daq_regfile.get("Q0_state_est_c_12"); - para_c0[13] = reg_mems::daq_regfile.get("Q0_state_est_c_13"); - para_c0[14] = reg_mems::daq_regfile.get("Q0_state_est_c_14"); - para_c0[15] = reg_mems::daq_regfile.get("Q0_state_est_c_15"); - - para_c1[ 0] = reg_mems::daq_regfile.get("Q1_state_est_c_0"); - para_c1[ 1] = reg_mems::daq_regfile.get("Q1_state_est_c_1"); - para_c1[ 2] = reg_mems::daq_regfile.get("Q1_state_est_c_2"); - para_c1[ 3] = reg_mems::daq_regfile.get("Q1_state_est_c_3"); - para_c1[ 4] = reg_mems::daq_regfile.get("Q1_state_est_c_4"); - para_c1[ 5] = reg_mems::daq_regfile.get("Q1_state_est_c_5"); - para_c1[ 6] = reg_mems::daq_regfile.get("Q1_state_est_c_6"); - para_c1[ 7] = reg_mems::daq_regfile.get("Q1_state_est_c_7"); - para_c1[ 8] = reg_mems::daq_regfile.get("Q1_state_est_c_8"); - para_c1[ 9] = reg_mems::daq_regfile.get("Q1_state_est_c_9"); - para_c1[10] = reg_mems::daq_regfile.get("Q1_state_est_c_10"); - para_c1[11] = reg_mems::daq_regfile.get("Q1_state_est_c_11"); - para_c1[12] = reg_mems::daq_regfile.get("Q1_state_est_c_12"); - para_c1[13] = reg_mems::daq_regfile.get("Q1_state_est_c_13"); - para_c1[14] = reg_mems::daq_regfile.get("Q1_state_est_c_14"); - para_c1[15] = reg_mems::daq_regfile.get("Q1_state_est_c_15"); - - para_c2[ 0] = reg_mems::daq_regfile.get("Q2_state_est_c_0"); - para_c2[ 1] = reg_mems::daq_regfile.get("Q2_state_est_c_1"); - para_c2[ 2] = reg_mems::daq_regfile.get("Q2_state_est_c_2"); - para_c2[ 3] = reg_mems::daq_regfile.get("Q2_state_est_c_3"); - para_c2[ 4] = reg_mems::daq_regfile.get("Q2_state_est_c_4"); - para_c2[ 5] = reg_mems::daq_regfile.get("Q2_state_est_c_5"); - para_c2[ 6] = reg_mems::daq_regfile.get("Q2_state_est_c_6"); - para_c2[ 7] = reg_mems::daq_regfile.get("Q2_state_est_c_7"); - para_c2[ 8] = reg_mems::daq_regfile.get("Q2_state_est_c_8"); - para_c2[ 9] = reg_mems::daq_regfile.get("Q2_state_est_c_9"); - para_c2[10] = reg_mems::daq_regfile.get("Q2_state_est_c_10"); - para_c2[11] = reg_mems::daq_regfile.get("Q2_state_est_c_11"); - para_c2[12] = reg_mems::daq_regfile.get("Q2_state_est_c_12"); - para_c2[13] = reg_mems::daq_regfile.get("Q2_state_est_c_13"); - para_c2[14] = reg_mems::daq_regfile.get("Q2_state_est_c_14"); - para_c2[15] = reg_mems::daq_regfile.get("Q2_state_est_c_15"); //////////////////////////////////////////////////////////////////// //DAQ functions //////////////////////////////////////////////////////////////////// - for(i = 0; i < NUM_QUBIT; i++)begin - fork - daq_block( - //in - .i (i ), - .cw_data (cw_data ), - .func_ctrl (func_ctrl ), - .demod_freq (demod_freq[i]), - .demod_width (demod_width[i]), - .para_ab0 (para_ab0[i]), - .para_ab1 (para_ab1[i]), - .para_ab2 (para_ab2[i]), - .para_c0 (para_c0[i]), - .para_c0 (para_c0[i]), - .para_c1 (para_c1[i]), - .para_c2 (para_c2[i]), - //out - .state_data (state_data[i]), - .iq_save_en (iq_save_valid[i]), - .i_sum (i_sum[i] ), - .q_sum (q_sum[i] ), - .count_save_en (count_save_valid[i]), - .count_state_0 (count_state_0[i]), - .count_state_1 (count_state_1[i]), - .count_state_2 (count_state_2[i]), - .count_state_3 (count_state_3[i]), - ); - join - qubit_state[i*2+: 2] = state_data[i]; + demod_valid = cw_data_cur[31:16]; + if(adc_wave_cur.size()>0)begin + for(i = 0; i < adc_wave_cur.size(); i++)begin + adc_wave_cur[i] = adc_wave_cur[i] ^ 64'h8080_8080_8080_8080; + end + + for(i = 0; i < adc_wave_cur.size(); i++)begin + all_queue.push_back(adc_wave_cur[i][31:0]); + all_queue.push_back(adc_wave_cur[i][63:32]); + `uvm_info(get_type_name(),$sformatf("the %d data:adc_wave_cur[31:0] = %0h,adc_wave_cur[63:32] = %0h",i,adc_wave_cur[i][31:0],adc_wave_cur[i][63:32]),UVM_HIGH) + if(adc_wave_cur[i][31:0] == 32'hb0f | adc_wave_cur[i][63:32] == 32'hb0f)begin + `uvm_info(get_type_name(),("error data"),UVM_HIGH) + end + end + `uvm_info(get_type_name(),("store wave done"),UVM_HIGH) + end + + for(i = 0; i < `NUM_QUBIT; i++)begin + iq_save_en[i] = demod_valid[i] ? (cw_data_cur[2:0]==3'b101 | cw_data_cur[13]):iq_save_en[i] ; + state_save_en[i] = demod_valid[i] ? (cw_data_cur[2:0]==3'b110 | cw_data_cur[14]):state_save_en[i] ; + count_save_en[i] = demod_valid[i] ? (cw_data_cur[2:0]==3'b111 | cw_data_cur[15]):count_save_en[i] ; + +// loc_fb_en[k] <= demod_valid_buf[k] ? (cw_data_buf[6] & !cw_data_buf[3]) : loc_fb_en[k]; +// glb_fb_en[k] <= demod_valid_buf[k] ? (cw_data_buf[7] & !cw_data_buf[3]) : glb_fb_en[k]; +// send_loc_vld[k] <= demod_valid_buf[k] & cw_data_buf[3] & cw_data_buf[6]; +// send_glb_vld[k] <= demod_valid_buf[k] & cw_data_buf[3] & cw_data_buf[7]; + + daq_block( + //in + i, + demod_valid[i], + demod_freq[i], + demod_width[i], + para_ab0[i], + para_ab1[i], + para_ab2[i], + para_c0[i], + para_c1[i], + para_c2[i], + //out + state_data[i] , + i_sum[i] , + q_sum[i] , + count_state_0[i], + count_state_1[i], + count_state_2[i], + count_state_3[i] + ); + qubit_state[i*2+: 2] = state_data[i]; end + + for(i = 0; i < `NUM_QUBIT; i++)begin + if(iq_save_en[i])begin + all_queue.push_back(i_sum[i]); + all_queue.push_back(q_sum[i]); + + `uvm_info(get_type_name(),$sformatf("store i_sum[%0h] = %h",i,i_sum[i]),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("store q_sum[%0h] = %h",i,q_sum[i]),UVM_HIGH) + + `uvm_info(get_type_name(),("store iq_sum done"),UVM_HIGH) + end + end + if(state_save_en)begin + all_queue.push_back(qubit_state); + `uvm_info(get_type_name(),$sformatf("store qubit_state = %h",qubit_state),UVM_HIGH) + `uvm_info(get_type_name(),("store qubit_state done"),UVM_HIGH) + end + + for(i = 0; i < `NUM_QUBIT; i++)begin + if(count_save_en[i])begin + all_queue.push_back(count_state_0[i]); + all_queue.push_back(count_state_1[i]); + all_queue.push_back(count_state_2[i]); + all_queue.push_back(count_state_3[i]); + `uvm_info(get_type_name(),("store count_state done"),UVM_HIGH) + end + end + `uvm_info(get_type_name(),$sformatf("all_queue.size() = %0h",all_queue.size()),UVM_HIGH) + - data2sram( - .qubit_state (qubit_state ), - .count_state_0 (count_state_0 ), - .count_state_1 (count_state_1 ), - .count_state_2 (count_state_2 ), - .count_state_3 (count_state_3 ), - .i_sum (i_sum ), - .q_sum (q_sum ) - ); - -//解模数据、态状态、态统计数据，通过spi_item发送给scb,目前只带数据，wave未发送 - spi_item.data = qubit_state; - spi_item_2scb_queue.push_back(spi_item); - foreach (count_state_0[i]) begin - spi_item.data = count_state_0[i]; - spi_item_2scb_queue.push_back(spi_item); - end - foreach (count_state_1[i]) begin - spi_item.data = count_state_1[i]; - spi_item_2scb_queue.push_back(spi_item); - end - foreach (count_state_2[i]) begin - spi_item.data = count_state_2[i]; - spi_item_2scb_queue.push_back(spi_item); - end - foreach (count_state_3[i]) begin - spi_item.data = count_state_3[i]; - spi_item_2scb_queue.push_back(spi_item); - end - foreach (i_sum[i]) begin - spi_item.data = i_sum[i]; - spi_item_2scb_queue.push_back(spi_item); - end - foreach (q_sum[i]) begin - spi_item.data = q_sum[i]; - spi_item_2scb_queue.push_back(spi_item); - end - +end endtask task readout_daq_rm::daq_block( - logic [31:0]i , - logic [31:0]cw_data , - logic [31:0]func_ctrl , - logic [31:0]demod_freq , - logic [31:0]demod_width , - logic [31:0]para_ab0 , - logic [31:0]para_ab1 , - logic [31:0]para_ab2 , - logic [31:0]para_c0 , - logic [31:0]para_c0 , - logic [31:0]para_c1 , - logic [31:0]para_c2 , - logic [1 :0]state_data , - logic [31:0]iq_save_en , - logic [31:0]i_sum , - logic [31:0]q_sum , - logic [31:0]count_save_en , - logic [31:0]count_state_0 , - logic [31:0]count_state_1 , - logic [31:0]count_state_2 , - logic [31:0]count_state_3 - + input bit [15:0] i , + input bit demod_valid , + input bit [31:0]demod_freq , + input bit [31:0]demod_width , + input bit [31:0]para_ab0 , + input bit [31:0]para_ab1 , + input bit [31:0]para_ab2 , + input bit [31:0]para_c0 , + input bit [31:0]para_c1 , + input bit [31:0]para_c2 , + ref bit [1 :0]state_data , + ref bit [31:0]i_sum , + ref bit [31:0]q_sum , + ref bit [31:0]count_state_0 , + ref bit [31:0]count_state_1 , + ref bit [31:0]count_state_2 , + ref bit [31:0]count_state_3 ); - //问题：1.iq_weight存放的格式，代码与设计书不吻合；iq两路的解模数据存放在两个不同的ram里，同一个地址给到两个ram，拼接成64bit数据。 - // 2.16个qubit的解模数据的读取起始地址是相同的吗？ - // 3.pulse_generator的作用？ - // 4. daq_reg已经有iq_sum,count_state等信息，还要往sram里写吗？ - // 5. 主动数据推送是一个什么样的流程？ - // 6.解模宽度demod_width和采样深度sample_width相同？ - // 7.代码里sub_cnt没有定义位宽 // codeword - logic demod_valid = cw_data[16+i]; - logic iq_sum_en = cw_data[4] ; - logic count_add_en = cw_data[5] ; - logic loc_fb_en = cw_data[6] & !cw_data[3]) ; - logic glb_fb_en = cw_data[7] & !cw_data[3]) ; - logic iq_clr_en = cw_data[8] ; - logic count_clr_en = cw_data[9] ; - logic iq_save_en = cw_data[2:0]==3'b101) | cw_data[13]) ; - logic state_save_en = cw_data[2:0]==3'b110) | cw_data[14]) ; - logic count_save_en = cw_data[2:0]==3'b111) | cw_data[15]) ; + bit iq_sum_en = demod_valid ? cw_data_cur[4] : iq_sum_en ; + bit count_add_en = demod_valid ? cw_data_cur[5] : count_add_en ; + bit loc_fb_en = demod_valid ? cw_data_cur[6] & !cw_data_cur[3]: loc_fb_en ; + bit glb_fb_en = demod_valid ? cw_data_cur[7] & !cw_data_cur[3]: glb_fb_en ; + bit iq_clr_en = demod_valid ? cw_data_cur[8] : iq_clr_en ; + bit count_clr_en = demod_valid ? cw_data_cur[9] : count_clr_en ; + bit [15:0] j; + bit [15:0] k; + bit [31:0] base_addr; // mtf_gen signal - logic [7 :0] dds_cos[NUM_WAY-1 :0]; - logic [7 :0] dds_sin[NUM_WAY-1 :0]; - logic [2 :0] step_ctrl; - logic const_en; - logic [7 :0] weight_iq; - logic [24:0] read_addr; - logic [31:0] match_filter_i; - logic [31:0] match_filter_q; - logic [15:0] mtf_i_temp[NUM_WAY-1:0];; - logic [15:0] mtf_q_temp[NUM_WAY-1:0];; - logic [7 :0] mtf_i[NUM_WAY-1:0];; - logic [7 :0] mtf_q[NUM_WAY-1:0];; + bit [19:0] accumulator [`NUM_WAY-1 :0]; + bit signed[7 :0] dds_cos[`NUM_WAY-1 :0]; + bit signed[7 :0] dds_sin[`NUM_WAY-1 :0]; + bit [2 :0] step_ctrl; + bit const_en; + bit [7 :0] weight_iq; + bit [24:0] read_addr; + bit [24:0] ram_addr; + bit [31:0] mtf_queue_i[$]; + bit [31:0] mtf_queue_q[$]; + + bit [31:0] match_filter_i; + bit [31:0] match_filter_q; + bit signed[15:0] mtf_i_temp[`NUM_WAY-1:0]; + bit signed[15:0] mtf_q_temp[`NUM_WAY-1:0]; + bit signed[7 :0] i_mult; + bit signed[7 :0] q_mult; + bit [7 :0] byte_sel; + bit [9 :0] address[`NUM_WAY-1:0]; + bit signed[7 :0] mtf_i[`NUM_WAY-1:0]; + bit signed[7 :0] mtf_q[`NUM_WAY-1:0]; //demod_algorithm signal - logic [15:0] demod_i; - logic [15:0] demod_q; - logic [15:0] demod_i_sum; - logic [15:0] demod_q_sum; - logic iq_valid; + bit signed[15:0] demod_i[`NUM_WAY-1:0]; + bit signed[15:0] demod_q[`NUM_WAY-1:0]; + bit [63:0] adc_wave_one; + bit signed[31:0] demod_i_sum[`NUM_WAY-1:0]; + bit signed[31:0] demod_q_sum[`NUM_WAY-1:0]; + bit signed[31:0] demod_i_sum_final; + bit signed[31:0] demod_q_sum_final; + //iq_sum signal - logic [15:0] scale_data_i; - logic [15:0] scale_data_q; - logic [15:0] i_sum; - logic [15:0] q_sum; - //state_estimate - logic [1 :0] state_data; - logic [31:0] count_state_0; - logic [31:0] count_state_1; - logic [31:0] count_state_2; - logic [31:0] count_state_3; - - //循环次数 - for(k = 0; k < demod_width ; k++)begin + bit [15:0] scale_data_i; + bit [15:0] scale_data_q; + + //state_estimate + bit [2:0] compare_result; + base_addr = 25'h500000 + 25'h400 * i; + `uvm_info(get_type_name(),$sformatf("daq_func_ctrl = %h",func_ctrl),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("demod_freq = %h",demod_freq),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("channel %0h : base_addr = %h",i,base_addr),UVM_HIGH) + + for(int k = 0; k < demod_width ; k++)begin //mtf_gen - //dds 每个循环出8路 - logic [19:0] fcw = demod_freq[31:12]; - logic [19:0] fcw_buf = {demod_freq[31:12],3'b0}; - logic [19:0] pcw_buf [NUM_WAY-1 :0]; - logic [19:0] accumulator [NUM_WAY-1 :0]; - - for(j = 0; j < NUM_WAY; j++)begin + bit [19:0] fcw = demod_freq[31:12]; + bit [19:0] fcw_buf = {demod_freq[31:12],3'b0}; + bit [19:0] pcw_buf [`NUM_WAY-1 :0]; + + for(int j = 0; j < `NUM_WAY; j++)begin pcw_buf[j] = {demod_freq[11:0],8'b0} + fcw*(j+1); - accumulator[j] = accumulator[j] + fcw_buf ; - address[j] = {accumulator[j]+pcw_buf[j]}[19:10]; - dds(address[j],dds_cos[j][k],dds_sin[j][k]); + accumulator[j] = fcw_buf*k + pcw_buf[j]; + address[j] = accumulator[j][19:10]; + + dds(address[j],dds_cos[j],dds_sin[j]); + `uvm_info(get_type_name(),$sformatf("channel %d:address = %h; dds_cos= %h; dds_sin=%h",j,address[j],dds_cos[j],dds_sin[j]),UVM_HIGH) end - //step_ctrl，解模算法步长，用于控制每个权重采样点持续时钟周期 - //0: 1个时钟周期 - //1: 2个时钟周期 - //2: 4个时钟周期 - //3: 8个时钟周期 - //4: 16个时钟周期 step_ctrl = func_ctrl[6:4]; const_en = func_ctrl[7]; weight_iq = func_ctrl[15:8]; @@ -496,49 +466,84 @@ task readout_daq_rm::daq_block( i_mult = weight_iq; q_mult = weight_iq; end else begin - case(step_ctrl) - 3'b000 : read_addr = read_addr + 16; - 3'b001 : read_addr = read_addr + 8; - 3'b010 : read_addr = read_addr + 4; - 3'b011 : read_addr = read_addr + 2; - 3'b100 : read_addr = read_addr + 1; - defalut : read_addr = read_addr ; - - reg_mems::match_filter.get32bit({read_addr[12:6],2'b0}, match_filter_i); - reg_mems::match_filter.get32bit({read_addr[12:6],2'b0}, match_filter_q); - + ram_addr = base_addr+{read_addr[12:6],2'b0}; + match_filter_i = ram_data[ram_addr]; + match_filter_q = ram_data[ram_addr + 25'h200]; + + + //mtf_queue_i.push_back(match_filter_i); + //mtf_queue_q.push_back(match_filter_q); byte_sel = read_addr[5:4]; i_mult = match_filter_i[byte_sel*8+:8]; q_mult = match_filter_q[byte_sel*8+:8]; + case(step_ctrl) + 3'b000 : read_addr = read_addr + 16; + 3'b001 : read_addr = read_addr + 8; + 3'b010 : read_addr = read_addr + 4; + 3'b011 : read_addr = read_addr + 2; + 3'b100 : read_addr = read_addr + 1; + endcase + + `uvm_info(get_type_name(),$sformatf("step_ctrl = %h",step_ctrl),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("read_addr = %h",read_addr),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("ram_addr= %h",ram_addr),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("match_filter_i= %h",match_filter_i),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("byte_sel= %h",byte_sel),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("i_mult= %h",i_mult),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("q_mult= %h",q_mult),UVM_HIGH) end - for(j = 0; j < NUM_WAY; j++)begin - mtf_i_temp[j][k] = i_mult*dds_cos[j][k]; - mtf_q_temp[j][k] = q_mult*dds_sin[j][k];//i和q的地址相差多少 - mtf_i[j][k] = {mtf_i_temp[15][k],mtf_i_temp[14:7][k]}+mtf_i_temp[6][k]; - mtf_q[j][k] = {mtf_q_temp[15][k],mtf_q_temp[14:7][k]}+mtf_q_temp[6][k];; + for(int j = 0; j < `NUM_WAY; j++)begin + mtf_i_temp[j] = i_mult*dds_cos[j]; + mtf_q_temp[j] = q_mult*dds_sin[j]; + mtf_i[j] = {mtf_i_temp[j][14],mtf_i_temp[j][13:7]}; + mtf_q[j] = {mtf_q_temp[j][14],mtf_q_temp[j][13:7]}; + `uvm_info(get_type_name(),$sformatf("mtf_i_temp[%h] = %h",j,mtf_i_temp[j]),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("mtf_q_temp[%h] = %h",j,mtf_q_temp[j]),UVM_HIGH) + + `uvm_info(get_type_name(),$sformatf("mtf_i[%h] = %h",j,mtf_i[j]),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("mtf_q[%h] = %h",j,mtf_q[j]),UVM_HIGH) + end - + //demod_algorithm - //adc_wave = EZQ_readout_adc_item.adc_wave; - for(j = 0; j < NUM_WAY; j++)begin - demod_i[j][k] = adc_wave[j*8:j*8+7]*mtf_i[j][k]; - demod_q[j][k] = adc_wave[j*8:j*8+7]*mtf_q[j][k]; - //第一次求和，滤掉除直流之外的频率，先对demod_width长的8路数据进行求和，再对8路进行求和 - demod_i_queue[j].push_back(demod_i[j][k]); - demod_q_queue[j].push_back(demod_q[j][k]); - - demod_i_sum = demod_i_sum + demod_i[j][k]; - demod_q_sum = demod_q_sum + demod_q[j][k]; + if(adc_wave_cur.size()>0)begin + adc_wave_one = adc_wave_cur.pop_front(); + `uvm_info(get_type_name(),$sformatf("adc_wave_one = %h",adc_wave_one),UVM_HIGH) + + end else begin + adc_wave_one = 64'b0; + end + for(j = 0; j < `NUM_WAY; j++)begin + demod_i[j] = $signed(adc_wave_one[j*8+:8])*mtf_i[j]; + demod_q[j] = $signed(adc_wave_one[j*8+:8])*mtf_q[j]; + + demod_i_sum[j] = demod_i_sum[j] + demod_i[j]; + demod_q_sum[j] = demod_q_sum[j] + demod_q[j]; +// `uvm_info(get_type_name(),$sformatf("adc_wave_one = %h",adc_wave_one),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("demod_i[%h] = %h,mtf_i[%0h]=%0h",j,demod_i[j],j,mtf_i[j]),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("demod_q[%h] = %h,mtf_q[%0h]=%0h",j,demod_q[j],j,mtf_q[j]),UVM_HIGH) + + end - //求和结束，valid拉高 - //if(k == demod_width-1) iq_valid = 1; + for(j = 0; j < `NUM_WAY; j++)begin + `uvm_info(get_type_name(),$sformatf("demod_i_sum[%h]= %h",j,demod_i_sum[j]),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("demod_q_sum[%h]= %h",j,demod_q_sum[j]),UVM_HIGH) + + end end + + for(j = 0; j < `NUM_WAY; j++)begin + demod_i_sum_final = demod_i_sum_final + demod_i_sum[j]; + demod_q_sum_final = demod_q_sum_final + demod_q_sum[j]; + end + `uvm_info(get_type_name(),$sformatf("demod_i_sum_final= %h",demod_i_sum_final),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("demod_q_sum_final= %h",demod_q_sum_final),UVM_HIGH) + + //iq_sum - //第二次求和，对多次解模的结果求和 - //分动态范围 - scale_data_i = func_ctrl[3] ? demod_i_sum[31:12] : demod_i_sum[27:8]; - scale_data_q = func_ctrl[3] ? demod_q_sum[31:12] : demod_q_sum[27:8]; + scale_data_i = func_ctrl[3] ? demod_i_sum_final[31:12] : demod_i_sum_final[27:8]; + scale_data_q = func_ctrl[3] ? demod_q_sum_final[31:12] : demod_q_sum_final[27:8]; if(iq_sum_en) begin i_sum = i_sum + scale_data_i; q_sum = q_sum + scale_data_q; @@ -546,53 +551,61 @@ task readout_daq_rm::daq_block( else if(iq_clr_en)begin i_sum = 0; q_sum = 0; - end + end + `uvm_info(get_type_name(),$sformatf("iq_sum_en= %h",iq_sum_en),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("scale_data_i = %h",scale_data_i),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("i_sum = %h",i_sum),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("scale_data_q = %h",scale_data_q),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("q_sum = %h",q_sum),UVM_HIGH) + //state_estimate - para_a0 = para_ab0[15:0]; para_b0 = para_ab0[31:16]; - para_a1 = para_ab1[15:0]; para_b1 = para_ab1[31:16]; - para_a2 = para_ab2[15:0]; para_b2 = para_ab2[31:16]; - if(iq_valid)begin - compare[0] = para_a0*demod_i + para_b0*demod_q <= para_c0; - compare[1] = para_a1*demod_i + para_b1*demod_q <= para_c1; - compare[2] = para_a2*demod_i + para_b2*demod_q <= para_c2; + compare_result[0] = (para_ab0[15:0]*demod_i_sum_final + para_ab0[31:16]*demod_q_sum_final <= para_c0) ? 1 : 0; + compare_result[1] = (para_ab1[15:0]*demod_i_sum_final + para_ab1[31:16]*demod_q_sum_final <= para_c1) ? 1 : 0; + compare_result[2] = (para_ab2[15:0]*demod_i_sum_final + para_ab2[31:16]*demod_q_sum_final <= para_c2) ? 1 : 0; - if(compare[0][i] & (~compare[1][i]) + if(compare_result[0] & (~compare_result[1])) state_data = 2'b00; - else if (compare[1][i] & (~compare[2][i]) + else if (compare_result[1] & (~compare_result[2])) state_data = 2'b01; - else if (compare[2][i] & (~compare[0][i]) + else if (compare_result[2] & (~compare_result[0])) state_data = 2'b10; else - state_data = 2'b11; - end + state_data = 2'b11; + `uvm_info(get_type_name(),$sformatf("compare_result = %b ,state_data = %h",compare_result,state_data),UVM_HIGH) //state_statistics if(count_clr_en)begin - count_state_0 = 32'd0; - count_state_1 = 32'd0; - count_state_2 = 32'd0; - count_state_3 = 32'd0; + count_state_0 = 32'd0; + count_state_1 = 32'd0; + count_state_2 = 32'd0; + count_state_3 = 32'd0; end else if(count_add_en)begin count_state_0 = (state_data == 2'b00) ? count_state_0 + 1 : count_state_0; count_state_1 = (state_data == 2'b01) ? count_state_1 + 1 : count_state_1; count_state_2 = (state_data == 2'b10) ? count_state_2 + 1 : count_state_2; count_state_3 = (state_data == 2'b11) ? count_state_3 + 1 : count_state_3; - end - - end - + end + `uvm_info(get_type_name(),$sformatf("count_clr_en = %h",count_clr_en),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("count_add_en = %h",count_add_en),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("count_state_0 = %h",count_state_0),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("count_state_1 = %h",count_state_1),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("count_state_2 = %h",count_state_2),UVM_HIGH) + `uvm_info(get_type_name(),$sformatf("count_state_3 = %h",count_state_3),UVM_HIGH) + + endtask + task readout_daq_rm::dds( - logic [9 :0] address, - logic [7 :0] dds_cos[NUM_WAY-1:0], - logic [7 :0] dds_sin[NUM_WAY-1:0], + input bit unsigned[9 :0] address, + output bit signed[7 :0] dds_cos, + output bit signed[7 :0] dds_sin ); - // 系数表定义 - localparam [6:0] coefficients [0:255] = '{ + + bit [6:0]coefficients [0:255] = { 7'd0, 7'd1, 7'd2, 7'd2, 7'd3, 7'd4, 7'd5, 7'd5, 7'd6, 7'd7, 7'd8, 7'd9, 7'd9, 7'd10, 7'd11, 7'd12, 7'd12, 7'd13, 7'd14, 7'd15, 7'd16, 7'd16, 7'd17, 7'd18, 7'd19, 7'd19, 7'd20, 7'd21, 7'd22, 7'd23, 7'd23, 7'd24, 7'd25, 7'd26, 7'd26, 7'd27, 7'd28, 7'd29, 7'd29, 7'd30, 7'd31, 7'd32, 7'd32, 7'd33, 7'd34, 7'd35, @@ -613,157 +626,579 @@ task readout_daq_rm::dds( 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127, 7'd127 }; - - if (address[9:8] == 2'b00) begin - dds_sin = coefficients(address[7:0]); - end - else if(address[9:8] == 2'b01) begin - dds_sin = coefficients(511-address[7:0]); - end - else if (address[9:8] == 2'b10) begin - dds_sin = -coefficients(address[7:0]-512); - end - else if(address[9:8] == 2'b11) begin - dds_sin = -coefficients(1023-address[7:0]); - end +//dds_sin if (address[9:8] == 2'b00) begin - dds_cos = coefficients(255-address[7:0]); + dds_sin = coefficients[address[7:0]]; +// `uvm_info(get_type_name(),$sformatf("address[7:0] = %h",address[7:0]),UVM_LOW) end - else if(address[9:8] == 2'b01) begin - dds_cos = -coefficients(address[7:0]-256); - end + else if(address[9:8] == 2'b01) begin + dds_sin = coefficients[(address[7:0] == 8'b0) ? 8'hff : 8'd256-address[7:0]]; +// `uvm_info(get_type_name(),$sformatf("8'd255-address[7:0]= %h",8'd255-address[7:0]),UVM_LOW) + end else if (address[9:8] == 2'b10) begin - dds_cos = -coefficients(767-address[7:0]); + dds_sin = -coefficients[address[7:0]]; +// `uvm_info(get_type_name(),$sformatf("address[7:0] = %h",address[7:0]),UVM_LOW) + end - else if(address[9:8] == 2'b11) begin - dds_cos = -coefficients(address[7:0]-768); - end + else if(address[9:8] == 2'b11) begin + dds_sin = -coefficients[(address[7:0] == 8'b0) ? 8'hff : 8'd256-address[7:0]]; +// `uvm_info(get_type_name(),$sformatf("8'd255-address[7:0] = %h",8'd255-address[7:0]),UVM_LOW) + + end +//dds_cos + if (address[9:8] == 2'b00) begin + dds_cos = coefficients[(address[7:0] == 8'b0) ? 8'hff : 8'd256-address[7:0]]; + end + else if(address[9:8] == 2'b01) begin + dds_cos = -coefficients[address[7:0]]; + end + else if (address[9:8] == 2'b10) begin + dds_cos = -coefficients[(address[7:0] == 8'b0) ? 8'hff : 8'd256-address[7:0]]; + end + else if(address[9:8] == 2'b11) begin + dds_cos = coefficients[address[7:0]]; + end + endtask : dds -task readout_daq_rm::data2sram( - logic [31:0] qubit_state , - logic [31:0] state0_count [15:0], - logic [31:0] state0_count [15:0], - logic [31:0] state1_count [15:0], - logic [31:0] state2_count [15:0], - logic [31:0] state3_count [15:0], - logic [31:0] i_sum [15:0], - logic [31:0] q_sum [15:0], - ); -//将qubit_state、iq_sum，count_state写入寄存器 - reg_mems::daq_regfile.set("qubit_state", qubit_state); - - reg_mems::daq_regfile.set("Q0_i_sum", i_sum[0]); - reg_mems::daq_regfile.set("Q1_i_sum", i_sum[1]); - reg_mems::daq_regfile.set("Q2_i_sum", i_sum[2]); - reg_mems::daq_regfile.set("Q3_i_sum", i_sum[3]); - reg_mems::daq_regfile.set("Q4_i_sum", i_sum[4]); - reg_mems::daq_regfile.set("Q5_i_sum", i_sum[5]); - reg_mems::daq_regfile.set("Q6_i_sum", i_sum[6]); - reg_mems::daq_regfile.set("Q7_i_sum", i_sum[7]); - reg_mems::daq_regfile.set("Q8_i_sum", i_sum[8]); - reg_mems::daq_regfile.set("Q9_i_sum", i_sum[9]); - reg_mems::daq_regfile.set("Q10_i_sum", i_sum[10]); - reg_mems::daq_regfile.set("Q11_i_sum", i_sum[11]); - reg_mems::daq_regfile.set("Q12_i_sum", i_sum[12]); - reg_mems::daq_regfile.set("Q13_i_sum", i_sum[13]); - reg_mems::daq_regfile.set("Q14_i_sum", i_sum[14]); - reg_mems::daq_regfile.set("Q15_i_sum", i_sum[15]); - - reg_mems::daq_regfile.set("Q0_q_sum", q_sum[0]); - reg_mems::daq_regfile.set("Q1_q_sum", q_sum[1]); - reg_mems::daq_regfile.set("Q2_q_sum", q_sum[2]); - reg_mems::daq_regfile.set("Q3_q_sum", q_sum[3]); - reg_mems::daq_regfile.set("Q4_q_sum", q_sum[4]); - reg_mems::daq_regfile.set("Q5_q_sum", q_sum[5]); - reg_mems::daq_regfile.set("Q6_q_sum", q_sum[6]); - reg_mems::daq_regfile.set("Q7_q_sum", q_sum[7]); - reg_mems::daq_regfile.set("Q8_q_sum", q_sum[8]); - reg_mems::daq_regfile.set("Q9_q_sum", q_sum[9]); - reg_mems::daq_regfile.set("Q10_q_sum", q_sum[10]); - reg_mems::daq_regfile.set("Q11_q_sum", q_sum[11]); - reg_mems::daq_regfile.set("Q12_q_sum", q_sum[12]); - reg_mems::daq_regfile.set("Q13_q_sum", q_sum[13]); - reg_mems::daq_regfile.set("Q14_q_sum", q_sum[14]); - reg_mems::daq_regfile.set("Q15_q_sum", q_sum[15]); - - - reg_mems::daq_regfile.set("Q0_state0_statistics", count_state_0[0]); - reg_mems::daq_regfile.set("Q1_state0_statistics", count_state_0[1]); - reg_mems::daq_regfile.set("Q2_state0_statistics", count_state_0[2]); - reg_mems::daq_regfile.set("Q3_state0_statistics", count_state_0[3]); - reg_mems::daq_regfile.set("Q4_state0_statistics", count_state_0[4]); - reg_mems::daq_regfile.set("Q5_state0_statistics", count_state_0[5]); - reg_mems::daq_regfile.set("Q6_state0_statistics", count_state_0[6]); - reg_mems::daq_regfile.set("Q7_state0_statistics", count_state_0[7]); - reg_mems::daq_regfile.set("Q8_state0_statistics", count_state_0[8]); - reg_mems::daq_regfile.set("Q9_state0_statistics", count_state_0[9]); - reg_mems::daq_regfile.set("Q10_state0_statistics", count_state_0[10]); - reg_mems::daq_regfile.set("Q11_state0_statistics", count_state_0[11]); - reg_mems::daq_regfile.set("Q12_state0_statistics", count_state_0[12]); - reg_mems::daq_regfile.set("Q13_state0_statistics", count_state_0[13]); - reg_mems::daq_regfile.set("Q14_state0_statistics", count_state_0[14]); - reg_mems::daq_regfile.set("Q15_state0_statistics", count_state_0[15]); - - reg_mems::daq_regfile.set("Q0_state1_statistics", count_state_1[0]); - reg_mems::daq_regfile.set("Q1_state1_statistics", count_state_1[1]); - reg_mems::daq_regfile.set("Q2_state1_statistics", count_state_1[2]); - reg_mems::daq_regfile.set("Q3_state1_statistics", count_state_1[3]); - reg_mems::daq_regfile.set("Q4_state1_statistics", count_state_1[4]); - reg_mems::daq_regfile.set("Q5_state1_statistics", count_state_1[5]); - reg_mems::daq_regfile.set("Q6_state1_statistics", count_state_1[6]); - reg_mems::daq_regfile.set("Q7_state1_statistics", count_state_1[7]); - reg_mems::daq_regfile.set("Q8_state1_statistics", count_state_1[8]); - reg_mems::daq_regfile.set("Q9_state1_statistics", count_state_1[9]); - reg_mems::daq_regfile.set("Q10_state1_statistics", count_state_1[10]); - reg_mems::daq_regfile.set("Q11_state1_statistics", count_state_1[11]); - reg_mems::daq_regfile.set("Q12_state1_statistics", count_state_1[12]); - reg_mems::daq_regfile.set("Q13_state1_statistics", count_state_1[13]); - reg_mems::daq_regfile.set("Q14_state1_statistics", count_state_1[14]); - reg_mems::daq_regfile.set("Q15_state1_statistics", count_state_1[15]); - - reg_mems::daq_regfile.set("Q0_state2_statistics", count_state_2[0]); - reg_mems::daq_regfile.set("Q1_state2_statistics", count_state_2[1]); - reg_mems::daq_regfile.set("Q2_state2_statistics", count_state_2[2]); - reg_mems::daq_regfile.set("Q3_state2_statistics", count_state_2[3]); - reg_mems::daq_regfile.set("Q4_state2_statistics", count_state_2[4]); - reg_mems::daq_regfile.set("Q5_state2_statistics", count_state_2[5]); - reg_mems::daq_regfile.set("Q6_state2_statistics", count_state_2[6]); - reg_mems::daq_regfile.set("Q7_state2_statistics", count_state_2[7]); - reg_mems::daq_regfile.set("Q8_state2_statistics", count_state_2[8]); - reg_mems::daq_regfile.set("Q9_state2_statistics", count_state_2[9]); - reg_mems::daq_regfile.set("Q10_state2_statistics", count_state_2[10]); - reg_mems::daq_regfile.set("Q11_state2_statistics", count_state_2[11]); - reg_mems::daq_regfile.set("Q12_state2_statistics", count_state_2[12]); - reg_mems::daq_regfile.set("Q13_state2_statistics", count_state_2[13]); - reg_mems::daq_regfile.set("Q14_state2_statistics", count_state_2[14]); - reg_mems::daq_regfile.set("Q15_state2_statistics", count_state_2[15]); - - reg_mems::daq_regfile.set("Q0_state3_statistics", count_state_3[0]); - reg_mems::daq_regfile.set("Q1_state3_statistics", count_state_3[1]); - reg_mems::daq_regfile.set("Q2_state3_statistics", count_state_3[2]); - reg_mems::daq_regfile.set("Q3_state3_statistics", count_state_3[3]); - reg_mems::daq_regfile.set("Q4_state3_statistics", count_state_3[4]); - reg_mems::daq_regfile.set("Q5_state3_statistics", count_state_3[5]); - reg_mems::daq_regfile.set("Q6_state3_statistics", count_state_3[6]); - reg_mems::daq_regfile.set("Q7_state3_statistics", count_state_3[7]); - reg_mems::daq_regfile.set("Q8_state3_statistics", count_state_3[8]); - reg_mems::daq_regfile.set("Q9_state3_statistics", count_state_3[9]); - reg_mems::daq_regfile.set("Q10_state3_statistics", count_state_3[10]); - reg_mems::daq_regfile.set("Q11_state3_statistics", count_state_3[11]); - reg_mems::daq_regfile.set("Q12_state3_statistics", count_state_3[12]); - reg_mems::daq_regfile.set("Q13_state3_statistics", count_state_3[13]); - reg_mems::daq_regfile.set("Q14_state3_statistics", count_state_3[14]); - reg_mems::daq_regfile.set("Q15_state3_statistics", count_state_3[15]); - -//将wave数据、iq_sum、qubit_state、count_state存入队列，并根据需要进行推送 - endtask + + +task readout_daq_rm::get_config_data(); + forever begin + @(posedge `CLK); +///////////////////////////////////////////////////// +//daq_config_reg +///////////////////////////////////////////////////// +/* + if(ram_data.exists(`DAQ_MCU_TIMER)) begin + mcu_timer = ram_data[`DAQ_MCU_TIMER]; + end + if(ram_data.exists(`DAQ_MCU_COUNTER)) begin + mcu_counter = ram_data[`DAQ_MCU_COUNTER]; + end + if(ram_data.exists(`DAQ_LOCAL_STATE)) begin + loc_state = ram_data[`DAQ_LOCAL_STATE]; + end + if(ram_data.exists(`DAQ_GLB_STATE)) begin + glb_state = ram_data[`DAQ_GLB_STATE]; + end + if(ram_data.exists(`DAQ_FEED_DATA)) begin + feed_data = ram_data[`DAQ_FEED_DATA]; + end + + if(ram_data.exists(`DAQ_SRAM_COUNT)) begin + sram_count= ram_data[`DAQ_SRAM_COUNT]; + end + if(ram_data.exists(`DAQ_PUSH_COUNT)) begin + push_count = ram_data[`DAQ_PUSH_COUNT]; + end +*/ + + if(ram_data.exists(`DAQ_SEND_DATA)) begin + send_data = ram_data[`DAQ_SEND_DATA]; + end + + if(ram_data.exists(`DAQ_COMMAND)) begin + command = ram_data[`DAQ_COMMAND]; + end + if(ram_data.exists(`DAQ_FUNC)) begin + func_ctrl = ram_data[`DAQ_FUNC]; + end else begin + func_ctrl = 32'h8000; + end + if(ram_data.exists(`WAVE_SAMPLE_DEPTH)) begin + sample_depth = ram_data[`WAVE_SAMPLE_DEPTH]; + end else begin + sample_depth = 32'h100; + end + if(ram_data.exists(`READ_THRESHOLD)) begin + int_threshold = ram_data[`READ_THRESHOLD]; + end else begin + int_threshold = 32'h100; + end +/* + if(ram_data.exists(`QUBIT_STATE)) begin + qubit_state = ram_data[`QUBIT_STATE]; + end +*/ + if(ram_data.exists(`READ_REQ_CTRL)) begin + read_req_ctrl= ram_data[`READ_REQ_CTRL]; + end else begin + read_req_ctrl= 32'h40004; + end +///////////////////////////////////////////////////// +//demod_width[15:0] +//////////////////////////////////////////////////// + if(ram_data.exists(`DEMOD_WIDTH_Q0)) begin + demod_width[0] = ram_data[`DEMOD_WIDTH_Q0]; +// `uvm_info(get_type_name(),$sformatf("demod_width_q0=%0h",demod_width[0]),UVM_LOW) + end else begin + demod_width[0] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q1)) begin + demod_width[1] = ram_data[`DEMOD_WIDTH_Q1]; + end else begin + demod_width[1] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q2)) begin + demod_width[2] = ram_data[`DEMOD_WIDTH_Q2]; + end else begin + demod_width[2] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q3)) begin + demod_width[3] = ram_data[`DEMOD_WIDTH_Q3]; + end else begin + demod_width[3] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q4)) begin + demod_width[4] = ram_data[`DEMOD_WIDTH_Q4]; + end else begin + demod_width[4] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q5)) begin + demod_width[5] = ram_data[`DEMOD_WIDTH_Q5]; + end else begin + demod_width[5] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q6)) begin + demod_width[6] = ram_data[`DEMOD_WIDTH_Q6]; + end else begin + demod_width[6] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q7)) begin + demod_width[7] = ram_data[`DEMOD_WIDTH_Q7]; + end else begin + demod_width[7] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q8)) begin + demod_width[8] = ram_data[`DEMOD_WIDTH_Q8]; + end else begin + demod_width[8] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q9)) begin + demod_width[9] = ram_data[`DEMOD_WIDTH_Q9]; + end else begin + demod_width[9] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q10)) begin + demod_width[10] = ram_data[`DEMOD_WIDTH_Q10]; + end else begin + demod_width[10] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q11)) begin + demod_width[11] = ram_data[`DEMOD_WIDTH_Q11]; + end else begin + demod_width[11] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q12)) begin + demod_width[12] = ram_data[`DEMOD_WIDTH_Q12]; + end else begin + demod_width[12] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q13)) begin + demod_width[13] = ram_data[`DEMOD_WIDTH_Q13]; + end else begin + demod_width[13] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q14)) begin + demod_width[14] = ram_data[`DEMOD_WIDTH_Q14]; + end else begin + demod_width[14] = 32'h100; + end + if(ram_data.exists(`DEMOD_WIDTH_Q15)) begin + demod_width[15] = ram_data[`DEMOD_WIDTH_Q15]; + end else begin + demod_width[15] = 32'h100; + end +///////////////////////////////////////////////////// +//demod_freq[15:0] +//////////////////////////////////////////////////// + if(ram_data.exists(`DEMOD_FREQ_Q0)) begin + demod_freq[0] = ram_data[`DEMOD_FREQ_Q0]; +// `uvm_info(get_type_name(),$sformatf("demod_freq=%0h",demod_freq[0]),UVM_LOW) + end else begin + demod_freq[0] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q1)) begin + demod_freq[1] = ram_data[`DEMOD_FREQ_Q1]; + end else begin + demod_freq[1] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q2)) begin + demod_freq[2] = ram_data[`DEMOD_FREQ_Q2]; + end else begin + demod_freq[2] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q3)) begin + demod_freq[3] = ram_data[`DEMOD_FREQ_Q3]; + end else begin + demod_freq[3] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q4)) begin + demod_freq[4] = ram_data[`DEMOD_FREQ_Q4]; + end else begin + demod_freq[4] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q5)) begin + demod_freq[5] = ram_data[`DEMOD_FREQ_Q5]; + end else begin + demod_freq[5] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q6)) begin + demod_freq[6] = ram_data[`DEMOD_FREQ_Q6]; + end else begin + demod_freq[6] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q7)) begin + demod_freq[7] = ram_data[`DEMOD_FREQ_Q7]; + end else begin + demod_freq[7] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q8)) begin + demod_freq[8] = ram_data[`DEMOD_FREQ_Q8]; + end else begin + demod_freq[8] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q9)) begin + demod_freq[9] = ram_data[`DEMOD_FREQ_Q9]; + end else begin + demod_freq[9] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q10)) begin + demod_freq[10] = ram_data[`DEMOD_FREQ_Q10]; + end else begin + demod_freq[10] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q11)) begin + demod_freq[11] = ram_data[`DEMOD_FREQ_Q11]; + end else begin + demod_freq[11] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q12)) begin + demod_freq[12] = ram_data[`DEMOD_FREQ_Q12]; + end else begin + demod_freq[12] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q13)) begin + demod_freq[13] = ram_data[`DEMOD_FREQ_Q13]; + end else begin + demod_freq[13] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q14)) begin + demod_freq[14] = ram_data[`DEMOD_FREQ_Q14]; + end else begin + demod_freq[14] = 32'h1000_0000; + end + if(ram_data.exists(`DEMOD_FREQ_Q15)) begin + demod_freq[15] = ram_data[`DEMOD_FREQ_Q15]; + end else begin + demod_freq[15] = 32'h1000_0000; + end +///////////////////////////////////////////////////// +//para_ab0[15:0] para_c0[15:0] +//////////////////////////////////////////////////// + if(ram_data.exists(`PARA_AB0_Q0)) begin + para_ab0[0] = ram_data[`PARA_AB0_Q0]; + end + if(ram_data.exists(`PARA_AB0_Q1)) begin + para_ab0[1] = ram_data[`PARA_AB0_Q1]; + end + if(ram_data.exists(`PARA_AB0_Q2)) begin + para_ab0[2] = ram_data[`PARA_AB0_Q2]; + end + if(ram_data.exists(`PARA_AB0_Q3)) begin + para_ab0[3] = ram_data[`PARA_AB0_Q3]; + end + if(ram_data.exists(`PARA_AB0_Q4)) begin + para_ab0[4] = ram_data[`PARA_AB0_Q4]; + end + if(ram_data.exists(`PARA_AB0_Q5)) begin + para_ab0[5] = ram_data[`PARA_AB0_Q5]; + end + if(ram_data.exists(`PARA_AB0_Q6)) begin + para_ab0[6] = ram_data[`PARA_AB0_Q6]; + end + if(ram_data.exists(`PARA_AB0_Q7)) begin + para_ab0[7] = ram_data[`PARA_AB0_Q7]; + end + if(ram_data.exists(`PARA_AB0_Q8)) begin + para_ab0[8] = ram_data[`PARA_AB0_Q8]; + end + if(ram_data.exists(`PARA_AB0_Q9)) begin + para_ab0[9] = ram_data[`PARA_AB0_Q9]; + end + if(ram_data.exists(`PARA_AB0_Q10)) begin + para_ab0[10] = ram_data[`PARA_AB0_Q10]; + end + if(ram_data.exists(`PARA_AB0_Q11)) begin + para_ab0[11] = ram_data[`PARA_AB0_Q11]; + end + if(ram_data.exists(`PARA_AB0_Q12)) begin + para_ab0[12] = ram_data[`PARA_AB0_Q12]; + end + if(ram_data.exists(`PARA_AB0_Q13)) begin + para_ab0[13] = ram_data[`PARA_AB0_Q13]; + end + if(ram_data.exists(`PARA_AB0_Q14)) begin + para_ab0[14] = ram_data[`PARA_AB0_Q14]; + end + if(ram_data.exists(`PARA_AB0_Q15)) begin + para_ab0[15] = ram_data[`PARA_AB0_Q15]; + end + if(ram_data.exists(`PARA_C0_Q0)) begin + para_c0[0] = ram_data[`PARA_C0_Q0]; + end + if(ram_data.exists(`PARA_C0_Q1)) begin + para_c0[1] = ram_data[`PARA_C0_Q1]; + end + if(ram_data.exists(`PARA_C0_Q2)) begin + para_c0[2] = ram_data[`PARA_C0_Q2]; + end + if(ram_data.exists(`PARA_C0_Q3)) begin + para_c0[3] = ram_data[`PARA_C0_Q3]; + end + if(ram_data.exists(`PARA_C0_Q4)) begin + para_c0[4] = ram_data[`PARA_C0_Q4]; + end + if(ram_data.exists(`PARA_C0_Q5)) begin + para_c0[5] = ram_data[`PARA_C0_Q5]; + end + if(ram_data.exists(`PARA_C0_Q6)) begin + para_c0[6] = ram_data[`PARA_C0_Q6]; + end + if(ram_data.exists(`PARA_C0_Q7)) begin + para_c0[7] = ram_data[`PARA_C0_Q7]; + end + if(ram_data.exists(`PARA_C0_Q8)) begin + para_c0[8] = ram_data[`PARA_C0_Q8]; + end + if(ram_data.exists(`PARA_C0_Q9)) begin + para_c0[9] = ram_data[`PARA_C0_Q9]; + end + if(ram_data.exists(`PARA_C0_Q10)) begin + para_c0[10] = ram_data[`PARA_C0_Q10]; + end + if(ram_data.exists(`PARA_C0_Q11)) begin + para_c0[11] = ram_data[`PARA_C0_Q11]; + end + if(ram_data.exists(`PARA_C0_Q12)) begin + para_c0[12] = ram_data[`PARA_C0_Q12]; + end + if(ram_data.exists(`PARA_C0_Q13)) begin + para_c0[13] = ram_data[`PARA_C0_Q13]; + end + if(ram_data.exists(`PARA_C0_Q14)) begin + para_c0[14] = ram_data[`PARA_C0_Q14]; + end + if(ram_data.exists(`PARA_C0_Q15)) begin + para_c0[15] = ram_data[`PARA_C0_Q15]; + end +///////////////////////////////////////////////////// +//para_ab1[15:0] para_c1[15:0] +//////////////////////////////////////////////////// + if(ram_data.exists(`PARA_AB1_Q0)) begin + para_ab1[0] = ram_data[`PARA_AB1_Q0]; + end + if(ram_data.exists(`PARA_AB1_Q1)) begin + para_ab1[1] = ram_data[`PARA_AB1_Q1]; + end + if(ram_data.exists(`PARA_AB1_Q2)) begin + para_ab1[2] = ram_data[`PARA_AB1_Q2]; + end + if(ram_data.exists(`PARA_AB1_Q3)) begin + para_ab1[3] = ram_data[`PARA_AB1_Q3]; + end + if(ram_data.exists(`PARA_AB1_Q4)) begin + para_ab1[4] = ram_data[`PARA_AB1_Q4]; + end + if(ram_data.exists(`PARA_AB1_Q5)) begin + para_ab1[5] = ram_data[`PARA_AB1_Q5]; + end + if(ram_data.exists(`PARA_AB1_Q6)) begin + para_ab1[6] = ram_data[`PARA_AB1_Q6]; + end + if(ram_data.exists(`PARA_AB1_Q7)) begin + para_ab1[7] = ram_data[`PARA_AB1_Q7]; + end + if(ram_data.exists(`PARA_AB1_Q8)) begin + para_ab1[8] = ram_data[`PARA_AB1_Q8]; + end + if(ram_data.exists(`PARA_AB1_Q9)) begin + para_ab1[9] = ram_data[`PARA_AB1_Q9]; + end + if(ram_data.exists(`PARA_AB1_Q10)) begin + para_ab1[10] = ram_data[`PARA_AB1_Q10]; + end + if(ram_data.exists(`PARA_AB1_Q11)) begin + para_ab1[11] = ram_data[`PARA_AB1_Q11]; + end + if(ram_data.exists(`PARA_AB1_Q12)) begin + para_ab1[12] = ram_data[`PARA_AB1_Q12]; + end + if(ram_data.exists(`PARA_AB1_Q13)) begin + para_ab1[13] = ram_data[`PARA_AB1_Q13]; + end + if(ram_data.exists(`PARA_AB1_Q14)) begin + para_ab1[14] = ram_data[`PARA_AB1_Q14]; + end + if(ram_data.exists(`PARA_AB1_Q15)) begin + para_ab1[15] = ram_data[`PARA_AB1_Q15]; + end + if(ram_data.exists(`PARA_C1_Q0)) begin + para_c1[0] = ram_data[`PARA_C1_Q0]; + end + if(ram_data.exists(`PARA_C1_Q1)) begin + para_c1[1] = ram_data[`PARA_C1_Q1]; + end + if(ram_data.exists(`PARA_C1_Q2)) begin + para_c1[2] = ram_data[`PARA_C1_Q2]; + end + if(ram_data.exists(`PARA_C1_Q3)) begin + para_c1[3] = ram_data[`PARA_C1_Q3]; + end + if(ram_data.exists(`PARA_C1_Q4)) begin + para_c1[4] = ram_data[`PARA_C1_Q4]; + end + if(ram_data.exists(`PARA_C1_Q5)) begin + para_c1[5] = ram_data[`PARA_C1_Q5]; + end + if(ram_data.exists(`PARA_C1_Q6)) begin + para_c1[6] = ram_data[`PARA_C1_Q6]; + end + if(ram_data.exists(`PARA_C1_Q7)) begin + para_c1[7] = ram_data[`PARA_C1_Q7]; + end + if(ram_data.exists(`PARA_C1_Q8)) begin + para_c1[8] = ram_data[`PARA_C1_Q8]; + end + if(ram_data.exists(`PARA_C1_Q9)) begin + para_c1[9] = ram_data[`PARA_C1_Q9]; + end + if(ram_data.exists(`PARA_C1_Q10)) begin + para_c1[10] = ram_data[`PARA_C1_Q10]; + end + if(ram_data.exists(`PARA_C1_Q11)) begin + para_c1[11] = ram_data[`PARA_C1_Q11]; + end + if(ram_data.exists(`PARA_C1_Q12)) begin + para_c1[12] = ram_data[`PARA_C1_Q12]; + end + if(ram_data.exists(`PARA_C1_Q13)) begin + para_c1[13] = ram_data[`PARA_C1_Q13]; + end + if(ram_data.exists(`PARA_C1_Q14)) begin + para_c1[14] = ram_data[`PARA_C1_Q14]; + end + if(ram_data.exists(`PARA_C1_Q15)) begin + para_c1[15] = ram_data[`PARA_C1_Q15]; + end +///////////////////////////////////////////////////// +//para_ab2[15:0] para_c2[15:0] +//////////////////////////////////////////////////// + if(ram_data.exists(`PARA_AB2_Q0)) begin + para_ab2[0] = ram_data[`PARA_AB2_Q0]; + end + if(ram_data.exists(`PARA_AB2_Q1)) begin + para_ab2[1] = ram_data[`PARA_AB2_Q1]; + end + if(ram_data.exists(`PARA_AB2_Q2)) begin + para_ab2[2] = ram_data[`PARA_AB2_Q2]; + end + if(ram_data.exists(`PARA_AB2_Q3)) begin + para_ab2[3] = ram_data[`PARA_AB2_Q3]; + end + if(ram_data.exists(`PARA_AB2_Q4)) begin + para_ab2[4] = ram_data[`PARA_AB2_Q4]; + end + if(ram_data.exists(`PARA_AB2_Q5)) begin + para_ab2[5] = ram_data[`PARA_AB2_Q5]; + end + if(ram_data.exists(`PARA_AB2_Q6)) begin + para_ab2[6] = ram_data[`PARA_AB2_Q6]; + end + if(ram_data.exists(`PARA_AB2_Q7)) begin + para_ab2[7] = ram_data[`PARA_AB2_Q7]; + end + if(ram_data.exists(`PARA_AB2_Q8)) begin + para_ab2[8] = ram_data[`PARA_AB2_Q8]; + end + if(ram_data.exists(`PARA_AB2_Q9)) begin + para_ab2[9] = ram_data[`PARA_AB2_Q9]; + end + if(ram_data.exists(`PARA_AB2_Q10)) begin + para_ab2[10] = ram_data[`PARA_AB2_Q10]; + end + if(ram_data.exists(`PARA_AB2_Q11)) begin + para_ab2[11] = ram_data[`PARA_AB2_Q11]; + end + if(ram_data.exists(`PARA_AB2_Q12)) begin + para_ab2[12] = ram_data[`PARA_AB2_Q12]; + end + if(ram_data.exists(`PARA_AB2_Q13)) begin + para_ab2[13] = ram_data[`PARA_AB2_Q13]; + end + if(ram_data.exists(`PARA_AB2_Q14)) begin + para_ab2[14] = ram_data[`PARA_AB2_Q14]; + end + if(ram_data.exists(`PARA_AB2_Q15)) begin + para_ab2[15] = ram_data[`PARA_AB2_Q15]; + end + if(ram_data.exists(`PARA_C2_Q0)) begin + para_c2[0] = ram_data[`PARA_C2_Q0]; + end + if(ram_data.exists(`PARA_C2_Q1)) begin + para_c2[1] = ram_data[`PARA_C2_Q1]; + end + if(ram_data.exists(`PARA_C2_Q2)) begin + para_c2[2] = ram_data[`PARA_C2_Q2]; + end + if(ram_data.exists(`PARA_C2_Q3)) begin + para_c2[3] = ram_data[`PARA_C2_Q3]; + end + if(ram_data.exists(`PARA_C2_Q4)) begin + para_c2[4] = ram_data[`PARA_C2_Q4]; + end + if(ram_data.exists(`PARA_C2_Q5)) begin + para_c2[5] = ram_data[`PARA_C2_Q5]; + end + if(ram_data.exists(`PARA_C2_Q6)) begin + para_c2[6] = ram_data[`PARA_C2_Q6]; + end + if(ram_data.exists(`PARA_C2_Q7)) begin + para_c2[7] = ram_data[`PARA_C2_Q7]; + end + if(ram_data.exists(`PARA_C2_Q8)) begin + para_c2[8] = ram_data[`PARA_C2_Q8]; + end + if(ram_data.exists(`PARA_C2_Q9)) begin + para_c2[9] = ram_data[`PARA_C2_Q9]; + end + if(ram_data.exists(`PARA_C2_Q10)) begin + para_c2[10] = ram_data[`PARA_C2_Q10]; + end + if(ram_data.exists(`PARA_C2_Q11)) begin + para_c2[11] = ram_data[`PARA_C2_Q11]; + end + if(ram_data.exists(`PARA_C2_Q12)) begin + para_c2[12] = ram_data[`PARA_C2_Q12]; + end + if(ram_data.exists(`PARA_C2_Q13)) begin + para_c2[13] = ram_data[`PARA_C2_Q13]; + end + if(ram_data.exists(`PARA_C2_Q14)) begin + para_c2[14] = ram_data[`PARA_C2_Q14]; + end + if(ram_data.exists(`PARA_C2_Q15)) begin + para_c2[15] = ram_data[`PARA_C2_Q15]; + end + end +endtask `endif - \ No newline at end of file +