37 lines
		
	
	
		
			820 B
		
	
	
	
		
			Makefile
		
	
	
	
		
		
			
		
	
	
			37 lines
		
	
	
		
			820 B
		
	
	
	
		
			Makefile
		
	
	
	
|  | all_sv:com_sv sim_sv  | ||
|  | all_ucli:com_ucli sim_ucli verdi_ucli | ||
|  | 
 | ||
|  | com_sv: | ||
|  | 	vcs -full64 -sverilog -ntb_opts uvm-1.2 +vcs+loopreport+1000  -debug_acc+all -debug_region+cell+encrypt \
 | ||
|  | 	-f files.f -l com.log -fsdb +define+FSDB  | ||
|  | 
 | ||
|  | 
 | ||
|  | com_ucli: | ||
|  | 	vcs -full64 -sverilog -debug_acc+all -debug_region+cell+encrypt \
 | ||
|  | 	-LDFLAGS \
 | ||
|  | 	-rdynamic \
 | ||
|  | 	-P $(VERDI_HOME)/share/PLI/VCS/linux64/novas.tab \
 | ||
|  | 	$(VERDI_HOME)/share/PLI/VCS/linux64/pli.a \
 | ||
|  | 	-f files.f \
 | ||
|  | 	+vcs+lic+wait \
 | ||
|  | 	-l com.log | ||
|  | 
 | ||
|  | sim_sv: | ||
|  | 	./simv  +vcs+loopreport -sv_lib DPI_Component -l sim.log  | ||
|  | 
 | ||
|  | sim_ucli: | ||
|  | 	./simv \
 | ||
|  | 	-ucli -i loop_detect.tcl +fsdb+autoflush \
 | ||
|  | 	-l sim.log | ||
|  | dve: | ||
|  | 	dve -full64 -vpd vcdplus.vpd & | ||
|  | 
 | ||
|  | dbg: | ||
|  | 	verdi & -sv -f files.f -ssf *.fsdb -nologe  | ||
|  | 
 | ||
|  | clean: | ||
|  | 	rm -rf csrc *.log *.key *simv* *.vpd *DVE* | ||
|  | 	rm -rf verdiLog *.fsdb *.bak *.conf | ||
|  | file: | ||
|  | 	find -name "*.sv" > files.f |