thermometer_digital/sim/therm_chip_top/verdiLog/compiler.log

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*design* DebussyLib (btIdent Verdi_O-2018.09-SP2)
Command arguments:
+define+verilog
-sverilog
-f filelist_vlg.f
../../rtl/systemregfile/my_systemregfile.v
../../rtl/systemregfile/sirv_gnrl_dffs.v
../../rtl/digital_top.v
../../rtl/uart/uart_byte_rx.v
../../rtl/uart/uart_ctrl_sysreg.v
../../rtl/uart/uart_top_32bit.v
../../rtl/uart/uart_byte_tx.v
../../rtl/therm/digital_thermometer.v
../../rtl/therm/pulse_cnt.v
./TB.sv
-top
TB
Highest level modules:
sirv_gnrl_dfflrs
sirv_gnrl_dffl
sirv_gnrl_dffrs
sirv_gnrl_ltch
TB
Total 0 error(s), 0 warning(s)