2802 lines
75 KiB
JSON
2802 lines
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22
|
|
],
|
|
"PVSS3AC_V_G": [
|
|
"PVSS3AC_V_G",
|
|
"i0k2A",
|
|
"module",
|
|
109
|
|
],
|
|
"PDDW08SDGZ_H_G": [
|
|
"PDDW08SDGZ_H_G",
|
|
"QjV6F",
|
|
"module",
|
|
16
|
|
],
|
|
"ulink_descrambler_32": [
|
|
"ulink_descrambler_32",
|
|
"yuek5",
|
|
"module",
|
|
120
|
|
],
|
|
"PVSS1AC_V_G": [
|
|
"PVSS1AC_V_G",
|
|
"I7RzE",
|
|
"module",
|
|
93
|
|
],
|
|
"PDDW08SDGZ_V_G": [
|
|
"PDDW08SDGZ_V_G",
|
|
"N1ndr",
|
|
"module",
|
|
17
|
|
],
|
|
"PRDW08SDGZ_H_G": [
|
|
"PRDW08SDGZ_H_G",
|
|
"S90qD",
|
|
"module",
|
|
50
|
|
],
|
|
"PDDW12DGZ_H_G": [
|
|
"PDDW12DGZ_H_G",
|
|
"atFKr",
|
|
"module",
|
|
18
|
|
],
|
|
"PDDW12SDGZ_V_G": [
|
|
"PDDW12SDGZ_V_G",
|
|
"Pzaun",
|
|
"module",
|
|
21
|
|
],
|
|
"PVDD1ANA_V_G": [
|
|
"PVDD1ANA_V_G",
|
|
"BL1m7",
|
|
"module",
|
|
77
|
|
],
|
|
"PVDD3A_H_G": [
|
|
"PVDD3A_H_G",
|
|
"DTJPF",
|
|
"module",
|
|
86
|
|
],
|
|
"PDDW16DGZ_V_G": [
|
|
"PDDW16DGZ_V_G",
|
|
"StNiL",
|
|
"module",
|
|
23
|
|
],
|
|
"PDUW04DGZ_H_G": [
|
|
"PDUW04DGZ_H_G",
|
|
"YTwQz",
|
|
"module",
|
|
26
|
|
],
|
|
"PVDD2DGZ_H_G": [
|
|
"PVDD2DGZ_H_G",
|
|
"nULrd",
|
|
"module",
|
|
82
|
|
],
|
|
"PDUW08DGZ_H_G": [
|
|
"PDUW08DGZ_H_G",
|
|
"KkPJH",
|
|
"module",
|
|
30
|
|
],
|
|
"PDUW08SDGZ_H_G": [
|
|
"PDUW08SDGZ_H_G",
|
|
"gxqJp",
|
|
"module",
|
|
32
|
|
],
|
|
"ulink_descrambler_128": [
|
|
"ulink_descrambler_128",
|
|
"qxEhc",
|
|
"module",
|
|
121
|
|
],
|
|
"sram_if": [
|
|
"sram_if",
|
|
"NABmh",
|
|
"module",
|
|
130
|
|
],
|
|
"PRCUTA_G": [
|
|
"PRCUTA_G",
|
|
"uuDJt",
|
|
"module",
|
|
47
|
|
],
|
|
"PVDD1ANA_H_G": [
|
|
"PVDD1ANA_H_G",
|
|
"fEWTj",
|
|
"module",
|
|
76
|
|
],
|
|
"PDUW08SDGZ_V_G": [
|
|
"PDUW08SDGZ_V_G",
|
|
"UxPrL",
|
|
"module",
|
|
33
|
|
],
|
|
"DA4008_DEM_Parallel_PRBS_64CH": [
|
|
"DA4008_DEM_Parallel_PRBS_64CH",
|
|
"q09PC",
|
|
"module",
|
|
140
|
|
],
|
|
"PDUW12DGZ_H_G": [
|
|
"PDUW12DGZ_H_G",
|
|
"HYpLe",
|
|
"module",
|
|
34
|
|
],
|
|
"PVSS1AC_H_G": [
|
|
"PVSS1AC_H_G",
|
|
"EZJLH",
|
|
"module",
|
|
92
|
|
],
|
|
"PDUW12DGZ_V_G": [
|
|
"PDUW12DGZ_V_G",
|
|
"NkwYe",
|
|
"module",
|
|
35
|
|
],
|
|
"PRUW16DGZ_H_G": [
|
|
"PRUW16DGZ_H_G",
|
|
"AVYgt",
|
|
"module",
|
|
68
|
|
],
|
|
"PDUW16SDGZ_V_G": [
|
|
"PDUW16SDGZ_V_G",
|
|
"qePm9",
|
|
"module",
|
|
41
|
|
],
|
|
"PDXOEDG_H_G": [
|
|
"PDXOEDG_H_G",
|
|
"IYQDs",
|
|
"module",
|
|
42
|
|
],
|
|
"PENDCAP_G": [
|
|
"PENDCAP_G",
|
|
"bhWYh",
|
|
"module",
|
|
44
|
|
],
|
|
"PRUW08DGZ_V_G": [
|
|
"PRUW08DGZ_V_G",
|
|
"EtT2L",
|
|
"module",
|
|
61
|
|
],
|
|
"PVDD2ANA_H_G": [
|
|
"PVDD2ANA_H_G",
|
|
"mZVHG",
|
|
"module",
|
|
80
|
|
],
|
|
"PRCUT_G": [
|
|
"PRCUT_G",
|
|
"uQmb5",
|
|
"module",
|
|
46
|
|
],
|
|
"DW_pulse_sync_0000": [
|
|
"DW_pulse_sync_0000",
|
|
"Ss3zK",
|
|
"module",
|
|
150
|
|
],
|
|
"PVDD1DGZ_H_G": [
|
|
"PVDD1DGZ_H_G",
|
|
"Eie6s",
|
|
"module",
|
|
78
|
|
],
|
|
"PRDW08DGZ_H_G": [
|
|
"PRDW08DGZ_H_G",
|
|
"swWa5",
|
|
"module",
|
|
48
|
|
],
|
|
"PVSS1A_H_G": [
|
|
"PVSS1A_H_G",
|
|
"aYKwj",
|
|
"module",
|
|
90
|
|
],
|
|
"PVSS1DGZ_V_G": [
|
|
"PVSS1DGZ_V_G",
|
|
"jHcbf",
|
|
"module",
|
|
97
|
|
],
|
|
"PRDW08DGZ_V_G": [
|
|
"PRDW08DGZ_V_G",
|
|
"ZZxj5",
|
|
"module",
|
|
49
|
|
],
|
|
"PRDW12DGZ_H_G": [
|
|
"PRDW12DGZ_H_G",
|
|
"VaZm2",
|
|
"module",
|
|
52
|
|
],
|
|
"PRDW12DGZ_V_G": [
|
|
"PRDW12DGZ_V_G",
|
|
"ZKk4u",
|
|
"module",
|
|
53
|
|
],
|
|
"TB": [
|
|
"TB",
|
|
"sH4Fc",
|
|
"module",
|
|
152
|
|
],
|
|
"PVDD2POC_H_G": [
|
|
"PVDD2POC_H_G",
|
|
"avdwk",
|
|
"module",
|
|
84
|
|
],
|
|
"PRDW12SDGZ_H_G": [
|
|
"PRDW12SDGZ_H_G",
|
|
"fTzb4",
|
|
"module",
|
|
54
|
|
],
|
|
"PRDW16DGZ_H_G": [
|
|
"PRDW16DGZ_H_G",
|
|
"EEqKt",
|
|
"module",
|
|
56
|
|
],
|
|
"PRDW16SDGZ_H_G": [
|
|
"PRDW16SDGZ_H_G",
|
|
"V63WF",
|
|
"module",
|
|
58
|
|
],
|
|
"PRUW12DGZ_H_G": [
|
|
"PRUW12DGZ_H_G",
|
|
"hpMjC",
|
|
"module",
|
|
64
|
|
],
|
|
"PRUW08DGZ_H_G": [
|
|
"PRUW08DGZ_H_G",
|
|
"fLemy",
|
|
"module",
|
|
60
|
|
],
|
|
"PRUW08SDGZ_H_G": [
|
|
"PRUW08SDGZ_H_G",
|
|
"gwpgC",
|
|
"module",
|
|
62
|
|
],
|
|
"dacif_0000": [
|
|
"dacif_0000",
|
|
"yeRHW",
|
|
"module",
|
|
116
|
|
],
|
|
"PRUW08SDGZ_V_G": [
|
|
"PRUW08SDGZ_V_G",
|
|
"VJ8Wg",
|
|
"module",
|
|
63
|
|
],
|
|
"PRUW12DGZ_V_G": [
|
|
"PRUW12DGZ_V_G",
|
|
"pucZW",
|
|
"module",
|
|
65
|
|
],
|
|
"PRUW12SDGZ_H_G": [
|
|
"PRUW12SDGZ_H_G",
|
|
"EkH6u",
|
|
"module",
|
|
66
|
|
],
|
|
"PRUW16DGZ_V_G": [
|
|
"PRUW16DGZ_V_G",
|
|
"ErxQ3",
|
|
"module",
|
|
69
|
|
],
|
|
"PRUW16SDGZ_H_G": [
|
|
"PRUW16SDGZ_H_G",
|
|
"riJVY",
|
|
"module",
|
|
70
|
|
],
|
|
"spi_if": [
|
|
"spi_if",
|
|
"IHYdB",
|
|
"module",
|
|
145
|
|
],
|
|
"PVDD1A_H_G": [
|
|
"PVDD1A_H_G",
|
|
"zNPu5",
|
|
"module",
|
|
72
|
|
],
|
|
"PVDD1A_V_G": [
|
|
"PVDD1A_V_G",
|
|
"CNBi6",
|
|
"module",
|
|
73
|
|
],
|
|
"crc32": [
|
|
"crc32",
|
|
"T59nH",
|
|
"module",
|
|
122
|
|
],
|
|
"sirv_gnrl_ltch": [
|
|
"sirv_gnrl_ltch",
|
|
"UTi0b",
|
|
"module",
|
|
128
|
|
],
|
|
"PVDD1AC_H_G": [
|
|
"PVDD1AC_H_G",
|
|
"W9VnM",
|
|
"module",
|
|
74
|
|
],
|
|
"PVDD1DGZ_V_G": [
|
|
"PVDD1DGZ_V_G",
|
|
"sPggV",
|
|
"module",
|
|
79
|
|
],
|
|
"PVDD2ANA_V_G": [
|
|
"PVDD2ANA_V_G",
|
|
"J6VbG",
|
|
"module",
|
|
81
|
|
],
|
|
"PVSS3A_V_G": [
|
|
"PVSS3A_V_G",
|
|
"VSdee",
|
|
"module",
|
|
107
|
|
],
|
|
"PVDD2DGZ_V_G": [
|
|
"PVDD2DGZ_V_G",
|
|
"LSxxn",
|
|
"module",
|
|
83
|
|
],
|
|
"PVSS1A_V_G": [
|
|
"PVSS1A_V_G",
|
|
"ZmPik",
|
|
"module",
|
|
91
|
|
],
|
|
"reset_tb": [
|
|
"reset_tb",
|
|
"Q3Wk7",
|
|
"module",
|
|
148
|
|
],
|
|
"PVSS1ANA_H_G": [
|
|
"PVSS1ANA_H_G",
|
|
"HtwuV",
|
|
"module",
|
|
94
|
|
],
|
|
"PVSS1DGZ_H_G": [
|
|
"PVSS1DGZ_H_G",
|
|
"Zp1LH",
|
|
"module",
|
|
96
|
|
],
|
|
"PVSS2A_H_G": [
|
|
"PVSS2A_H_G",
|
|
"usz4x",
|
|
"module",
|
|
98
|
|
],
|
|
"PVSS2AC_H_G": [
|
|
"PVSS2AC_H_G",
|
|
"TqmdJ",
|
|
"module",
|
|
100
|
|
],
|
|
"systemregfile": [
|
|
"systemregfile",
|
|
"qcK8J",
|
|
"module",
|
|
115
|
|
],
|
|
"DW_sync_0000": [
|
|
"DW_sync_0000",
|
|
"zVfcK",
|
|
"module",
|
|
149
|
|
],
|
|
"PVSS2AC_V_G": [
|
|
"PVSS2AC_V_G",
|
|
"YBQ1m",
|
|
"module",
|
|
101
|
|
],
|
|
"PVSS2ANA_H_G": [
|
|
"PVSS2ANA_H_G",
|
|
"g8kcb",
|
|
"module",
|
|
102
|
|
],
|
|
"PVSS3AC_H_G": [
|
|
"PVSS3AC_H_G",
|
|
"B0f3F",
|
|
"module",
|
|
108
|
|
],
|
|
"PVSS3DGZ_H_G": [
|
|
"PVSS3DGZ_H_G",
|
|
"rq1J0",
|
|
"module",
|
|
110
|
|
],
|
|
"sirv_gnrl_xchecker": [
|
|
"sirv_gnrl_xchecker",
|
|
"CjC7H",
|
|
"module",
|
|
125
|
|
],
|
|
"tsdn28hpcpuhdb4096x128m4mw_170a": [
|
|
"tsdn28hpcpuhdb4096x128m4mw_170a",
|
|
"UJ4u7",
|
|
"module",
|
|
112
|
|
],
|
|
"syn_fwft_fifo": [
|
|
"syn_fwft_fifo",
|
|
"gzftm",
|
|
"module",
|
|
117
|
|
],
|
|
"ulink_rx": [
|
|
"ulink_rx",
|
|
"dteMU",
|
|
"module",
|
|
119
|
|
],
|
|
"ulink_frame_receiver_0000": [
|
|
"ulink_frame_receiver_0000",
|
|
"P3BwM",
|
|
"module",
|
|
123
|
|
],
|
|
"pulse_generator": [
|
|
"pulse_generator",
|
|
"aJYLF",
|
|
"module",
|
|
126
|
|
],
|
|
"sirv_gnrl_dffl": [
|
|
"sirv_gnrl_dffl",
|
|
"BM4bj",
|
|
"module",
|
|
127
|
|
],
|
|
"ramp_gen_0000": [
|
|
"ramp_gen_0000",
|
|
"AyqFm",
|
|
"module",
|
|
129
|
|
],
|
|
"sram_if_0000": [
|
|
"sram_if_0000",
|
|
"nJgqZ",
|
|
"module",
|
|
131
|
|
],
|
|
"sram_dmux_w_0000": [
|
|
"sram_dmux_w_0000",
|
|
"dc6nH",
|
|
"module",
|
|
134
|
|
],
|
|
"dpram": [
|
|
"dpram",
|
|
"bQxt6",
|
|
"module",
|
|
135
|
|
],
|
|
"clk_regfile": [
|
|
"clk_regfile",
|
|
"jAdLC",
|
|
"module",
|
|
136
|
|
],
|
|
"awg_top": [
|
|
"awg_top",
|
|
"J5zQK",
|
|
"module",
|
|
137
|
|
],
|
|
"DEM_PhaseSync_4008": [
|
|
"DEM_PhaseSync_4008",
|
|
"sIRhK",
|
|
"module",
|
|
138
|
|
],
|
|
"DA4008_DEM_Parallel_PRBS_1CH": [
|
|
"DA4008_DEM_Parallel_PRBS_1CH",
|
|
"cQW1k",
|
|
"module",
|
|
139
|
|
],
|
|
"spi_bus_decoder_0000": [
|
|
"spi_bus_decoder_0000",
|
|
"qLaCg",
|
|
"module",
|
|
142
|
|
],
|
|
"spi_slave": [
|
|
"spi_slave",
|
|
"eAsJz",
|
|
"module",
|
|
143
|
|
],
|
|
"spi_sys_0000": [
|
|
"spi_sys_0000",
|
|
"QT8j3",
|
|
"module",
|
|
144
|
|
],
|
|
"clk_gen": [
|
|
"clk_gen",
|
|
"MEIvW",
|
|
"module",
|
|
146
|
|
],
|
|
"DEM_Reverse_64CH_0000": [
|
|
"DEM_Reverse_64CH_0000",
|
|
"YnCHV",
|
|
"module",
|
|
147
|
|
],
|
|
"lvds_if": [
|
|
"lvds_if",
|
|
"nS0i0",
|
|
"module",
|
|
151
|
|
],
|
|
"...MASTER...": [
|
|
"SIM",
|
|
"amcQw",
|
|
"module",
|
|
153
|
|
]
|
|
},
|
|
"CompileStatus": "Successful",
|
|
"cpu_cycles_pass2_start": 70083385051216894,
|
|
"CompileProcesses": [
|
|
"cgproc.64094.json",
|
|
"cgproc.64118.json",
|
|
"cgproc.64119.json",
|
|
"cgproc.64120.json",
|
|
"cgproc.64121.json",
|
|
"cgproc.64122.json",
|
|
"cgproc.64123.json",
|
|
"cgproc.64124.json"
|
|
],
|
|
"CompileStrategy": "fullobj",
|
|
"stat": {
|
|
"ru_self_cgstart": {
|
|
"ru_utime_sec": 1.682831,
|
|
"ru_nivcsw": 19,
|
|
"ru_majflt": 0,
|
|
"ru_stime_sec": 0.12978400000000001,
|
|
"ru_nvcsw": 55,
|
|
"ru_maxrss_kb": 111292,
|
|
"ru_minflt": 44054
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|
},
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