24 lines
884 B
Fortran
24 lines
884 B
Fortran
../../rtl/define/chip_define.v
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../../sim/chip_top/TB.sv
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../../model/spi_if.sv
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../../model/DW01_addsub.v
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../../model/DW02_mult.v
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../../model/DW_mult_pipe.v
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../../model/clk_gen.v
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../../model/clock_tb.v
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../../model/reset_tb.v
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../../model/thermo2binary_top.v
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../../model/thermo7_binary3.v
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../../model/thermo15_binary4.v
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../../model/glbl.v
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../../rtl/memory/tsdn28hpcpuhdb128x128m4mw_170a_ffg0p99v0c.v
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../../rtl/memory/tsdn28hpcpuhdb4096x32m4mw_170a_ffg0p99v0c.v
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../../rtl/memory/tsdn28hpcpuhdb64x32m4mw_170a_ffg0p99v0c.v
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../../rtl/memory/tsdn28hpcpuhdb512x128m4mwr_170a_ffg0p99v0c.v
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../../rtl/memory/tsdn28hpcpuhdb4096x128m4mw_170a_ffg0p99v0c.v
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../../rtl/dem/DEM_31MSB_decoder_1ch.v
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../../rtl/dem/DEM_31MSB_decoder_16ch_XY.v
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/data/pdk/TSMCHOME/digital/Front_End/verilog/tphn28hpcpgv18_110a/tphn28hpcpgv18.v
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../../lib/tcbn28hpcplusbwp7t35p140.v
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../../syn/current/outputs/xyz_chip_top.syn.v
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