lin-win-share/DA4008_V1.2/sim/chip_top/compile.log

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Command: vcs -full64 -j8 -sverilog +lint=TFIPC-L +v2k -debug_access+all -debug_region+cell+encrypt \
-P /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/novas_new_dumper.tab \
/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a +define+DUMP_FSDB \
-lca -q -timescale=1ns/1ps +nospecify -l compile.log -cm line+cond+fsm+tgl+branch \
-cm_dir ./coverage/simv.vdb -f filelist_vlg.f +incdir+./../../rtl/define +incdir+./../../rtl/qubitmcu \
+incdir+./../../model
Warning-[LCA_FEATURES_ENABLED] Usage warning
LCA features enabled by '-lca' argument on the command line. For more
information regarding list of LCA features please refer to Chapter "LCA
features" in the VCS/VCS-MX Release Notes
The design hasn't changed and need not be recompiled.
If you really want to, delete file simv.daidir/.vcs.timestamp and
run VCS again.