set hdlin_infer_mux all
set trep_persistence TRUE
set test_enable_dft_drc TRUE
set test_disable_enhanced_dft_drc_reporting false
set test_setup_additional_clock_pulse true
set test_dedicated_subdesign_scan_outs true

set test_scan_in_port_naming_style scan_in%s%s
set test_scan_out_port_naming_style scan_out%s%s

##########################################################################################################################
#### dc_shell> sizeof_collection [all_registers]
#### total number of register: 94098
#### set the max length per chain to 200
##########################################################################################################################
set rm_max_length         200
set rm_clock_ports    	  [list ]
set rm_dft_const          [list ]
set rm_dft_mode           [list ]
set rm_reset_ports    	  [list ]
set rm_scan_enable        [list ]
##########################################################################################################################
 
set_scan_configuration -add_lockup true \
		       -power_domain_mixing true \
                       -reuse_mv_cells true \
                       -style multiplexed_flip_flop \
                       -clock_mixing no_mix \
		       -max_length $rm_max_length \
		       -internal_clocks none \
		       -create_dedicated_scan_out_ports true \
		       -test_mode all

set_dft_configuration -scan_compression disable \
 		      -connect_clock_gating enable

set_dft_drc_configuration -clock_gating_init_cycles 1 \
			  -static_x_analysis enable
 
set_dft_insertion_configuration -preserve_design_name true \
 				-synthesis_optimization none

##########################################################################################################################
set_dft_signal -view existing_dft -type ScanClock -timing {45 55} -port $rm_clock_ports -test_mode all_dft
set_dft_signal -view existing_dft -type ScanEnable -port $rm_scan_enable -active_state 1 -test_mode all_dft
set_dft_signal -view spec 	  -type ScanEnable -port $rm_scan_enable -active_state 1 -test_mode all_dft
set_dft_signal -view existing_dft -port [get_ports ${rm_reset_ports}] -type Reset -active_state 0 -test_mode all_dft
set_dft_signal -view existing_dft -type Constant -active_state 1 -port [get_ports ${rm_dft_const}] -test_mode all_dft
set_dft_signal -view existing_dft -type TestMode -active_state 1 -port [get_ports ${rm_dft_mode}] -test_mode all_dft
##########################################################################################################################
create_test_protocol -capture_procedure multi_clock 

dft_drc -verbose -pre_dft > $svars(dir,reports)/$svars(top_design)_prescan.dft
dft_drc -pre_dft > $svars(dir,reports)/$svars(top_design)_prescan.dft.summary
preview_dft -show all > $svars(dir,reports)/$svars(top_design)_prescan_preview.dft