################################################################################################################# #### Library Setup ################################################################################################################# set svars(lib,path,std) "" set svars(lib,path,io) "" set svars(lib,path,pmk) "" set svars(lib,path,mem) "" set svars(lib,path,ip) "" #set svars(lib,db,std) "../lib/STD/9T/SCC40NLL_HS_RVT_V0p2b/liberty/1.1v/scc40nll_hs_rvt_ss_v0p99_-40c_ccs.db" set svars(lib,db,std) "/data/pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp7t35p140_180a/tcbn28hpcplusbwp7t35p140ssg0p72vm40c.db" set svars(lib,db,pmk) "" set svars(lib,db,io) " \ /data/pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tphn28hpcpgv18_170a/tphn28hpcpgv18ssg0p81v1p62vm40c.db \ " set svars(lib,db,mem) " \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb64x32m4mw_170a/NLDM/tsdn28hpcpuhdb64x32m4mw_170a_ssg0p81vm40c.db \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb128x128m4mw_170a/NLDM/tsdn28hpcpuhdb128x128m4mw_170a_ssg0p81vm40c.db \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb1024x128m4mw_170a/NLDM/tsdn28hpcpuhdb1024x128m4mw_170a_ssg0p81vm40c.db \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb4096x32m4mw_170a/NLDM/tsdn28hpcpuhdb4096x32m4mw_170a_ssg0p81vm40c.db \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb4096x128m4mw_170a/NLDM/tsdn28hpcpuhdb4096x128m4mw_170a_ssg0p81vm40c.db \ /data/pdk/TSMCHOME/sram/Cell/tsdn28hpcpuhdb2048x64m4mw_170a/NLDM/tsdn28hpcpuhdb2048x64m4mw_170a_ssg0p81vm40c.db \ " set svars(lib,db,ip) " \ /data/pdk/TSMCHOME/digital/Front_End/timing_power_noise/NLDM/tcbn28hpcplusbwp7t35p140_180a/tcbn28hpcplusbwp7t35p140ssg0p72vm40c.db \ " set svars(lib,db,synthetic) "standard.sldb dw_foundation.sldb" set search_path ". $svars(lib,path,std) \ $svars(lib,path,pmk) \ $svars(lib,path,io) \ $svars(lib,path,mem) \ $svars(lib,path,ip) \ " set link_library "* $svars(lib,db,std) \ $svars(lib,db,pmk) \ $svars(lib,db,io) \ $svars(lib,db,mem) \ $svars(lib,db,ip) \ $svars(lib,db,synthetic) \ " set target_library " $svars(lib,db,std) \ $svars(lib,db,pmk) \ " #======================================================================================== #20190916:follow dc_ref settings #======================================================================================== set dont_use_list " tcbn28hpcplusbwp7t35p140ssg0p72vm40c/ANTENNA* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/BHD* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/BOUNDARY* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/BUFTD* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/CK* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/DCAP* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/DEL* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/FILL* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GAN* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GAOI* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GBUFF* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GDCAP* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GDF* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GFILL* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GINV* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GMUX* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GND* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GNR* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GOA* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GOR* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GSDF* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GTIEH* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GTIEL* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GXN* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/GXO* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/LH* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/LN* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/SDF* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/TAP* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/TIE* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/*D0* \ tcbn28hpcplusbwp7t35p140ssg0p72vm40c/*D20* \ " foreach cell $dont_use_list { set_dont_use [get_lib_cells $cell] }