diff --git a/DA4008_V1.2/sim/chip_top/TB.sv b/DA4008_V1.2/sim/chip_top/TB.sv index cb51390..3abfd59 100644 --- a/DA4008_V1.2/sim/chip_top/TB.sv +++ b/DA4008_V1.2/sim/chip_top/TB.sv @@ -99,10 +99,10 @@ initial begin rst_n = 1'b1; //lvds_drv.do_drive(); - lvds_drv.train_count = 100; // ÉèÖÃѵÁ·´ÎÊý - lvds_drv.send_training(); // ·¢ËÍѵÁ·ÐòÁÐ + lvds_drv.train_count = 100; // + lvds_drv.send_training(); // lvds_drv.scrambler_en = 1; - lvds_drv.send_frame_from_file(LVDS_FILE); // ·¢ËÍÊý¾ÝÖ¡ + lvds_drv.send_frame_from_file(LVDS_FILE); // file_path = $fopen(DATA_O_FILE, "w"); my_drv.do_drive(file_path); @@ -137,6 +137,12 @@ initial begin start = 1'b0; # 30000; + + start = 1'b1; + # PERIOD; + # PERIOD; + start = 1'b0; + # 30000; $finish(0); end @@ -156,8 +162,8 @@ logic [0 :0] lvds_clk = '0; //DAC Data logic [6 :0] MSB_OUT [63:0] ; logic [4 :0] LSB_OUT [63:0] ; -logic MSB_DUM [63:0] ; -logic DEM_VLD ; +logic MSB_DUM [63:0] ; +logic DEM_VLD ; //DAC Cfg Port logic [3 :0] Rterm ; logic [2 :0] CasAddr ; @@ -271,7 +277,7 @@ da4008_chip_top U_da4008_chip_top ( //DEM_Reverse_64CH //////////////////////////////////////////////////////////////////////////////////////// -logic vld_out ; +logic vld_out ; logic [7 :0] data_out [63:0] ; DEM_Reverse_64CH U_DEM_Reverse_64CH ( @@ -284,7 +290,7 @@ DEM_Reverse_64CH U_DEM_Reverse_64CH ( ); logic [7 :0] data_out_r [63:0] ; -logic vld_out_r ; +logic vld_out_r ; always @(posedge clk_40g) begin data_out_r <= data_out ; diff --git a/DA4008_V1.2/sim/chip_top/TB.sv.bak b/DA4008_V1.2/sim/chip_top/TB.sv.bak new file mode 100644 index 0000000..3abfd59 --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/TB.sv.bak @@ -0,0 +1,396 @@ +`include "../../rtl/define/chip_define.v" + +`include "../../model/SPI_DRIVER.sv" + +`include "../../model/LVDS_DRIVER.sv" + +`timescale 1ns/1ps + +module TB (); + +//################################### +// Generate Clocks & Reset +//################################### + +//Generate Clock +localparam PERIOD = 1.536; +logic clk ; +//clk +clock_tb #( + .PERIOD ( PERIOD ) + ,.PHASE ( 0 ) + )clk_inst ( + .clk_out ( clk ) +); + +//clk_40g +logic clk_40g; +clock_tb #( + .PERIOD ( 0.024) + ,.PHASE ( 0 ) + )clk_40g_inst ( + .clk_out ( clk_40g ) +); +//Generate Reset +logic rst_n; + +int file_path; +string CONFIG_FILE = ""; +string DATA_O_FILE = ""; +parameter string CASE_TEMP = "../../case_temp.txt"; +parameter string DATA_TEMP = "../../data_temp.txt"; +parameter string LVDS_FILE = "../../../../case/lvds/0305/lvds.txt"; +initial begin + file_path = $fopen(CASE_TEMP, "r"); + if(file_path != 0) begin + $fscanf(file_path, "%s", CONFIG_FILE); + $display(CONFIG_FILE); + $fclose(file_path); + end + file_path = $fopen(DATA_TEMP, "r"); + if(file_path != 0) begin + $fscanf(file_path, "%s", DATA_O_FILE); + $display(DATA_O_FILE); + $fclose(file_path); + end + + $fsdbAutoSwitchDumpfile(500, "./verdplus.fsdb", 1000000); + $fsdbDumpvars(); + $fsdbDumpMDA(); +end + +//################################### +// configure the dut +//################################### +virtual spi_if vif; +spi_if spi_bus(.clk(clk), .rstn(rst_n)); + +virtual lvds_if lvds_vif; +lvds_if lvds_bus(.clk(clk)); + + + +initial begin + spi_bus.sclk = 1'b1; + spi_bus.mosi = 1'b0; + spi_bus.csn = 1'b1; + vif = spi_bus; + lvds_vif = lvds_bus; +end + +spi_driver my_drv; +lvds_driver lvds_drv; +logic start; + +initial begin + rst_n = 1'b0; + start = 1'b0; + + lvds_drv = new(); + //lvds_drv.file_path = LVDS_FILE; + lvds_drv.drv_if = lvds_vif; + + + my_drv = new(); + my_drv.file_path = CONFIG_FILE; + my_drv.itf = vif; + + # 20; + rst_n = 1'b1; + + //lvds_drv.do_drive(); + lvds_drv.train_count = 100; // + lvds_drv.send_training(); // + lvds_drv.scrambler_en = 1; + lvds_drv.send_frame_from_file(LVDS_FILE); // + + file_path = $fopen(DATA_O_FILE, "w"); + my_drv.do_drive(file_path); + $fclose(file_path); + + # 30; + start = 1'b1; + # PERIOD; + # PERIOD; + start = 1'b0; + + # 30000; + + file_path = $fopen(DATA_O_FILE, "w"); + my_drv.do_drive(file_path); + $fclose(file_path); + + start = 1'b1; + # PERIOD; + # PERIOD; + start = 1'b0; + + # 30000; + + file_path = $fopen(DATA_O_FILE, "w"); + my_drv.do_drive(file_path); + $fclose(file_path); + + start = 1'b1; + # PERIOD; + # PERIOD; + start = 1'b0; + + # 30000; + + start = 1'b1; + # PERIOD; + # PERIOD; + start = 1'b0; + # 30000; + + $finish(0); +end + +//////////////////////////////////////////////////////////////////////////////////////// +//DUT +//////////////////////////////////////////////////////////////////////////////////////// + +//sync_out +logic sync_out ; +//irq +logic irq ; +//lvds rx +logic [3 :0] lvds_data = '0; +logic [0 :0] lvds_valid = '0; +logic [0 :0] lvds_clk = '0; +//DAC Data +logic [6 :0] MSB_OUT [63:0] ; +logic [4 :0] LSB_OUT [63:0] ; +logic MSB_DUM [63:0] ; +logic DEM_VLD ; +//DAC Cfg Port +logic [3 :0] Rterm ; +logic [2 :0] CasAddr ; +logic [2 :0] CasDw ; +logic [9 :0] IMainCtrl ; +logic [3 :0] IBleedCtrl ; +logic [3 :0] ICkCml ; +logic [31 :0] CurRsv0 ; +logic [31 :0] CurRsv1 ; +//CLK Cfg Port +logic [0 :0] CcalRstn ; +logic [3 :0] EnAllP ; +logic [0 :0] DccEn ; +logic [0 :0] CasGateCkCtrl ; +logic [0 :0] SpiEnPi ; +logic [0 :0] SpiEnQec ; +logic [0 :0] SpiEnDcc ; +logic [4 :0] SpiQecCtrlIp ; +logic [4 :0] SpiQecCtrlIn ; +logic [4 :0] SpiQecCtrlQp ; +logic [4 :0] SpiQecCtrlQn ; +logic [5 :0] SpiDccCtrlIup ; +logic [5 :0] SpiDccCtrlIdn ; +logic [5 :0] SpiDccCtrlQup ; +logic [5 :0] SpiDccCtrlQdn ; +logic [7 :0] SpiSiqNOut ; +logic [7 :0] SpiSiqPOut ; +logic [3 :0] SpiSiPOut ; +logic [3 :0] SpiSqPOut ; +logic [2 :0] CrtlCrossOverN ; +logic [2 :0] CrtlCrossOverP ; +logic [31 :0] CcalRsv0 ; +logic [31 :0] CcalRsv1 ; +logic [3 :0] SelCk10GDig ; +logic [3 :0] SelCk2p5GDig ; +logic [8 :0] SelCk625MDig ; +logic [15 :0] P2sDataEn ; +logic [15 :0] P2sEnAllP ; +logic [15 :0] EnPiP ; +logic [15 :0] CkDivRstn ; +logic [31 :0] p2srsv0 ; +logic [31 :0] p2srsv1 ; +logic [15 :0] CkRxSw ; +logic [15 :0] RstnCk ; +logic [15 :0] CtrlZin ; + + +da4008_chip_top U_da4008_chip_top ( + .PI_sclk ( spi_bus.sclk ) + ,.PI_csn ( spi_bus.csn ) + ,.PI_mosi ( spi_bus.mosi ) + ,.PO_miso ( spi_bus.miso ) + ,.PO_irq ( irq ) + ,.PI_async_rstn ( rst_n ) + ,.PI_sync_in ( start ) + ,.PO_sync_out ( sync_out ) + ,.clk ( clk ) + ,.lvds_data ( lvds_bus.data ) + ,.lvds_valid ( lvds_bus.valid ) + ,.lvds_clk ( lvds_bus.clk ) + ,.MSB_OUT ( MSB_OUT ) + ,.LSB_OUT ( LSB_OUT ) + ,.MSB_DUM ( MSB_DUM ) + ,.DEM_VLD ( DEM_VLD ) + ,.Rterm ( Rterm ) + ,.CasAddr ( CasAddr ) + ,.CasDw ( CasDw ) + ,.IMainCtrl ( IMainCtrl ) + ,.IBleedCtrl ( IBleedCtrl ) + ,.ICkCml ( ICkCml ) + ,.CurRsv0 ( CurRsv0 ) + ,.CurRsv1 ( CurRsv1 ) + ,.CcalRstn ( CcalRstn ) + ,.EnAllP ( EnAllP ) + ,.DccEn ( DccEn ) + ,.CasGateCkCtrl ( CasGateCkCtrl ) + ,.SpiEnPi ( SpiEnPi ) + ,.SpiEnQec ( SpiEnQec ) + ,.SpiEnDcc ( SpiEnDcc ) + ,.SpiQecCtrlIp ( SpiQecCtrlIp ) + ,.SpiQecCtrlIn ( SpiQecCtrlIn ) + ,.SpiQecCtrlQp ( SpiQecCtrlQp ) + ,.SpiQecCtrlQn ( SpiQecCtrlQn ) + ,.SpiDccCtrlIup ( SpiDccCtrlIup ) + ,.SpiDccCtrlIdn ( SpiDccCtrlIdn ) + ,.SpiDccCtrlQup ( SpiDccCtrlQup ) + ,.SpiDccCtrlQdn ( SpiDccCtrlQdn ) + ,.SpiSiqNOut ( SpiSiqNOut ) + ,.SpiSiqPOut ( SpiSiqPOut ) + ,.SpiSiPOut ( SpiSiPOut ) + ,.SpiSqPOut ( SpiSqPOut ) + ,.CrtlCrossOverN ( CrtlCrossOverN ) + ,.CrtlCrossOverP ( CrtlCrossOverP ) + ,.CcalRsv0 ( CcalRsv0 ) + ,.CcalRsv1 ( CcalRsv1 ) + ,.SelCk10GDig ( SelCk10GDig ) + ,.SelCk2p5GDig ( SelCk2p5GDig ) + ,.SelCk625MDig ( SelCk625MDig ) + ,.P2sDataEn ( P2sDataEn ) + ,.P2sEnAllP ( P2sEnAllP ) + ,.EnPiP ( EnPiP ) + ,.CkDivRstn ( CkDivRstn ) + ,.p2srsv0 ( p2srsv0 ) + ,.p2srsv1 ( p2srsv1 ) + ,.CkRxSw ( CkRxSw ) + ,.RstnCk ( RstnCk ) + ,.CtrlZin ( CtrlZin ) +); + +//////////////////////////////////////////////////////////////////////////////////////// +//DEM_Reverse_64CH +//////////////////////////////////////////////////////////////////////////////////////// + +logic vld_out ; +logic [7 :0] data_out [63:0] ; + +DEM_Reverse_64CH U_DEM_Reverse_64CH ( + .clk ( clk ) + ,.msb_in ( MSB_OUT ) + ,.lsb_in ( LSB_OUT ) + ,.vld_in ( DEM_VLD ) + ,.vld_out ( vld_out ) + ,.data_out ( data_out ) +); + +logic [7 :0] data_out_r [63:0] ; +logic vld_out_r ; + +always @(posedge clk_40g) begin + data_out_r <= data_out ; + vld_out_r <= vld_out ; +end +/////////////////////////////////////////////////////////////////////// +//DA4008 DEM output data save +/////////////////////////////////////////////////////////////////////// + +wire add_cnt = vld_out_r; +wire end_cnt = 1'b0; + +logic [5 :0] cnt_c; +wire [5 :0] cnt_n = end_cnt ? 6'h0 : + add_cnt ? cnt_c + 1'b1 : + cnt_c ; + +always @(posedge clk_40g or negedge rst_n) begin + if(rst_n==1'b0) begin + cnt_c <= 6'd0; + end + else begin + cnt_c <= cnt_n; + end +end + + + +logic [7:0] cs_wave; +always @(posedge clk_40g or negedge rst_n) begin + if(rst_n==1'b0) begin + cs_wave <= 16'h0; + end + else begin + case(cnt_c) + 6'd0 : cs_wave <= {~data_out_r[0 ][7],data_out_r[0 ][6:0]}; + 6'd1 : cs_wave <= {~data_out_r[1 ][7],data_out_r[1 ][6:0]}; + 6'd2 : cs_wave <= {~data_out_r[2 ][7],data_out_r[2 ][6:0]}; + 6'd3 : cs_wave <= {~data_out_r[3 ][7],data_out_r[3 ][6:0]}; + 6'd4 : cs_wave <= {~data_out_r[4 ][7],data_out_r[4 ][6:0]}; + 6'd5 : cs_wave <= {~data_out_r[5 ][7],data_out_r[5 ][6:0]}; + 6'd6 : cs_wave <= {~data_out_r[6 ][7],data_out_r[6 ][6:0]}; + 6'd7 : cs_wave <= {~data_out_r[7 ][7],data_out_r[7 ][6:0]}; + 6'd8 : cs_wave <= {~data_out_r[8 ][7],data_out_r[8 ][6:0]}; + 6'd9 : cs_wave <= {~data_out_r[9 ][7],data_out_r[9 ][6:0]}; + 6'd10 : cs_wave <= {~data_out_r[10][7],data_out_r[10][6:0]}; + 6'd11 : cs_wave <= {~data_out_r[11][7],data_out_r[11][6:0]}; + 6'd12 : cs_wave <= {~data_out_r[12][7],data_out_r[12][6:0]}; + 6'd13 : cs_wave <= {~data_out_r[13][7],data_out_r[13][6:0]}; + 6'd14 : cs_wave <= {~data_out_r[14][7],data_out_r[14][6:0]}; + 6'd15 : cs_wave <= {~data_out_r[15][7],data_out_r[15][6:0]}; + 6'd16 : cs_wave <= {~data_out_r[16][7],data_out_r[16][6:0]}; + 6'd17 : cs_wave <= {~data_out_r[17][7],data_out_r[17][6:0]}; + 6'd18 : cs_wave <= {~data_out_r[18][7],data_out_r[18][6:0]}; + 6'd19 : cs_wave <= {~data_out_r[19][7],data_out_r[19][6:0]}; + 6'd20 : cs_wave <= {~data_out_r[20][7],data_out_r[20][6:0]}; + 6'd21 : cs_wave <= {~data_out_r[21][7],data_out_r[21][6:0]}; + 6'd22 : cs_wave <= {~data_out_r[22][7],data_out_r[22][6:0]}; + 6'd23 : cs_wave <= {~data_out_r[23][7],data_out_r[23][6:0]}; + 6'd24 : cs_wave <= {~data_out_r[24][7],data_out_r[24][6:0]}; + 6'd25 : cs_wave <= {~data_out_r[25][7],data_out_r[25][6:0]}; + 6'd26 : cs_wave <= {~data_out_r[26][7],data_out_r[26][6:0]}; + 6'd27 : cs_wave <= {~data_out_r[27][7],data_out_r[27][6:0]}; + 6'd28 : cs_wave <= {~data_out_r[28][7],data_out_r[28][6:0]}; + 6'd29 : cs_wave <= {~data_out_r[29][7],data_out_r[29][6:0]}; + 6'd30 : cs_wave <= {~data_out_r[30][7],data_out_r[30][6:0]}; + 6'd31 : cs_wave <= {~data_out_r[31][7],data_out_r[31][6:0]}; + 6'd32 : cs_wave <= {~data_out_r[32][7],data_out_r[32][6:0]}; + 6'd33 : cs_wave <= {~data_out_r[33][7],data_out_r[33][6:0]}; + 6'd34 : cs_wave <= {~data_out_r[34][7],data_out_r[34][6:0]}; + 6'd35 : cs_wave <= {~data_out_r[35][7],data_out_r[35][6:0]}; + 6'd36 : cs_wave <= {~data_out_r[36][7],data_out_r[36][6:0]}; + 6'd37 : cs_wave <= {~data_out_r[37][7],data_out_r[37][6:0]}; + 6'd38 : cs_wave <= {~data_out_r[38][7],data_out_r[38][6:0]}; + 6'd39 : cs_wave <= {~data_out_r[39][7],data_out_r[39][6:0]}; + 6'd40 : cs_wave <= {~data_out_r[40][7],data_out_r[40][6:0]}; + 6'd41 : cs_wave <= {~data_out_r[41][7],data_out_r[41][6:0]}; + 6'd42 : cs_wave <= {~data_out_r[42][7],data_out_r[42][6:0]}; + 6'd43 : cs_wave <= {~data_out_r[43][7],data_out_r[43][6:0]}; + 6'd44 : cs_wave <= {~data_out_r[44][7],data_out_r[44][6:0]}; + 6'd45 : cs_wave <= {~data_out_r[45][7],data_out_r[45][6:0]}; + 6'd46 : cs_wave <= {~data_out_r[46][7],data_out_r[46][6:0]}; + 6'd47 : cs_wave <= {~data_out_r[47][7],data_out_r[47][6:0]}; + 6'd48 : cs_wave <= {~data_out_r[48][7],data_out_r[48][6:0]}; + 6'd49 : cs_wave <= {~data_out_r[49][7],data_out_r[49][6:0]}; + 6'd50 : cs_wave <= {~data_out_r[50][7],data_out_r[50][6:0]}; + 6'd51 : cs_wave <= {~data_out_r[51][7],data_out_r[51][6:0]}; + 6'd52 : cs_wave <= {~data_out_r[52][7],data_out_r[52][6:0]}; + 6'd53 : cs_wave <= {~data_out_r[53][7],data_out_r[53][6:0]}; + 6'd54 : cs_wave <= {~data_out_r[54][7],data_out_r[54][6:0]}; + 6'd55 : cs_wave <= {~data_out_r[55][7],data_out_r[55][6:0]}; + 6'd56 : cs_wave <= {~data_out_r[56][7],data_out_r[56][6:0]}; + 6'd57 : cs_wave <= {~data_out_r[57][7],data_out_r[57][6:0]}; + 6'd58 : cs_wave <= {~data_out_r[58][7],data_out_r[58][6:0]}; + 6'd59 : cs_wave <= {~data_out_r[59][7],data_out_r[59][6:0]}; + 6'd60 : cs_wave <= {~data_out_r[60][7],data_out_r[60][6:0]}; + 6'd61 : cs_wave <= {~data_out_r[61][7],data_out_r[61][6:0]}; + 6'd62 : cs_wave <= {~data_out_r[62][7],data_out_r[62][6:0]}; + 6'd63 : cs_wave <= {~data_out_r[63][7],data_out_r[63][6:0]}; + endcase + end +end +endmodule diff --git a/DA4008_V1.2/sim/chip_top/compile.log b/DA4008_V1.2/sim/chip_top/compile.log index 32c0b2b..a913f66 100644 --- a/DA4008_V1.2/sim/chip_top/compile.log +++ b/DA4008_V1.2/sim/chip_top/compile.log @@ -10,7 +10,46 @@ Warning-[LCA_FEATURES_ENABLED] Usage warning information regarding list of LCA features please refer to Chapter "LCA features" in the VCS/VCS-MX Release Notes -The design hasn't changed and need not be recompiled. -If you really want to, delete file simv.daidir/.vcs.timestamp and -run VCS again. +Warning-[RVOSFD] Return value discarded +../../model/SPI_DRIVER.sv, 50 + System function '$fscanf' is invoked as task, its return value is discarded. + "../../model/SPI_DRIVER.sv", 50 + Source info: $fscanf(file_id,"%h\n",value); + + +Warning-[RVOSFD] Return value discarded +../../model/LVDS_DRIVER.sv, 41 + System function '$fscanf' is invoked as task, its return value is discarded. + "../../model/LVDS_DRIVER.sv", 41 + Source info: $fscanf(file_id, "%h\n", value); + + +Warning-[RVOSFD] Return value discarded +../../sim/chip_top/TB.sv, 46 + System function '$fscanf' is invoked as task, its return value is discarded. + "../../sim/chip_top/TB.sv", 46 + Source info: $fscanf(file_path, "%s", CONFIG_FILE); + + +Warning-[RVOSFD] Return value discarded +../../sim/chip_top/TB.sv, 52 + System function '$fscanf' is invoked as task, its return value is discarded. + "../../sim/chip_top/TB.sv", 52 + Source info: $fscanf(file_path, "%s", DATA_O_FILE); + + +Lint-[TFIPC-L] Too few instance port connections +../../sim/chip_top/TB.sv, 214 +TB, "da4008_chip_top U_da4008_chip_top( .PI_sclk (spi_bus.sclk), .PI_csn (spi_bus.csn), .PI_mosi (spi_bus.mosi), .PO_miso (spi_bus.miso), .PO_irq (irq), .PI_async_rstn (rst_n), .PI_sync_in (start), .PO_sync_out (sync_out), .clk (clk), .lvds_data (lvds_bus.data), .lvds_valid (lvds_bus.valid), .lvds_clk (lvds_bus.clk), .MSB_OUT (MSB_OUT), .LSB_OUT (LSB_OUT), .MSB_DUM (MSB_DUM), .DEM_VLD (DEM_VLD), .Rterm (Rterm), .CasAddr (CasAddr), .CasDw (CasDw), .IMainCtrl (IMainCtrl), .IBleedCtrl (IBleedCtrl), .ICkCml (ICkCml), .CurRsv0 (CurRsv0), .CurRsv1 (CurRsv1), .CcalRstn (CcalRstn), .EnAllP (EnAllP), .DccEn (DccEn), .CasGateCkCtrl (CasGateCkCtrl), .SpiEnPi (SpiEnPi), .SpiEnQec (SpiEnQec), .SpiEnDcc (SpiEnDcc), .SpiQecCtrlIp (SpiQecCtrlI ... " + The above instance has fewer port connections than the module definition, + output port 'phase_tap' is not connected. + +VCS Coverage Metrics Release O-2018.09-SP2_Full64 Copyright (c) 1991-2018 by Synopsys Inc. +Notice: Ports coerced to inout, use -notice for details + +Note-[VCS_PARAL] Parallel code-gen enabled + VCS is running with parallel code generation(-j)... + +147 modules and 0 UDP read. +../simv up to date diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml index a58895a..c4df61c 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml index 96ef762..3093744 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml index eaf10e2..4d5ea33 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml index 0b5bb60..7924c6e 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt index d68fe22..f25c53c 100644 --- a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt +++ b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt @@ -1,6 +1,6 @@ // Synopsys, Inc. // User: shbyang -// Date: Fri Mar 13 14:54:44 2026 +// Date: Sat Mar 14 17:19:26 2026 // ================================================================================================== // This config file prototype is produced from the last run using the complete list of extracted fsms. diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml index 43062fe..231958f 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml index 4403bad..22d61dd 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml and b/DA4008_V1.2/sim/chip_top/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/cond.verilog.data.xml b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/cond.verilog.data.xml index 21259fb..959763f 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/cond.verilog.data.xml and b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/cond.verilog.data.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/line.verilog.data.xml b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/line.verilog.data.xml index 41f3f8a..de193e5 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/line.verilog.data.xml and b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/line.verilog.data.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/siminfo.xml b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/siminfo.xml index 86e9724..89f88af 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/siminfo.xml and b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/flattop/siminfo.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/line.verilog.data.xml b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/line.verilog.data.xml index 92ede64..60d8de8 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/line.verilog.data.xml and b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/line.verilog.data.xml differ diff --git a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/siminfo.xml b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/siminfo.xml index 0d3afc1..d7b0674 100644 Binary files a/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/siminfo.xml and b/DA4008_V1.2/sim/chip_top/coverage/try.vdb/snps/coverage/db/testdata/sine_1g/siminfo.xml differ diff --git a/DA4008_V1.2/sim/chip_top/csrc/_64094_archive_1.so b/DA4008_V1.2/sim/chip_top/csrc/_64094_archive_1.so new file mode 120000 index 0000000..56a4169 --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/csrc/_64094_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_64094_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/chip_top/csrc/_64123_archive_1.so b/DA4008_V1.2/sim/chip_top/csrc/_64123_archive_1.so new file mode 120000 index 0000000..f88957f --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/csrc/_64123_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_64123_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/chip_top/csrc/_csrc0.so b/DA4008_V1.2/sim/chip_top/csrc/_csrc0.so new file mode 120000 index 0000000..ea448c3 --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/csrc/_csrc0.so @@ -0,0 +1 @@ +.//../simv.daidir//_csrc0.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/chip_top/csrc/_prev_archive_1.so b/DA4008_V1.2/sim/chip_top/csrc/_prev_archive_1.so new file mode 120000 index 0000000..718cfb3 --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/csrc/_prev_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_prev_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/chip_top/csrc/_prev_cginfo.json b/DA4008_V1.2/sim/chip_top/csrc/_prev_cginfo.json new file mode 100644 index 0000000..fab4c68 --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/csrc/_prev_cginfo.json @@ -0,0 +1,1291 @@ +{ + "CurCompileUdps": {}, + "cycles_program_begin": 69836683650917054, + "NameTable": { + "PDDW04SDGZ_H_G": [ + "PDDW04SDGZ_H_G", + "CQ4ek", + "module", + 12 + ], + "PDB3AC_V_G": [ + "PDB3AC_V_G", + "dviib", + "module", + 9 + ], + "PCLAMP_G": [ + "PCLAMP_G", + "DA1Pu", + "module", + 3 + ], + "PDUW04DGZ_H_G": [ + "PDUW04DGZ_H_G", + "YTwQz", + "module", + 26 + ], + "PVSS1ANA_V_G": [ + "PVSS1ANA_V_G", + "gL5Pd", + "module", + 95 + ], + "PVDD3A_H_G": [ + "PVDD3A_H_G", + "DTJPF", + "module", + 86 + ], + "PDDW08DGZ_V_G": [ + "PDDW08DGZ_V_G", + "K0TuH", + "module", + 15 + ], + "PRCUTA_G": [ + "PRCUTA_G", + "uuDJt", + "module", + 47 + ], + "dpram": [ + "dpram", + "bQxt6", + "module", + 135 + ], + "PRDW08DGZ_V_G": [ + "PRDW08DGZ_V_G", + "ZZxj5", + "module", + 49 + ], + "_vcs_unit__348857874": [ + "_vcs_unit__348857874", + "FgDcH", + "module", + 1 + ], + "PDUW16SDGZ_H_G": [ + "PDUW16SDGZ_H_G", + "iWZrk", + "module", + 40 + ], + "PDXOEDG_V_G": [ + "PDXOEDG_V_G", + "EZF3t", + "module", + 43 + ], + "PENDCAPA_G": [ + "PENDCAPA_G", + "wpYca", + "module", + 45 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 127 + ], + "spi_bus_decoder_0000": [ + "spi_bus_decoder_0000", + "qLaCg", + "module", + 142 + ], + "PDDW08DGZ_H_G": [ + "PDDW08DGZ_H_G", + "C0gYT", + "module", + 14 + ], + "std": [ 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"module", - 19 - ], - "rst_gen_unit": [ - "rst_gen_unit", - "anuMN", - "module", - 124 - ], - "PDUW16DGZ_H_G": [ - "PDUW16DGZ_H_G", - "M7qR3", - "module", - 38 - ], - "PDDW08SDGZ_V_G": [ - "PDDW08SDGZ_V_G", - "N1ndr", - "module", - 17 - ], - "ramp_gen_0000": [ - "ramp_gen_0000", - "AyqFm", - "module", - 129 - ], - "PDDW12SDGZ_H_G": [ - "PDDW12SDGZ_H_G", - "KpuhN", - "module", - 20 - ], - "ulink_descrambler_32": [ - "ulink_descrambler_32", - "yuek5", - "module", - 120 - ], - "PDDW12SDGZ_V_G": [ - "PDDW12SDGZ_V_G", - "Pzaun", - "module", - 21 - ], - "PDDW16DGZ_H_G": [ - "PDDW16DGZ_H_G", - "GzkJA", - "module", - 22 - ], - "systemregfile": [ - "systemregfile", - "qcK8J", - "module", - 115 - ], - "PRDW16DGZ_V_G": [ - "PRDW16DGZ_V_G", - "Jztd6", - "module", - 57 - ], - "PRUW08SDGZ_V_G": [ - "PRUW08SDGZ_V_G", - "VJ8Wg", - "module", - 63 - ], - "PRUW16SDGZ_H_G": [ - "PRUW16SDGZ_H_G", - "riJVY", - "module", - 70 - ], - "PVDD2ANA_H_G": [ - "PVDD2ANA_H_G", - "mZVHG", - "module", - 80 - ], - "PDDW16DGZ_V_G": [ - "PDDW16DGZ_V_G", - "StNiL", - "module", - 23 - ], - "PDDW16SDGZ_H_G": [ - "PDDW16SDGZ_H_G", - "HiTWu", - "module", - 24 - ], - "PDDW16SDGZ_V_G": [ - "PDDW16SDGZ_V_G", - "ebe78", - "module", - 25 - ], - "ulink_frame_receiver_0000": [ - "ulink_frame_receiver_0000", - "P3BwM", - "module", - 123 - ], - "PRDW08SDGZ_H_G": [ - "PRDW08SDGZ_H_G", - "S90qD", - "module", - 50 - ], - "PDUW04SDGZ_V_G": [ - "PDUW04SDGZ_V_G", - "mJZpP", - "module", - 29 - ], - "PVDD2DGZ_H_G": [ - "PVDD2DGZ_H_G", - "nULrd", - "module", - 82 - ], - "PDUW04DGZ_V_G": [ - "PDUW04DGZ_V_G", - "QGhk6", - "module", - 27 - ], - "syn_fwft_fifo": [ - "syn_fwft_fifo", - "gzftm", - "module", - 117 - ], - "reset_tb": [ - "reset_tb", - "Q3Wk7", - "module", - 148 - ], "PDUW04SDGZ_H_G": [ "PDUW04SDGZ_H_G", "wGYhm", "module", 28 ], - "PDUW08DGZ_H_G": [ - "PDUW08DGZ_H_G", - "KkPJH", + "_vcs_unit__348857874": [ + "_vcs_unit__348857874", + "FgDcH", "module", - 30 - ], - "PRUW12SDGZ_V_G": [ - "PRUW12SDGZ_V_G", - "yt645", - "module", - 67 - ], - "PRDW12SDGZ_V_G": [ - "PRDW12SDGZ_V_G", - "zIUFF", - "module", - 55 - ], - "PDUW08SDGZ_H_G": [ - "PDUW08SDGZ_H_G", - "gxqJp", - "module", - 32 - ], - "pulse_generator": [ - "pulse_generator", - "aJYLF", - "module", - 126 - ], - "PRCUT_G": [ - "PRCUT_G", - "uQmb5", - "module", - 46 - ], - "PDUW12DGZ_H_G": [ - "PDUW12DGZ_H_G", - "HYpLe", - "module", - 34 - ], - "PDUW08SDGZ_V_G": [ - "PDUW08SDGZ_V_G", - "UxPrL", - "module", - 33 - ], - "PDUW12SDGZ_H_G": [ - "PDUW12SDGZ_H_G", - "uKPxf", - "module", - 36 - ], - "spi_sys_0000": [ - "spi_sys_0000", - "QT8j3", - "module", - 144 - ], - "PVDD1DGZ_V_G": [ - "PVDD1DGZ_V_G", - "sPggV", - "module", - 79 - ], - "iopad": [ - "iopad", - "ga3jL", - "module", - 114 - ], - "PRDW08DGZ_H_G": [ - "PRDW08DGZ_H_G", - "swWa5", - "module", - 48 - ], - "PDUW16DGZ_V_G": [ - "PDUW16DGZ_V_G", - "FDqaf", - "module", - 39 - ], - "PVSS1AC_H_G": [ - "PVSS1AC_H_G", - "EZJLH", - "module", - 92 - ], - "PRUW12DGZ_H_G": [ - "PRUW12DGZ_H_G", - "hpMjC", - "module", - 64 - ], - "PDXOEDG_H_G": [ - "PDXOEDG_H_G", - "IYQDs", - "module", - 42 - ], - "crc32": [ - "crc32", - "T59nH", - "module", - 122 - ], - "PVDD2POC_H_G": [ - "PVDD2POC_H_G", - "avdwk", - "module", - 84 - ], - "PENDCAP_G": [ - "PENDCAP_G", - "bhWYh", - "module", - 44 - ], - "PRDW08SDGZ_V_G": [ - "PRDW08SDGZ_V_G", - "JznNw", - "module", - 51 - ], - "PVSS3A_H_G": [ - "PVSS3A_H_G", - "jsR1C", - "module", - 106 - ], - "sirv_gnrl_xchecker": [ - "sirv_gnrl_xchecker", - "CjC7H", - "module", - 125 - ], - "PRDW16DGZ_H_G": [ - "PRDW16DGZ_H_G", - "EEqKt", - "module", - 56 - ], - "PRDW12DGZ_H_G": [ - "PRDW12DGZ_H_G", - "VaZm2", - "module", - 52 - ], - "PRDW12DGZ_V_G": [ - "PRDW12DGZ_V_G", - "ZKk4u", - "module", - 53 - ], - "da4008_chip_top": [ - "da4008_chip_top", - "ircEj", - "module", - 141 - ], - "PRDW12SDGZ_H_G": [ - "PRDW12SDGZ_H_G", - "fTzb4", - "module", - 54 - ], - "PRUW08DGZ_H_G": [ - "PRUW08DGZ_H_G", - "fLemy", - "module", - 60 - ], - "PVSS2ANA_H_G": [ - "PVSS2ANA_H_G", - "g8kcb", - "module", - 102 - ], - "PRUW08DGZ_V_G": [ - "PRUW08DGZ_V_G", - "EtT2L", - "module", - 61 - ], - "PRUW08SDGZ_H_G": [ - "PRUW08SDGZ_H_G", - "gwpgC", - "module", - 62 - ], - "PRUW12DGZ_V_G": [ - "PRUW12DGZ_V_G", - "pucZW", - "module", - 65 - ], - "PVDD3A_V_G": [ - "PVDD3A_V_G", - "t6fPF", - "module", - 87 - ], - "PRUW12SDGZ_H_G": [ - "PRUW12SDGZ_H_G", - "EkH6u", - "module", - 66 - ], - "PRUW16DGZ_H_G": [ - "PRUW16DGZ_H_G", - "AVYgt", - "module", - 68 - ], - "PRUW16DGZ_V_G": [ - "PRUW16DGZ_V_G", - "ErxQ3", - "module", - 69 - ], - "PVDD1A_H_G": [ - "PVDD1A_H_G", - "zNPu5", - "module", - 72 - ], - "PVDD1A_V_G": [ - "PVDD1A_V_G", - "CNBi6", - "module", - 73 - ], - "sirv_gnrl_ltch": [ - "sirv_gnrl_ltch", - "UTi0b", - "module", - 128 - ], - "PVDD1AC_H_G": [ - "PVDD1AC_H_G", - "W9VnM", - "module", - 74 - ], - "PVDD1AC_V_G": [ - "PVDD1AC_V_G", - "qn6Yx", - "module", - 75 - ], - "PVDD1ANA_H_G": [ - "PVDD1ANA_H_G", - "fEWTj", - "module", - 76 - ], - "awg_top": [ - "awg_top", - "J5zQK", - "module", - 137 - ], - "PVDD1DGZ_H_G": [ - "PVDD1DGZ_H_G", - "Eie6s", - "module", - 78 - ], - "PVSS2AC_V_G": [ - "PVSS2AC_V_G", - "YBQ1m", - "module", - 101 - ], - "PVSS3AC_V_G": [ - "PVSS3AC_V_G", - "i0k2A", - "module", - 109 - ], - "PVDD3AC_V_G": [ - "PVDD3AC_V_G", - "rZC3e", - "module", - 89 - ], - "PVDD2DGZ_V_G": [ - "PVDD2DGZ_V_G", - "LSxxn", - "module", - 83 - ], - "PVDD2POC_V_G": [ - "PVDD2POC_V_G", - "urn8Q", - "module", - 85 - ], - "PVDD3AC_H_G": [ - "PVDD3AC_H_G", - "U0PST", - "module", - 88 - ], - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", - "bghMB", - "module", - 113 - ], - "PVSS1A_V_G": [ - "PVSS1A_V_G", - "ZmPik", - "module", - 91 - ], - "PVSS1AC_V_G": [ - "PVSS1AC_V_G", - "I7RzE", - "module", - 93 - ], - "PVSS1ANA_H_G": [ - "PVSS1ANA_H_G", - "HtwuV", - "module", - 94 - ], - "PVSS1DGZ_V_G": [ - "PVSS1DGZ_V_G", - "jHcbf", - "module", - 97 - ], - "PVSS2A_H_G": [ - "PVSS2A_H_G", - "usz4x", - "module", - 98 + 1 ], "PVSS2A_V_G": [ "PVSS2A_V_G", @@ -734,53 +1819,149 @@ "module", 99 ], - "PVSS2AC_H_G": [ - "PVSS2AC_H_G", - "TqmdJ", + "PENDCAPA_G": [ + "PENDCAPA_G", + "wpYca", "module", - 100 + 45 ], - "PVSS2ANA_V_G": [ - "PVSS2ANA_V_G", - "Md441", + "PDDW08DGZ_V_G": [ + "PDDW08DGZ_V_G", + "K0TuH", "module", - 103 + 15 ], - "PVSS2DGZ_H_G": [ - "PVSS2DGZ_H_G", - "ke5cH", + "PDDW16SDGZ_V_G": [ + "PDDW16SDGZ_V_G", + "ebe78", "module", - 104 + 25 ], - "PVSS2DGZ_V_G": [ - "PVSS2DGZ_V_G", - "S5Dr6", + "PDUW12SDGZ_V_G": [ + "PDUW12SDGZ_V_G", + "qCQFW", "module", - 105 + 37 ], - "PVSS3A_V_G": [ - "PVSS3A_V_G", - "VSdee", + "PDUW12SDGZ_H_G": [ + "PDUW12SDGZ_H_G", + "uKPxf", "module", - 107 + 36 ], - "tsdn28hpcpuhdb4096x128m4mw_170a": [ - "tsdn28hpcpuhdb4096x128m4mw_170a", - "UJ4u7", + "std": [ + "std", + "reYIK", "module", - 112 + 2 ], - "PVSS3AC_H_G": [ - "PVSS3AC_H_G", - "B0f3F", + "sram_if_0002": [ + "sram_if_0002", + "bEAZ8", "module", - 108 + 133 ], - "PVSS3DGZ_H_G": [ - "PVSS3DGZ_H_G", - "rq1J0", + "PCLAMP_G": [ + "PCLAMP_G", + "DA1Pu", "module", - 110 + 3 + ], + "PVDD2POC_V_G": [ + "PVDD2POC_V_G", + "urn8Q", + "module", + 85 + ], + "PDUW16DGZ_V_G": [ + "PDUW16DGZ_V_G", + "FDqaf", + "module", + 39 + ], + "iopad": [ + "iopad", + "ga3jL", + "module", + 114 + ], + "PVSS1ANA_V_G": [ + "PVSS1ANA_V_G", + "gL5Pd", + "module", + 95 + ], + "PDUW08DGZ_V_G": [ + "PDUW08DGZ_V_G", + "aEWK6", + "module", + 31 + ], + "PRDW12SDGZ_V_G": [ + "PRDW12SDGZ_V_G", + "zIUFF", + "module", + 55 + ], + "PDB3A_V_G": [ + "PDB3A_V_G", + "xqWfY", + "module", + 7 + ], + "PVDD3A_V_G": [ + "PVDD3A_V_G", + "t6fPF", + "module", + 87 + ], + "PRDW16DGZ_V_G": [ + "PRDW16DGZ_V_G", + "Jztd6", + "module", + 57 + ], + "PRUW12SDGZ_V_G": [ + "PRUW12SDGZ_V_G", + "yt645", + "module", + 67 + ], + "PDXOEDG_V_G": [ + "PDXOEDG_V_G", + "EZF3t", + "module", + 43 + ], + "da4008_chip_top": [ + "da4008_chip_top", + "ircEj", + "module", + 141 + ], + "PDDW12SDGZ_H_G": [ + "PDDW12SDGZ_H_G", + "KpuhN", + "module", + 20 + ], + "PDDW04SDGZ_H_G": [ + "PDDW04SDGZ_H_G", + "CQ4ek", + "module", + 12 + ], + "PCLAMPC_H_G": [ + "PCLAMPC_H_G", + "UyGax", + "module", + 4 + ], + "PRDW16SDGZ_V_G": [ + "PRDW16SDGZ_V_G", + "YRh5I", + "module", + 59 ], "PVSS3DGZ_V_G": [ "PVSS3DGZ_V_G", @@ -788,29 +1969,239 @@ "module", 111 ], - "DEM_PhaseSync_4008": [ - "DEM_PhaseSync_4008", - "sIRhK", + "PVDD3AC_H_G": [ + "PVDD3AC_H_G", + "U0PST", "module", - 138 + 88 ], - "dacif_0000": [ - "dacif_0000", - "yeRHW", + "PCLAMPC_V_G": [ + "PCLAMPC_V_G", + "EyyeT", "module", - 116 + 5 ], - "dac_regfile": [ - "dac_regfile", - "LR0zI", + "PRDW08SDGZ_V_G": [ + "PRDW08SDGZ_V_G", + "JznNw", "module", - 118 + 51 ], - "ulink_rx": [ - "ulink_rx", - "dteMU", + "PDDW12DGZ_V_G": [ + "PDDW12DGZ_V_G", + "eR5Zz", "module", - 119 + 19 + ], + "PDDW08DGZ_H_G": [ + "PDDW08DGZ_H_G", + "C0gYT", + "module", + 14 + ], + "PVSS2DGZ_V_G": [ + "PVSS2DGZ_V_G", + "S5Dr6", + "module", + 105 + ], + "PDB3A_H_G": [ + "PDB3A_H_G", + "dfLHW", + "module", + 6 + ], + "rst_gen_unit": [ + "rst_gen_unit", + "anuMN", + "module", + 124 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", + "bghMB", + "module", + 113 + ], + "PDDW16SDGZ_H_G": [ + "PDDW16SDGZ_H_G", + "HiTWu", + "module", + 24 + ], + "PDUW16SDGZ_H_G": [ + "PDUW16SDGZ_H_G", + "iWZrk", + "module", + 40 + ], + "PDUW04SDGZ_V_G": [ + "PDUW04SDGZ_V_G", + "mJZpP", + "module", + 29 + ], + "PVSS3A_H_G": [ + "PVSS3A_H_G", + "jsR1C", + "module", + 106 + ], + "PDB3AC_H_G": [ + "PDB3AC_H_G", + "LsJ1x", + "module", + 8 + ], + "PDUW04DGZ_V_G": [ + "PDUW04DGZ_V_G", + "QGhk6", + "module", + 27 + ], + "PVDD3AC_V_G": [ + "PVDD3AC_V_G", + "rZC3e", + "module", + 89 + ], + "PVSS2DGZ_H_G": [ + "PVSS2DGZ_H_G", + "ke5cH", + "module", + 104 + ], + "PDDW04DGZ_V_G": [ + "PDDW04DGZ_V_G", + "sZaSM", + "module", + 11 + ], + "sram_if_0001": [ + "sram_if_0001", + "z4wk8", + "module", + 132 + ], + "PDDW04DGZ_H_G": [ + "PDDW04DGZ_H_G", + "Z62Gy", + "module", + 10 + ], + "PVDD1AC_V_G": [ + "PVDD1AC_V_G", + "qn6Yx", + "module", + 75 + ], + "PVSS2ANA_V_G": [ + "PVSS2ANA_V_G", + "Md441", + "module", + 103 + ], + "PDDW04SDGZ_V_G": [ + "PDDW04SDGZ_V_G", + "J6fGD", + "module", + 13 + ], + "PDDW16DGZ_H_G": [ + "PDDW16DGZ_H_G", + "GzkJA", + "module", + 22 + ], + "PVSS3AC_V_G": [ + "PVSS3AC_V_G", + "i0k2A", + "module", + 109 + ], + "PDDW08SDGZ_H_G": [ + "PDDW08SDGZ_H_G", + "QjV6F", + "module", + 16 + ], + "ulink_descrambler_32": [ + "ulink_descrambler_32", + "yuek5", + "module", + 120 + ], + "PVSS1AC_V_G": [ + "PVSS1AC_V_G", + "I7RzE", + "module", + 93 + ], + "PDDW08SDGZ_V_G": [ + "PDDW08SDGZ_V_G", + "N1ndr", + "module", + 17 + ], + "PRDW08SDGZ_H_G": [ + "PRDW08SDGZ_H_G", + "S90qD", + "module", + 50 + ], + "PDDW12DGZ_H_G": [ + "PDDW12DGZ_H_G", + "atFKr", + "module", + 18 + ], + "PDDW12SDGZ_V_G": [ + "PDDW12SDGZ_V_G", + "Pzaun", + "module", + 21 + ], + "PVDD1ANA_V_G": [ + "PVDD1ANA_V_G", + "BL1m7", + "module", + 77 + ], + "PVDD3A_H_G": [ + "PVDD3A_H_G", + "DTJPF", + "module", + 86 + ], + "PDDW16DGZ_V_G": [ + "PDDW16DGZ_V_G", + "StNiL", + "module", + 23 + ], + "PDUW04DGZ_H_G": [ + "PDUW04DGZ_H_G", + "YTwQz", + "module", + 26 + ], + "PVDD2DGZ_H_G": [ + "PVDD2DGZ_H_G", + "nULrd", + "module", + 82 + ], + "PDUW08DGZ_H_G": [ + "PDUW08DGZ_H_G", + "KkPJH", + "module", + 30 + ], + "PDUW08SDGZ_H_G": [ + "PDUW08SDGZ_H_G", + "gxqJp", + "module", + 32 ], "ulink_descrambler_128": [ "ulink_descrambler_128", @@ -824,41 +2215,23 @@ "module", 130 ], - "sram_if_0000": [ - "sram_if_0000", - "nJgqZ", + "PRCUTA_G": [ + "PRCUTA_G", + "uuDJt", "module", - 131 + 47 ], - "sram_if_0001": [ - "sram_if_0001", - "z4wk8", + "PVDD1ANA_H_G": [ + "PVDD1ANA_H_G", + "fEWTj", "module", - 132 + 76 ], - "sram_if_0002": [ - "sram_if_0002", - "bEAZ8", + "PDUW08SDGZ_V_G": [ + "PDUW08SDGZ_V_G", + "UxPrL", "module", - 133 - ], - "sram_dmux_w_0000": [ - "sram_dmux_w_0000", - "dc6nH", - "module", - 134 - ], - "clk_regfile": [ - "clk_regfile", - "jAdLC", - "module", - 136 - ], - "DA4008_DEM_Parallel_PRBS_1CH": [ - "DA4008_DEM_Parallel_PRBS_1CH", - "cQW1k", - "module", - 139 + 33 ], "DA4008_DEM_Parallel_PRBS_64CH": [ "DA4008_DEM_Parallel_PRBS_64CH", @@ -866,11 +2239,197 @@ "module", 140 ], - "spi_slave": [ - "spi_slave", - "eAsJz", + "PDUW12DGZ_H_G": [ + "PDUW12DGZ_H_G", + "HYpLe", "module", - 143 + 34 + ], + "PVSS1AC_H_G": [ + "PVSS1AC_H_G", + "EZJLH", + "module", + 92 + ], + "PDUW12DGZ_V_G": [ + "PDUW12DGZ_V_G", + "NkwYe", + "module", + 35 + ], + "PRUW16DGZ_H_G": [ + "PRUW16DGZ_H_G", + "AVYgt", + "module", + 68 + ], + "PDUW16SDGZ_V_G": [ + "PDUW16SDGZ_V_G", + "qePm9", + "module", + 41 + ], + "PDXOEDG_H_G": [ + "PDXOEDG_H_G", + "IYQDs", + "module", + 42 + ], + "PENDCAP_G": [ + "PENDCAP_G", + "bhWYh", + "module", + 44 + ], + "PRUW08DGZ_V_G": [ + "PRUW08DGZ_V_G", + "EtT2L", + "module", + 61 + ], + "PVDD2ANA_H_G": [ + "PVDD2ANA_H_G", + "mZVHG", + "module", + 80 + ], + "PRCUT_G": [ + "PRCUT_G", + "uQmb5", + "module", + 46 + ], + "DW_pulse_sync_0000": [ + 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108 + ], + "PVSS3DGZ_H_G": [ + "PVSS3DGZ_H_G", + "rq1J0", + "module", + 110 + ], + "sirv_gnrl_xchecker": [ + "sirv_gnrl_xchecker", + "CjC7H", + "module", + 125 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a": [ + "tsdn28hpcpuhdb4096x128m4mw_170a", + "UJ4u7", + "module", + 112 + ], + "syn_fwft_fifo": [ + "syn_fwft_fifo", + "gzftm", + "module", + 117 + ], + "ulink_rx": [ + "ulink_rx", + "dteMU", + "module", + 119 + ], + "ulink_frame_receiver_0000": [ + "ulink_frame_receiver_0000", + "P3BwM", + "module", + 123 + ], + "pulse_generator": [ + "pulse_generator", + "aJYLF", + "module", + 126 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 127 + ], + "ramp_gen_0000": [ + "ramp_gen_0000", + "AyqFm", + "module", + 129 + ], + "sram_if_0000": [ + "sram_if_0000", + "nJgqZ", + "module", + 131 + ], + "sram_dmux_w_0000": [ + "sram_dmux_w_0000", + "dc6nH", + "module", + 134 + ], + "dpram": [ + "dpram", + "bQxt6", + "module", + 135 + ], + "clk_regfile": [ + "clk_regfile", + "jAdLC", + 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b/DA4008_V1.2/sim/chip_top/csrc/filelist.cu index 6fc6c6f..8e342b1 100644 --- a/DA4008_V1.2/sim/chip_top/csrc/filelist.cu +++ b/DA4008_V1.2/sim/chip_top/csrc/filelist.cu @@ -1,71 +1,34 @@ PIC_LD=ld ARCHIVE_OBJS= -ARCHIVE_OBJS += _32553_archive_1.so -_32553_archive_1.so : archive.0/_32553_archive_1.a +ARCHIVE_OBJS += _64094_archive_1.so +_64094_archive_1.so : archive.1/_64094_archive_1.a @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32553_archive_1.so --whole-archive $< --no-whole-archive + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_64094_archive_1.so --whole-archive $< --no-whole-archive @rm -f $@ - @ln -sf .//../simv.daidir//_32553_archive_1.so $@ + @ln -sf .//../simv.daidir//_64094_archive_1.so $@ -ARCHIVE_OBJS += _32573_archive_1.so -_32573_archive_1.so : archive.0/_32573_archive_1.a +ARCHIVE_OBJS += _64123_archive_1.so +_64123_archive_1.so : archive.1/_64123_archive_1.a @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32573_archive_1.so --whole-archive $< --no-whole-archive + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_64123_archive_1.so --whole-archive $< --no-whole-archive @rm -f $@ - @ln -sf .//../simv.daidir//_32573_archive_1.so $@ + @ln -sf .//../simv.daidir//_64123_archive_1.so $@ -ARCHIVE_OBJS += _32574_archive_1.so -_32574_archive_1.so : archive.0/_32574_archive_1.a +ARCHIVE_OBJS += _prev_archive_1.so +_prev_archive_1.so : archive.1/_prev_archive_1.a @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32574_archive_1.so --whole-archive $< --no-whole-archive + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_prev_archive_1.so --whole-archive $< --no-whole-archive @rm -f $@ - @ln -sf .//../simv.daidir//_32574_archive_1.so $@ - - -ARCHIVE_OBJS += _32575_archive_1.so -_32575_archive_1.so : archive.0/_32575_archive_1.a - @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32575_archive_1.so --whole-archive $< --no-whole-archive - @rm -f $@ - @ln -sf .//../simv.daidir//_32575_archive_1.so $@ - - -ARCHIVE_OBJS += _32576_archive_1.so -_32576_archive_1.so : archive.0/_32576_archive_1.a - @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32576_archive_1.so --whole-archive $< --no-whole-archive - @rm -f $@ - @ln -sf .//../simv.daidir//_32576_archive_1.so $@ - - -ARCHIVE_OBJS += _32577_archive_1.so -_32577_archive_1.so : archive.0/_32577_archive_1.a - @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32577_archive_1.so --whole-archive $< --no-whole-archive - @rm -f $@ - @ln -sf .//../simv.daidir//_32577_archive_1.so $@ - - -ARCHIVE_OBJS += _32578_archive_1.so -_32578_archive_1.so : archive.0/_32578_archive_1.a - @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32578_archive_1.so --whole-archive $< --no-whole-archive - @rm -f $@ - @ln -sf .//../simv.daidir//_32578_archive_1.so $@ - - -ARCHIVE_OBJS += _32579_archive_1.so -_32579_archive_1.so : archive.0/_32579_archive_1.a - @$(AR) -s $< - @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_32579_archive_1.so --whole-archive $< --no-whole-archive - @rm -f $@ - @ln -sf .//../simv.daidir//_32579_archive_1.so $@ + @ln -sf .//../simv.daidir//_prev_archive_1.so $@ +VCS_ARC0 =_csrc0.so + +VCS_OBJS0 =objs/amcQw_d.o O0_OBJS = @@ -76,6 +39,12 @@ $(O0_OBJS) : %.o: %.c %.o: %.c $(CC_CG) $(CFLAGS_CG) -c -o $@ $< + +$(VCS_ARC0) : $(VCS_OBJS0) + $(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//$(VCS_ARC0) $(VCS_OBJS0) + rm -f $(VCS_ARC0) + @ln -sf .//../simv.daidir//$(VCS_ARC0) $(VCS_ARC0) + CU_UDP_OBJS = \ @@ -83,7 +52,7 @@ CU_LVL_OBJS = \ SIM_l.o MAIN_OBJS = \ -objs/amcQw_d.o -CU_OBJS = $(MAIN_OBJS) $(ARCHIVE_OBJS) $(CU_UDP_OBJS) $(CU_LVL_OBJS) + +CU_OBJS = $(MAIN_OBJS) $(ARCHIVE_OBJS) $(VCS_ARC0) $(CU_UDP_OBJS) $(CU_LVL_OBJS) diff --git a/DA4008_V1.2/sim/chip_top/csrc/hsim/hsim.sdb b/DA4008_V1.2/sim/chip_top/csrc/hsim/hsim.sdb index 482ee07..6157d02 100644 Binary files a/DA4008_V1.2/sim/chip_top/csrc/hsim/hsim.sdb and b/DA4008_V1.2/sim/chip_top/csrc/hsim/hsim.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/csrc/pre.cgincr.sdb b/DA4008_V1.2/sim/chip_top/csrc/pre.cgincr.sdb new file mode 100644 index 0000000..ca6ed9f Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/csrc/pre.cgincr.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv b/DA4008_V1.2/sim/chip_top/simv index 0036aa9..f87b060 100755 Binary files a/DA4008_V1.2/sim/chip_top/simv and b/DA4008_V1.2/sim/chip_top/simv differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/.vcs.timestamp b/DA4008_V1.2/sim/chip_top/simv.daidir/.vcs.timestamp index 0d4e6bb..3d08c7c 100644 --- a/DA4008_V1.2/sim/chip_top/simv.daidir/.vcs.timestamp +++ b/DA4008_V1.2/sim/chip_top/simv.daidir/.vcs.timestamp @@ -133,8 +133,8 @@ HSPICE_HOME=/opt/synopsys/hspice/N-2017.12-SP2 HOSTTYPE=x86_64-linux HISTCONTROL=ignoredups GROUP=cryo -GNOME_TERMINAL_SERVICE=:1.1458 -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/300489a5_6011_46a1_a329_83b2a6d46428 +GNOME_TERMINAL_SERVICE=:1.1513 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/461a392b_7deb_466e_bdba_86422bb75acb GNOME_SHELL_SESSION_MODE=classic GNOME_DESKTOP_SESSION_ID=this-is-deprecated GENUS_HOME=/opt/cadence/GENUS152 @@ -170,7 +170,7 @@ AMS_ENABLE_NOISE=YES 1773384753 ./../../rtl/define/../define/chip_undefine.v 1773384753 ./../../rtl/define/../define/chip_define.v 1773384753 ../../rtl/define/chip_undefine.v -1773384753 ../../sim/chip_top/TB.sv +1773479827 ../../sim/chip_top/TB.sv 1773384753 ../../model/DW_pulse_sync.v 1773384753 ../../model/DW_sync.v 1773384753 ../../model/DW_reset_sync.v @@ -226,5 +226,5 @@ AMS_ENABLE_NOISE=YES 1551421768 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so 1551421789 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so 1550752033 /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a -1773384887 simv.daidir +1773479969 simv.daidir -1 partitionlib diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/_32553_archive_1.so b/DA4008_V1.2/sim/chip_top/simv.daidir/_32553_archive_1.so deleted file mode 100755 index fd59063..0000000 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/_32553_archive_1.so and /dev/null differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/_32573_archive_1.so b/DA4008_V1.2/sim/chip_top/simv.daidir/_32573_archive_1.so deleted file mode 100755 index a1f01d7..0000000 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/_32573_archive_1.so and /dev/null differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/_32574_archive_1.so b/DA4008_V1.2/sim/chip_top/simv.daidir/_32574_archive_1.so deleted file mode 100755 index c3950e9..0000000 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/_32574_archive_1.so and /dev/null differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/_32575_archive_1.so b/DA4008_V1.2/sim/chip_top/simv.daidir/_32575_archive_1.so deleted file mode 100755 index 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a/DA4008_V1.2/sim/chip_top/simv.daidir/_prev_archive_1.so b/DA4008_V1.2/sim/chip_top/simv.daidir/_prev_archive_1.so new file mode 100755 index 0000000..f9266c0 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/simv.daidir/_prev_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/binmap.sdb b/DA4008_V1.2/sim/chip_top/simv.daidir/binmap.sdb index 54897d5..4d6f43f 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/binmap.sdb and b/DA4008_V1.2/sim/chip_top/simv.daidir/binmap.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/cgname.json b/DA4008_V1.2/sim/chip_top/simv.daidir/cgname.json index 39f08d3..eb59b57 100644 --- a/DA4008_V1.2/sim/chip_top/simv.daidir/cgname.json +++ b/DA4008_V1.2/sim/chip_top/simv.daidir/cgname.json @@ -1,9 +1,9 @@ { - "PDDW04SDGZ_H_G": [ - "PDDW04SDGZ_H_G", - "CQ4ek", + "PDUW16DGZ_H_G": [ + "PDUW16DGZ_H_G", + "M7qR3", "module", - 12 + 38 ], "PDB3AC_V_G": [ "PDB3AC_V_G", @@ -11,125 +11,11 @@ "module", 9 ], - "PCLAMP_G": [ - "PCLAMP_G", - "DA1Pu", + "dac_regfile": [ + "dac_regfile", + "LR0zI", "module", - 3 - ], - "PDUW04DGZ_H_G": [ - "PDUW04DGZ_H_G", - "YTwQz", - "module", - 26 - ], - "PVSS1ANA_V_G": [ - "PVSS1ANA_V_G", - "gL5Pd", - "module", - 95 - ], - "PVDD3A_H_G": [ - "PVDD3A_H_G", - "DTJPF", - "module", - 86 - ], - "PDDW08DGZ_V_G": [ - "PDDW08DGZ_V_G", - "K0TuH", - "module", - 15 - ], - "PRCUTA_G": [ - "PRCUTA_G", - "uuDJt", - "module", - 47 - ], - "dpram": [ - "dpram", - "bQxt6", - "module", - 135 - ], - "PRDW08DGZ_V_G": [ - "PRDW08DGZ_V_G", - "ZZxj5", - "module", - 49 - ], - "_vcs_unit__348857874": [ - "_vcs_unit__348857874", - "FgDcH", - "module", - 1 - ], - "PDUW16SDGZ_H_G": [ - "PDUW16SDGZ_H_G", - "iWZrk", - "module", - 40 - ], - "PDXOEDG_V_G": [ - "PDXOEDG_V_G", - "EZF3t", - "module", - 43 - ], - "PENDCAPA_G": [ - "PENDCAPA_G", - "wpYca", - "module", - 45 - ], - "sirv_gnrl_dffl": [ - "sirv_gnrl_dffl", - "BM4bj", - "module", - 127 - ], - "spi_bus_decoder_0000": [ - "spi_bus_decoder_0000", - "qLaCg", - "module", - 142 - ], - "PDDW08DGZ_H_G": [ - "PDDW08DGZ_H_G", - "C0gYT", - "module", - 14 - ], - "std": [ - "std", - "reYIK", - "module", - 2 - ], - "PVDD2ANA_V_G": [ - "PVDD2ANA_V_G", - "J6VbG", - "module", - 81 - ], - "PDUW12SDGZ_V_G": [ - "PDUW12SDGZ_V_G", - "qCQFW", - "module", - 37 - ], - "PDB3A_H_G": [ - "PDB3A_H_G", - "dfLHW", - "module", - 6 - ], - "PVSS1DGZ_H_G": [ - "PVSS1DGZ_H_G", - "Zp1LH", - "module", - 96 + 118 ], "PRUW16SDGZ_V_G": [ "PRUW16SDGZ_V_G", @@ -137,593 +23,17 @@ "module", 71 ], - "PRDW16SDGZ_V_G": [ - "PRDW16SDGZ_V_G", - "YRh5I", - "module", - 59 - ], - "PDDW04SDGZ_V_G": [ - "PDDW04SDGZ_V_G", - "J6fGD", - "module", - 13 - ], - "PCLAMPC_H_G": [ - "PCLAMPC_H_G", - "UyGax", - "module", - 4 - ], - "PDDW04DGZ_V_G": [ - "PDDW04DGZ_V_G", - "sZaSM", - "module", - 11 - ], - "PCLAMPC_V_G": [ - "PCLAMPC_V_G", - "EyyeT", - "module", - 5 - ], - "PVDD1ANA_V_G": [ - "PVDD1ANA_V_G", - "BL1m7", - "module", - 77 - ], - "PDB3A_V_G": [ - "PDB3A_V_G", - "xqWfY", - "module", - 7 - ], - "PDDW12DGZ_H_G": [ - "PDDW12DGZ_H_G", - "atFKr", - "module", - 18 - ], - "PDB3AC_H_G": [ - "PDB3AC_H_G", - "LsJ1x", - "module", - 8 - ], - "PDDW04DGZ_H_G": [ - "PDDW04DGZ_H_G", - "Z62Gy", - "module", - 10 - ], - "PVSS1A_H_G": [ - "PVSS1A_H_G", - "aYKwj", - "module", - 90 - ], - "PRDW16SDGZ_H_G": [ - "PRDW16SDGZ_H_G", - "V63WF", - "module", - 58 - ], - "PDUW08DGZ_V_G": [ - "PDUW08DGZ_V_G", - "aEWK6", - "module", - 31 - ], - "PDUW12DGZ_V_G": [ - "PDUW12DGZ_V_G", - "NkwYe", - "module", - 35 - ], - "PDDW08SDGZ_H_G": [ - "PDDW08SDGZ_H_G", - "QjV6F", - "module", - 16 - ], - "PDUW16SDGZ_V_G": [ - "PDUW16SDGZ_V_G", - "qePm9", - "module", - 41 - ], - "PDDW12DGZ_V_G": [ - "PDDW12DGZ_V_G", - "eR5Zz", - "module", - 19 - ], - "rst_gen_unit": [ - "rst_gen_unit", - "anuMN", - "module", - 124 - ], - "PDUW16DGZ_H_G": [ - "PDUW16DGZ_H_G", - "M7qR3", - "module", - 38 - ], - "PDDW08SDGZ_V_G": [ - "PDDW08SDGZ_V_G", - "N1ndr", - "module", - 17 - ], - "ramp_gen_0000": [ - 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"PRCUT_G": [ - "PRCUT_G", - "uQmb5", - "module", - 46 - ], - "PDUW12DGZ_H_G": [ - "PDUW12DGZ_H_G", - "HYpLe", - "module", - 34 - ], - "PDUW08SDGZ_V_G": [ - "PDUW08SDGZ_V_G", - "UxPrL", - "module", - 33 - ], - "PDUW12SDGZ_H_G": [ - "PDUW12SDGZ_H_G", - "uKPxf", - "module", - 36 - ], - "spi_sys_0000": [ - "spi_sys_0000", - "QT8j3", - "module", - 144 - ], - "PVDD1DGZ_V_G": [ - "PVDD1DGZ_V_G", - "sPggV", - "module", - 79 - ], - "iopad": [ - "iopad", - "ga3jL", - "module", - 114 - ], - "PRDW08DGZ_H_G": [ - "PRDW08DGZ_H_G", - "swWa5", - "module", - 48 - ], - "PDUW16DGZ_V_G": [ - "PDUW16DGZ_V_G", - "FDqaf", - "module", - 39 - ], - "PVSS1AC_H_G": [ - "PVSS1AC_H_G", - "EZJLH", - "module", - 92 - ], - "PRUW12DGZ_H_G": [ - "PRUW12DGZ_H_G", - "hpMjC", - "module", - 64 - ], - "PDXOEDG_H_G": [ - "PDXOEDG_H_G", - "IYQDs", - "module", - 42 - ], - "crc32": [ - "crc32", - "T59nH", - "module", - 122 - ], - "PVDD2POC_H_G": [ - "PVDD2POC_H_G", - "avdwk", - "module", - 84 - ], - "PENDCAP_G": [ - "PENDCAP_G", - "bhWYh", - "module", - 44 - ], - "PRDW08SDGZ_V_G": [ - "PRDW08SDGZ_V_G", - "JznNw", - "module", - 51 - ], - "PVSS3A_H_G": [ - "PVSS3A_H_G", - "jsR1C", - "module", - 106 - ], - "sirv_gnrl_xchecker": [ - "sirv_gnrl_xchecker", - "CjC7H", - "module", - 125 - ], - "PRDW16DGZ_H_G": [ - "PRDW16DGZ_H_G", - "EEqKt", - "module", - 56 - ], - "PRDW12DGZ_H_G": [ - "PRDW12DGZ_H_G", - "VaZm2", - "module", - 52 - ], - "PRDW12DGZ_V_G": [ - "PRDW12DGZ_V_G", - "ZKk4u", - "module", - 53 - ], - "da4008_chip_top": [ - "da4008_chip_top", - "ircEj", - "module", - 141 - ], - "PRDW12SDGZ_H_G": [ - "PRDW12SDGZ_H_G", - "fTzb4", - "module", - 54 - ], - "PRUW08DGZ_H_G": [ - "PRUW08DGZ_H_G", - "fLemy", - "module", - 60 - ], - "PVSS2ANA_H_G": [ - "PVSS2ANA_H_G", - "g8kcb", - "module", - 102 - ], - "PRUW08DGZ_V_G": [ - "PRUW08DGZ_V_G", - "EtT2L", - "module", - 61 - ], - "PRUW08SDGZ_H_G": [ - "PRUW08SDGZ_H_G", - "gwpgC", - "module", - 62 - ], - "PRUW12DGZ_V_G": [ - "PRUW12DGZ_V_G", - "pucZW", - "module", - 65 - ], - "PVDD3A_V_G": [ - "PVDD3A_V_G", - "t6fPF", - "module", - 87 - ], - "PRUW12SDGZ_H_G": [ - "PRUW12SDGZ_H_G", - "EkH6u", - "module", - 66 - ], - "PRUW16DGZ_H_G": [ - "PRUW16DGZ_H_G", - "AVYgt", - "module", - 68 - ], - "PRUW16DGZ_V_G": [ - "PRUW16DGZ_V_G", - "ErxQ3", - "module", - 69 - ], - "PVDD1A_H_G": [ - "PVDD1A_H_G", - "zNPu5", - "module", - 72 - ], - "PVDD1A_V_G": [ - "PVDD1A_V_G", - "CNBi6", - "module", - 73 - ], - "sirv_gnrl_ltch": [ - "sirv_gnrl_ltch", - "UTi0b", - "module", - 128 - ], - "PVDD1AC_H_G": [ - "PVDD1AC_H_G", - "W9VnM", - "module", - 74 - ], - "PVDD1AC_V_G": [ - "PVDD1AC_V_G", - "qn6Yx", - "module", - 75 - ], - "PVDD1ANA_H_G": [ - "PVDD1ANA_H_G", - "fEWTj", - "module", - 76 - ], - "awg_top": [ - "awg_top", - "J5zQK", - "module", - 137 - ], - "PVDD1DGZ_H_G": [ - "PVDD1DGZ_H_G", - "Eie6s", - "module", - 78 - ], - "PVSS2AC_V_G": [ - "PVSS2AC_V_G", - "YBQ1m", - "module", - 101 - ], - "PVSS3AC_V_G": [ - "PVSS3AC_V_G", - "i0k2A", - "module", - 109 - ], - "PVDD3AC_V_G": [ - "PVDD3AC_V_G", - "rZC3e", - "module", - 89 - ], - "PVDD2DGZ_V_G": [ - "PVDD2DGZ_V_G", - "LSxxn", - "module", - 83 - ], - "PVDD2POC_V_G": [ - "PVDD2POC_V_G", - "urn8Q", - "module", - 85 - ], - "PVDD3AC_H_G": [ - "PVDD3AC_H_G", - "U0PST", - "module", - 88 - ], - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", - "bghMB", - "module", - 113 - ], - "PVSS1A_V_G": [ - "PVSS1A_V_G", - "ZmPik", - "module", - 91 - ], - "PVSS1AC_V_G": [ - "PVSS1AC_V_G", - "I7RzE", - "module", - 93 - ], - "PVSS1ANA_H_G": [ - "PVSS1ANA_H_G", - "HtwuV", - "module", - 94 - ], - "PVSS1DGZ_V_G": [ - "PVSS1DGZ_V_G", - "jHcbf", - "module", - 97 - ], - "PVSS2A_H_G": [ - "PVSS2A_H_G", - "usz4x", - "module", - 98 + 1 ], "PVSS2A_V_G": [ "PVSS2A_V_G", @@ -731,53 +41,149 @@ "module", 99 ], - "PVSS2AC_H_G": [ - "PVSS2AC_H_G", - "TqmdJ", + "PENDCAPA_G": [ + "PENDCAPA_G", + "wpYca", "module", - 100 + 45 ], - "PVSS2ANA_V_G": [ - "PVSS2ANA_V_G", - "Md441", + "PDDW08DGZ_V_G": [ + "PDDW08DGZ_V_G", + "K0TuH", "module", - 103 + 15 ], - "PVSS2DGZ_H_G": [ - "PVSS2DGZ_H_G", - "ke5cH", + "PDDW16SDGZ_V_G": [ + "PDDW16SDGZ_V_G", + "ebe78", "module", - 104 + 25 ], - "PVSS2DGZ_V_G": [ - "PVSS2DGZ_V_G", - "S5Dr6", + "PDUW12SDGZ_V_G": [ + "PDUW12SDGZ_V_G", + "qCQFW", "module", - 105 + 37 ], - "PVSS3A_V_G": [ - "PVSS3A_V_G", - "VSdee", + "PDUW12SDGZ_H_G": [ + "PDUW12SDGZ_H_G", + "uKPxf", "module", - 107 + 36 ], - "tsdn28hpcpuhdb4096x128m4mw_170a": [ - "tsdn28hpcpuhdb4096x128m4mw_170a", - "UJ4u7", + "std": [ + "std", + "reYIK", "module", - 112 + 2 ], - "PVSS3AC_H_G": [ - "PVSS3AC_H_G", - "B0f3F", + "sram_if_0002": [ + "sram_if_0002", + "bEAZ8", "module", - 108 + 133 ], - "PVSS3DGZ_H_G": [ - "PVSS3DGZ_H_G", - "rq1J0", + "PCLAMP_G": [ + "PCLAMP_G", + "DA1Pu", "module", - 110 + 3 + ], + "PVDD2POC_V_G": [ + "PVDD2POC_V_G", + "urn8Q", + "module", + 85 + ], + "PDUW16DGZ_V_G": [ + "PDUW16DGZ_V_G", + "FDqaf", + "module", + 39 + ], + "iopad": [ + "iopad", + "ga3jL", + "module", + 114 + ], + "PVSS1ANA_V_G": [ + "PVSS1ANA_V_G", + "gL5Pd", + "module", + 95 + ], + "PDUW08DGZ_V_G": [ + "PDUW08DGZ_V_G", + "aEWK6", + "module", + 31 + ], + "PRDW12SDGZ_V_G": [ + "PRDW12SDGZ_V_G", + "zIUFF", + "module", + 55 + ], + "PDB3A_V_G": [ + "PDB3A_V_G", + "xqWfY", + "module", + 7 + ], + "PVDD3A_V_G": [ + "PVDD3A_V_G", + "t6fPF", + "module", + 87 + ], + "PRDW16DGZ_V_G": [ + "PRDW16DGZ_V_G", + "Jztd6", + "module", + 57 + ], + "PRUW12SDGZ_V_G": [ + "PRUW12SDGZ_V_G", + "yt645", + "module", + 67 + ], + "PDXOEDG_V_G": [ + "PDXOEDG_V_G", + "EZF3t", + "module", + 43 + ], + "da4008_chip_top": [ + "da4008_chip_top", + "ircEj", + "module", + 141 + ], + "PDDW12SDGZ_H_G": [ + "PDDW12SDGZ_H_G", + "KpuhN", + "module", + 20 + ], + "PDDW04SDGZ_H_G": [ + "PDDW04SDGZ_H_G", + "CQ4ek", + "module", + 12 + ], + "PCLAMPC_H_G": [ + "PCLAMPC_H_G", + "UyGax", + "module", + 4 + ], + "PRDW16SDGZ_V_G": [ + "PRDW16SDGZ_V_G", + "YRh5I", + "module", + 59 ], "PVSS3DGZ_V_G": [ "PVSS3DGZ_V_G", @@ -785,29 +191,239 @@ "module", 111 ], - "DEM_PhaseSync_4008": [ - "DEM_PhaseSync_4008", - "sIRhK", + "PVDD3AC_H_G": [ + "PVDD3AC_H_G", + "U0PST", "module", - 138 + 88 ], - "dacif_0000": [ - "dacif_0000", - "yeRHW", + "PCLAMPC_V_G": [ + "PCLAMPC_V_G", + "EyyeT", "module", - 116 + 5 ], - "dac_regfile": [ - "dac_regfile", - "LR0zI", + "PRDW08SDGZ_V_G": [ + "PRDW08SDGZ_V_G", + "JznNw", "module", - 118 + 51 ], - "ulink_rx": [ - "ulink_rx", - "dteMU", + "PDDW12DGZ_V_G": [ + "PDDW12DGZ_V_G", + "eR5Zz", "module", - 119 + 19 + ], + "PDDW08DGZ_H_G": [ + "PDDW08DGZ_H_G", + "C0gYT", + "module", + 14 + ], + "PVSS2DGZ_V_G": [ + "PVSS2DGZ_V_G", + "S5Dr6", + "module", + 105 + ], + "PDB3A_H_G": [ + "PDB3A_H_G", + "dfLHW", + "module", + 6 + ], + "rst_gen_unit": [ + "rst_gen_unit", + "anuMN", + "module", + 124 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", + "bghMB", + "module", + 113 + ], + "PDDW16SDGZ_H_G": [ + "PDDW16SDGZ_H_G", + "HiTWu", + "module", + 24 + ], + "PDUW16SDGZ_H_G": [ + "PDUW16SDGZ_H_G", + "iWZrk", + "module", + 40 + ], + "PDUW04SDGZ_V_G": [ + "PDUW04SDGZ_V_G", + "mJZpP", + "module", + 29 + ], + "PVSS3A_H_G": [ + "PVSS3A_H_G", + "jsR1C", + "module", + 106 + ], + "PDB3AC_H_G": [ + "PDB3AC_H_G", + "LsJ1x", + "module", + 8 + ], + "PDUW04DGZ_V_G": [ + "PDUW04DGZ_V_G", + "QGhk6", + "module", + 27 + ], + "PVDD3AC_V_G": [ + "PVDD3AC_V_G", + "rZC3e", + "module", + 89 + ], + "PVSS2DGZ_H_G": [ + "PVSS2DGZ_H_G", + "ke5cH", + "module", + 104 + ], + "PDDW04DGZ_V_G": [ + "PDDW04DGZ_V_G", + "sZaSM", + "module", + 11 + ], + "sram_if_0001": [ + "sram_if_0001", + "z4wk8", + "module", + 132 + ], + "PDDW04DGZ_H_G": [ + "PDDW04DGZ_H_G", + "Z62Gy", + "module", + 10 + ], + "PVDD1AC_V_G": [ + "PVDD1AC_V_G", + "qn6Yx", + "module", + 75 + ], + "PVSS2ANA_V_G": [ + "PVSS2ANA_V_G", + "Md441", + "module", + 103 + ], + "PDDW04SDGZ_V_G": [ + "PDDW04SDGZ_V_G", + "J6fGD", + "module", + 13 + ], + "PDDW16DGZ_H_G": [ + "PDDW16DGZ_H_G", + "GzkJA", + "module", + 22 + ], + "PVSS3AC_V_G": [ + "PVSS3AC_V_G", + "i0k2A", + "module", + 109 + ], + "PDDW08SDGZ_H_G": [ + "PDDW08SDGZ_H_G", + "QjV6F", + "module", + 16 + ], + "ulink_descrambler_32": [ + "ulink_descrambler_32", + "yuek5", + "module", + 120 + ], + "PVSS1AC_V_G": [ + "PVSS1AC_V_G", + "I7RzE", + "module", + 93 + ], + "PDDW08SDGZ_V_G": [ + "PDDW08SDGZ_V_G", + "N1ndr", + "module", + 17 + ], + "PRDW08SDGZ_H_G": [ + "PRDW08SDGZ_H_G", + "S90qD", + "module", + 50 + ], + "PDDW12DGZ_H_G": [ + "PDDW12DGZ_H_G", + "atFKr", + "module", + 18 + ], + "PDDW12SDGZ_V_G": [ + "PDDW12SDGZ_V_G", + "Pzaun", + "module", + 21 + ], + "PVDD1ANA_V_G": [ + "PVDD1ANA_V_G", + "BL1m7", + "module", + 77 + ], + "PVDD3A_H_G": [ + "PVDD3A_H_G", + "DTJPF", + "module", + 86 + ], + "PDDW16DGZ_V_G": [ + "PDDW16DGZ_V_G", + "StNiL", + "module", + 23 + ], + "PDUW04DGZ_H_G": [ + "PDUW04DGZ_H_G", + "YTwQz", + "module", + 26 + ], + "PVDD2DGZ_H_G": [ + "PVDD2DGZ_H_G", + "nULrd", + "module", + 82 + ], + "PDUW08DGZ_H_G": [ + "PDUW08DGZ_H_G", + "KkPJH", + "module", + 30 + ], + "PDUW08SDGZ_H_G": [ + "PDUW08SDGZ_H_G", + "gxqJp", + "module", + 32 ], "ulink_descrambler_128": [ "ulink_descrambler_128", @@ -821,41 +437,23 @@ "module", 130 ], - "sram_if_0000": [ - "sram_if_0000", - "nJgqZ", + "PRCUTA_G": [ + "PRCUTA_G", + "uuDJt", "module", - 131 + 47 ], - "sram_if_0001": [ - "sram_if_0001", - "z4wk8", + "PVDD1ANA_H_G": [ + "PVDD1ANA_H_G", + "fEWTj", "module", - 132 + 76 ], - "sram_if_0002": [ - "sram_if_0002", - "bEAZ8", + "PDUW08SDGZ_V_G": [ + "PDUW08SDGZ_V_G", + "UxPrL", "module", - 133 - ], - "sram_dmux_w_0000": [ - "sram_dmux_w_0000", - "dc6nH", - "module", - 134 - ], - "clk_regfile": [ - "clk_regfile", - "jAdLC", - "module", - 136 - ], - "DA4008_DEM_Parallel_PRBS_1CH": [ - "DA4008_DEM_Parallel_PRBS_1CH", - "cQW1k", - "module", - 139 + 33 ], "DA4008_DEM_Parallel_PRBS_64CH": [ "DA4008_DEM_Parallel_PRBS_64CH", @@ -863,11 +461,197 @@ "module", 140 ], - "spi_slave": [ - "spi_slave", - "eAsJz", + "PDUW12DGZ_H_G": [ + "PDUW12DGZ_H_G", + "HYpLe", "module", - 143 + 34 + ], + "PVSS1AC_H_G": [ + "PVSS1AC_H_G", + "EZJLH", + "module", + 92 + ], + "PDUW12DGZ_V_G": [ + "PDUW12DGZ_V_G", + "NkwYe", + "module", + 35 + ], + "PRUW16DGZ_H_G": [ + "PRUW16DGZ_H_G", + "AVYgt", + "module", + 68 + ], + "PDUW16SDGZ_V_G": [ + "PDUW16SDGZ_V_G", + "qePm9", + "module", + 41 + ], + "PDXOEDG_H_G": [ + "PDXOEDG_H_G", + "IYQDs", + "module", + 42 + ], + "PENDCAP_G": [ + "PENDCAP_G", + "bhWYh", + "module", + 44 + ], + "PRUW08DGZ_V_G": [ + "PRUW08DGZ_V_G", + "EtT2L", + "module", + 61 + ], + "PVDD2ANA_H_G": [ + "PVDD2ANA_H_G", + "mZVHG", + "module", + 80 + ], + "PRCUT_G": [ + "PRCUT_G", + "uQmb5", + "module", + 46 + ], + "DW_pulse_sync_0000": [ + "DW_pulse_sync_0000", + "Ss3zK", + "module", + 150 + ], + "PVDD1DGZ_H_G": [ + "PVDD1DGZ_H_G", + "Eie6s", + "module", + 78 + ], + "PRDW08DGZ_H_G": [ + "PRDW08DGZ_H_G", + "swWa5", + "module", + 48 + ], + "PVSS1A_H_G": [ + "PVSS1A_H_G", + "aYKwj", + "module", + 90 + ], + "PVSS1DGZ_V_G": [ + "PVSS1DGZ_V_G", + "jHcbf", + "module", + 97 + ], + "PRDW08DGZ_V_G": [ + "PRDW08DGZ_V_G", + "ZZxj5", + "module", + 49 + ], + "PRDW12DGZ_H_G": [ + "PRDW12DGZ_H_G", + "VaZm2", + "module", + 52 + ], + "PRDW12DGZ_V_G": [ + "PRDW12DGZ_V_G", + "ZKk4u", + "module", + 53 + ], + "TB": [ + "TB", + "sH4Fc", + "module", + 152 + ], + "PVDD2POC_H_G": [ + "PVDD2POC_H_G", + "avdwk", + "module", + 84 + ], + "PRDW12SDGZ_H_G": [ + "PRDW12SDGZ_H_G", + "fTzb4", + "module", + 54 + ], + "PRDW16DGZ_H_G": [ + "PRDW16DGZ_H_G", + "EEqKt", + "module", + 56 + ], + "PRDW16SDGZ_H_G": [ + "PRDW16SDGZ_H_G", + "V63WF", + "module", + 58 + ], + "PRUW12DGZ_H_G": [ + "PRUW12DGZ_H_G", + "hpMjC", + "module", + 64 + ], + "PRUW08DGZ_H_G": [ + "PRUW08DGZ_H_G", + "fLemy", + "module", + 60 + ], + "PRUW08SDGZ_H_G": [ + "PRUW08SDGZ_H_G", + "gwpgC", + "module", + 62 + ], + "dacif_0000": [ + "dacif_0000", + "yeRHW", + "module", + 116 + ], + "PRUW08SDGZ_V_G": [ + "PRUW08SDGZ_V_G", + "VJ8Wg", + "module", + 63 + ], + "PRUW12DGZ_V_G": [ + "PRUW12DGZ_V_G", + "pucZW", + "module", + 65 + ], + "PRUW12SDGZ_H_G": [ + "PRUW12SDGZ_H_G", + "EkH6u", + "module", + 66 + ], + "PRUW16DGZ_V_G": [ + "PRUW16DGZ_V_G", + "ErxQ3", + "module", + 69 + ], + "PRUW16SDGZ_H_G": [ + "PRUW16SDGZ_H_G", + "riJVY", + "module", + 70 ], "spi_if": [ "spi_if", @@ -875,6 +659,240 @@ "module", 145 ], + "PVDD1A_H_G": [ + "PVDD1A_H_G", + "zNPu5", + "module", + 72 + ], + "PVDD1A_V_G": [ + "PVDD1A_V_G", + "CNBi6", + "module", + 73 + ], + "crc32": [ + "crc32", + "T59nH", + "module", + 122 + ], + "sirv_gnrl_ltch": [ + "sirv_gnrl_ltch", + "UTi0b", + "module", + 128 + ], + "PVDD1AC_H_G": [ + "PVDD1AC_H_G", + "W9VnM", + "module", + 74 + ], + "PVDD1DGZ_V_G": [ + "PVDD1DGZ_V_G", + "sPggV", + "module", + 79 + ], + "PVDD2ANA_V_G": [ + "PVDD2ANA_V_G", + "J6VbG", + "module", + 81 + ], + "PVSS3A_V_G": [ + "PVSS3A_V_G", + "VSdee", + "module", + 107 + ], + "PVDD2DGZ_V_G": [ + "PVDD2DGZ_V_G", + "LSxxn", + "module", + 83 + ], + "PVSS1A_V_G": [ + "PVSS1A_V_G", + "ZmPik", + "module", + 91 + ], + "reset_tb": [ + "reset_tb", + "Q3Wk7", + "module", + 148 + ], + "PVSS1ANA_H_G": [ + "PVSS1ANA_H_G", + "HtwuV", + "module", + 94 + ], + "PVSS1DGZ_H_G": [ + "PVSS1DGZ_H_G", + "Zp1LH", + "module", + 96 + ], + "PVSS2A_H_G": [ + "PVSS2A_H_G", + "usz4x", + "module", + 98 + ], + "PVSS2AC_H_G": [ + "PVSS2AC_H_G", + "TqmdJ", + "module", + 100 + ], + "systemregfile": [ + "systemregfile", + "qcK8J", + "module", + 115 + ], + "DW_sync_0000": [ + "DW_sync_0000", + "zVfcK", + "module", + 149 + ], + "PVSS2AC_V_G": [ + "PVSS2AC_V_G", + "YBQ1m", + "module", + 101 + ], + "PVSS2ANA_H_G": [ + "PVSS2ANA_H_G", + "g8kcb", + "module", + 102 + ], + "PVSS3AC_H_G": [ + "PVSS3AC_H_G", + "B0f3F", + "module", + 108 + ], + "PVSS3DGZ_H_G": [ + "PVSS3DGZ_H_G", + "rq1J0", + "module", + 110 + ], + "sirv_gnrl_xchecker": [ + "sirv_gnrl_xchecker", + "CjC7H", + "module", + 125 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a": [ + "tsdn28hpcpuhdb4096x128m4mw_170a", + "UJ4u7", + "module", + 112 + ], + "syn_fwft_fifo": [ + "syn_fwft_fifo", + "gzftm", + "module", + 117 + ], + "ulink_rx": [ + "ulink_rx", + "dteMU", + "module", + 119 + ], + "ulink_frame_receiver_0000": [ + "ulink_frame_receiver_0000", + "P3BwM", + "module", + 123 + ], + "pulse_generator": [ + "pulse_generator", + "aJYLF", + "module", + 126 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 127 + ], + "ramp_gen_0000": [ + "ramp_gen_0000", + "AyqFm", + "module", + 129 + ], + "sram_if_0000": [ + "sram_if_0000", + "nJgqZ", + "module", + 131 + ], + "sram_dmux_w_0000": [ + "sram_dmux_w_0000", + "dc6nH", + "module", + 134 + ], + "dpram": [ + "dpram", + "bQxt6", + "module", + 135 + ], + "clk_regfile": [ + "clk_regfile", + "jAdLC", + "module", + 136 + ], + "awg_top": [ + "awg_top", + "J5zQK", + "module", + 137 + ], + "DEM_PhaseSync_4008": [ + "DEM_PhaseSync_4008", + "sIRhK", + "module", + 138 + ], + "DA4008_DEM_Parallel_PRBS_1CH": [ + "DA4008_DEM_Parallel_PRBS_1CH", + "cQW1k", + "module", + 139 + ], + "spi_bus_decoder_0000": [ + "spi_bus_decoder_0000", + "qLaCg", + "module", + 142 + ], + "spi_slave": [ + "spi_slave", + "eAsJz", + "module", + 143 + ], + "spi_sys_0000": [ + "spi_sys_0000", + "QT8j3", + "module", + 144 + ], "clk_gen": [ "clk_gen", "MEIvW", @@ -887,30 +905,12 @@ "module", 147 ], - "DW_sync_0000": [ - "DW_sync_0000", - "zVfcK", - "module", - 149 - ], - "DW_pulse_sync_0000": [ - "DW_pulse_sync_0000", - "Ss3zK", - "module", - 150 - ], "lvds_if": [ "lvds_if", "nS0i0", "module", 151 ], - "TB": [ - "TB", - "sH4Fc", - "module", - 152 - ], "...MASTER...": [ "SIM", "amcQw", diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/constraint.sdb b/DA4008_V1.2/sim/chip_top/simv.daidir/constraint.sdb index 82e87e8..85e2664 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/constraint.sdb and b/DA4008_V1.2/sim/chip_top/simv.daidir/constraint.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/AllModulesSkeletons.sdb b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/AllModulesSkeletons.sdb index 645927b..07bd0fe 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/AllModulesSkeletons.sdb and b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/AllModulesSkeletons.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/HsimSigOptDb.sdb b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/HsimSigOptDb.sdb index a582302..405f474 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/HsimSigOptDb.sdb and b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/HsimSigOptDb.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/dve_debug.db.gz b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/dve_debug.db.gz index a58895a..c4df61c 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/dve_debug.db.gz and b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/dve_debug.db.gz differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/.create_fsearch_db b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/.create_fsearch_db index 0efe198..72dfca3 100755 --- a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/.create_fsearch_db +++ b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/.create_fsearch_db @@ -5,5 +5,5 @@ PYTHONPATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export PYTHONPATH LD_LIBRARY_PATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib:/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export LD_LIBRARY_PATH -/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_X4vtNx.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_E1cKA4.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" \mv "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db" diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz b/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz new file mode 100644 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Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/simv.daidir/ttIncr_64124.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_hsim_uds.db b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_hsim_uds.db index 12a2348..3544e39 100644 --- a/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_hsim_uds.db +++ b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_hsim_uds.db @@ -3,3 +3,8 @@ vcselab_misc_mnmn.db 2715 vcselab_misc_hsim_name.db 18117 vcselab_master_hsim_virtintf_info.dat 160 vcselab_misc_hsim_merge.db 1349204 +vcselab_misc_midd.db 57445 +vcselab_misc_mnmn.db 2715 +vcselab_misc_hsim_name.db 18117 +vcselab_master_hsim_virtintf_info.dat 160 +vcselab_misc_hsim_merge.db 1349204 diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_midd.db b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_midd.db index 3b682e9..2c06e1c 100644 Binary files a/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_midd.db and b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_midd.db differ diff --git a/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_tCEYNb b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_tCEYNb new file mode 100644 index 0000000..f71343b Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/simv.daidir/vcselab_misc_tCEYNb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/cm.log b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/cm.log index 8b71164..dd44274 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/cm.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/cm.log @@ -3,7 +3,7 @@ : // Generated by: VCS Coverage Metrics O-2018.09-SP2_Full64 : // User: shbyang -: // Date: Fri Mar 13 16:24:00 2026 +: // Date: Sat Mar 14 17:19:29 2026 : Disabling fsm sequence coverage for module \$unit::../../lib/tphn28hpcpgv18.v::../../lib/tsdn28hpcpuhdb4096x128m4mw_170a_ffg0p99v0c.v...@348857874 ... : Disabling fsm sequence coverage for module PCLAMP_G ... diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/novas_dump.log b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/novas_dump.log index eee133d..a9d06eb 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/novas_dump.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/novas_dump.log @@ -278,9 +278,9 @@ DBUS_STARTER_BUS_TYPE=session W3264_NO_HOST_CHECK=1 SCL_HOME=/opt/synopsys/scl/2018.06 HOSTTYPE=x86_64-linux -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/300489a5_6011_46a1_a329_83b2a6d46428 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/461a392b_7deb_466e_bdba_86422bb75acb CDS_SPECTRERF_FBENABLE=1 -GNOME_TERMINAL_SERVICE=:1.1458 +GNOME_TERMINAL_SERVICE=:1.1513 HISTSIZE=1000 GROUP=cryo TXS_HOME=/opt/synopsys/txs/O-2018.06-SP1 @@ -315,8 +315,8 @@ argv[7]=-cm_name argv[8]=flattop argv[9]=+ENABLE_FSDB=1 316 profile - 100 - CPU/Mem usage: 0.080 sys, 0.350 user, 316.72M mem -317 Fri Mar 13 16:24:00 2026 + CPU/Mem usage: 0.070 sys, 0.340 user, 308.33M mem +317 Sat Mar 14 17:19:29 2026 318 pliAppInit 319 FSDB_GATE is set. 320 FSDB_RTL is set. @@ -332,76 +332,77 @@ argv[9]=+ENABLE_FSDB=1 330 argv[0]: (500) 331 argv[1]: (./verdplus.fsdb) 332 argv[2]: (1000000) -333 *Verdi* FSDB: The switch FSDB file size might not match the input size (500MB) because of performance concerns. -334 *Verdi* FSDB: To have the FSDB file size match the input size (500MB), set the FSDB_ENV_PRECISE_AUTOSWITCH environment, though the dumping performance might decrease. -335 *Verdi* : Enable automatic switching of the FSDB file. -336 *Verdi* : (Filename='./verdplus', Limit Size=500MB, File Amount=1000000). -337 *Verdi* : Create FSDB file './verdplus_000.fsdb' -338 compile option from '/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcs_rebuild'. -339 "vcs '-full64' '-j8' '-sverilog' '+lint=TFIPC-L' '+v2k' '-debug_access+all' '-debug_region+cell+encrypt' '-P' '/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/novas_new_dumper.tab' '/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a' '+define+DUMP_FSDB' '-lca' '-q' '-timescale=1ns/1ps' '+nospecify' '-l' 'compile.log' '-cm' 'line+cond+fsm+tgl+branch' '-cm_dir' './coverage/simv.vdb' '-f' 'filelist_vlg.f' '+incdir+./../../rtl/define' '+incdir+./../../rtl/qubitmcu' '+incdir+./../../model' 2>&1" -340 *Verdi* : Create the file './verdplus.log' to log the time range of each FSDB file. -341 *Verdi* : Create virtual FSDB file './verdplus.vf' to log each FSDB file. -342 sps_call_fsdbDumpvars_vd_main at 0 : ../../sim/chip_top/TB.sv(58) -343 [spi_vcs_vd_ppi_create_root]: no upf option -344 FSDB dumper cannot dump UPF related power signal ($power_tree): no ppiPowerNetwork. -345 *Verdi* : Begin traversing the scopes, layer (0). -346 *Verdi* : End of traversing. -347 pliAppHDL_DumpVarComplete traverse var: profile - - CPU/Mem usage: 0.090 sys, 0.420 user, 413.95M mem - incr: 0.010 sys, 0.070 user, 9.70M mem - accu: 0.010 sys, 0.070 user, 9.70M mem - accu incr: 0.010 sys, 0.070 user, 9.70M mem +333 *Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. +334 *Verdi* FSDB: The switch FSDB file size might not match the input size (500MB) because of performance concerns. +335 *Verdi* FSDB: To have the FSDB file size match the input size (500MB), set the FSDB_ENV_PRECISE_AUTOSWITCH environment, though the dumping performance might decrease. +336 *Verdi* : Enable automatic switching of the FSDB file. +337 *Verdi* : (Filename='./verdplus', Limit Size=500MB, File Amount=1000000). +338 *Verdi* : Create FSDB file './verdplus_000.fsdb' +339 compile option from '/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcs_rebuild'. +340 "vcs '-full64' '-j8' '-sverilog' '+lint=TFIPC-L' '+v2k' '-debug_access+all' '-debug_region+cell+encrypt' '-P' '/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/novas_new_dumper.tab' '/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a' '+define+DUMP_FSDB' '-lca' '-q' '-timescale=1ns/1ps' '+nospecify' '-l' 'compile.log' '-cm' 'line+cond+fsm+tgl+branch' '-cm_dir' './coverage/simv.vdb' '-f' 'filelist_vlg.f' '+incdir+./../../rtl/define' '+incdir+./../../rtl/qubitmcu' '+incdir+./../../model' 2>&1" +341 *Verdi* : Create the file './verdplus.log' to log the time range of each FSDB file. +342 *Verdi* : Create virtual FSDB file './verdplus.vf' to log each FSDB file. +343 sps_call_fsdbDumpvars_vd_main at 0 : ../../sim/chip_top/TB.sv(58) +344 [spi_vcs_vd_ppi_create_root]: no upf option +345 FSDB dumper cannot dump UPF related power signal ($power_tree): no ppiPowerNetwork. +346 *Verdi* : Begin traversing the scopes, layer (0). +347 *Verdi* : End of traversing. +348 pliAppHDL_DumpVarComplete traverse var: profile - + CPU/Mem usage: 0.090 sys, 0.410 user, 405.39M mem + incr: 0.010 sys, 0.070 user, 9.52M mem + accu: 0.010 sys, 0.070 user, 9.52M mem + accu incr: 0.010 sys, 0.070 user, 9.52M mem Count usage: 12707 var, 14739 idcode, 7320 callback incr: 12707 var, 14739 idcode, 7320 callback accu: 12707 var, 14739 idcode, 7320 callback accu incr: 12707 var, 14739 idcode, 7320 callback -348 Fri Mar 13 16:24:00 2026 -349 pliAppHDL_DumpVarComplete: profile - - CPU/Mem usage: 0.090 sys, 0.420 user, 414.99M mem - incr: 0.000 sys, 0.000 user, 1.05M mem - accu: 0.010 sys, 0.070 user, 10.75M mem - accu incr: 0.000 sys, 0.000 user, 1.05M mem +349 Sat Mar 14 17:19:29 2026 +350 pliAppHDL_DumpVarComplete: profile - + CPU/Mem usage: 0.090 sys, 0.410 user, 406.58M mem + incr: 0.000 sys, 0.000 user, 1.19M mem + accu: 0.010 sys, 0.070 user, 10.72M mem + accu incr: 0.000 sys, 0.000 user, 1.19M mem Count usage: 12707 var, 14739 idcode, 7320 callback incr: 0 var, 0 idcode, 0 callback accu: 12707 var, 14739 idcode, 7320 callback accu incr: 0 var, 0 idcode, 0 callback -350 Fri Mar 13 16:24:00 2026 -351 sps_call_fsdbDumpMDA_vd_main at 0 : ../../sim/chip_top/TB.sv(59) -352 *Verdi* : Begin traversing the MDAs, layer (0). -353 *Verdi* : Enable +mda and +packedmda dumping. -354 *Verdi* : End of traversing the MDAs. -355 pliAppHDL_DumpVarComplete traverse var: profile - - CPU/Mem usage: 0.100 sys, 0.440 user, 418.82M mem - incr: 0.010 sys, 0.020 user, 3.83M mem - accu: 0.010 sys, 0.020 user, 3.83M mem - accu incr: 0.010 sys, 0.020 user, 3.83M mem +351 Sat Mar 14 17:19:29 2026 +352 sps_call_fsdbDumpMDA_vd_main at 0 : ../../sim/chip_top/TB.sv(59) +353 *Verdi* : Begin traversing the MDAs, layer (0). +354 *Verdi* : Enable +mda and +packedmda dumping. +355 *Verdi* : End of traversing the MDAs. +356 pliAppHDL_DumpVarComplete traverse var: profile - + CPU/Mem usage: 0.090 sys, 0.430 user, 410.39M mem + incr: 0.000 sys, 0.020 user, 3.82M mem + accu: 0.000 sys, 0.020 user, 3.82M mem + accu incr: 0.000 sys, 0.020 user, 3.82M mem Count usage: 80429 var, 81757 idcode, 7372 callback incr: 67722 var, 67018 idcode, 52 callback accu: 67722 var, 67018 idcode, 52 callback accu incr: 67722 var, 67018 idcode, 52 callback -356 Fri Mar 13 16:24:00 2026 -357 pliAppHDL_DumpVarComplete: profile - - CPU/Mem usage: 0.100 sys, 0.440 user, 426.29M mem - incr: 0.000 sys, 0.000 user, 7.47M mem - accu: 0.010 sys, 0.020 user, 11.30M mem - accu incr: 0.000 sys, 0.000 user, 7.47M mem +357 Sat Mar 14 17:19:30 2026 +358 pliAppHDL_DumpVarComplete: profile - + CPU/Mem usage: 0.100 sys, 0.440 user, 417.86M mem + incr: 0.010 sys, 0.010 user, 7.46M mem + accu: 0.010 sys, 0.030 user, 11.28M mem + accu incr: 0.010 sys, 0.010 user, 7.46M mem Count usage: 80429 var, 81757 idcode, 7372 callback incr: 0 var, 0 idcode, 0 callback accu: 67722 var, 67018 idcode, 52 callback accu incr: 0 var, 0 idcode, 0 callback -358 Fri Mar 13 16:24:00 2026 -359 End of simulation at 198910080 -360 Fri Mar 13 16:24:05 2026 -361 Begin FSDB profile info: -362 FSDB Writer : bc1(19254673) bcn(1920554) mtf/stf(0/0) -FSDB Writer elapsed time : flush(0.212152) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) +359 Sat Mar 14 17:19:30 2026 +360 End of simulation at 228913152 +361 Sat Mar 14 17:19:34 2026 +362 Begin FSDB profile info: +363 FSDB Writer : bc1(22146360) bcn(2141522) mtf/stf(0/0) +FSDB Writer elapsed time : flush(1.702198) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) FSDB Writer cpu time : MT Compression : 0 -363 End FSDB profile info -364 Parallel profile - Flush:4 Expand:0 ProduceWait:0 ConsumerWait:244 BlockUsed:244 -365 ProduceTime:5.741575592 ConsumerTime:2.877569778 Buffer:64MB -366 SimExit -367 Sim process exit +364 End FSDB profile info +365 Parallel profile - Flush:4 Expand:0 ProduceWait:0 ConsumerWait:280 BlockUsed:280 +366 ProduceTime:6.019864105 ConsumerTime:2.235539948 Buffer:64MB +367 SimExit +368 Sim process exit diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/sim.log b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/sim.log index d03ae49..39d80f1 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/sim.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/sim.log @@ -1,13 +1,14 @@ Command: /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/flattop/./simv -l sim.log -cm line+cond+fsm+tgl+branch -cm_dir ../../coverage/try/ -cm_name flattop +ENABLE_FSDB=1 Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. -Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 13 16:24 2026 +Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 14 17:19 2026 Information: *** Instance TB.U_da4008_chip_top.digital_top.u_dw_stream_sync is the DW_stream_sync Clock Domain Crossing Module *** ../../../../case/config/try//flattop.txt ../../data_RTL/try/flattop.txt *Verdi* Loading libsscore_vcs201809.so FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019 (C) 1996 - 2019 by Synopsys, Inc. +*Verdi* FSDB WARNING: The FSDB file already exists. Overwriting the FSDB file may crash the programs that are using this file. *Verdi* FSDB: The switch FSDB file size might not match the input size (500MB) because of performance concerns. *Verdi* FSDB: To have the FSDB file size match the input size (500MB), set the FSDB_ENV_PRECISE_AUTOSWITCH environment, though the dumping performance might decrease. *Verdi* : Enable automatic switching of the FSDB file. @@ -257,4 +258,4 @@ data[63]='h00010304 VCS Coverage Metrics: during simulation line, cond, FSM, branch, tgl was monitored --------------------------------------------------------------------------- V C S S i m u l a t i o n R e p o r t -Time: 198910080 ps +Time: 228913152 ps diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv index 0036aa9..f87b060 100755 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/.vcs.timestamp b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/.vcs.timestamp index 0d4e6bb..3d08c7c 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/.vcs.timestamp +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/.vcs.timestamp @@ -133,8 +133,8 @@ HSPICE_HOME=/opt/synopsys/hspice/N-2017.12-SP2 HOSTTYPE=x86_64-linux HISTCONTROL=ignoredups GROUP=cryo -GNOME_TERMINAL_SERVICE=:1.1458 -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/300489a5_6011_46a1_a329_83b2a6d46428 +GNOME_TERMINAL_SERVICE=:1.1513 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/461a392b_7deb_466e_bdba_86422bb75acb GNOME_SHELL_SESSION_MODE=classic GNOME_DESKTOP_SESSION_ID=this-is-deprecated GENUS_HOME=/opt/cadence/GENUS152 @@ -170,7 +170,7 @@ AMS_ENABLE_NOISE=YES 1773384753 ./../../rtl/define/../define/chip_undefine.v 1773384753 ./../../rtl/define/../define/chip_define.v 1773384753 ../../rtl/define/chip_undefine.v -1773384753 ../../sim/chip_top/TB.sv +1773479827 ../../sim/chip_top/TB.sv 1773384753 ../../model/DW_pulse_sync.v 1773384753 ../../model/DW_sync.v 1773384753 ../../model/DW_reset_sync.v @@ -226,5 +226,5 @@ AMS_ENABLE_NOISE=YES 1551421768 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so 1551421789 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so 1550752033 /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a -1773384887 simv.daidir +1773479969 simv.daidir -1 partitionlib diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64094_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64094_archive_1.so new file mode 100755 index 0000000..81768e1 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64094_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64123_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64123_archive_1.so new file mode 100755 index 0000000..a048a5e Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_64123_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_csrc0.so b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_csrc0.so new file mode 100755 index 0000000..1a959ff Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_csrc0.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_prev_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_prev_archive_1.so new file mode 100755 index 0000000..f9266c0 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/_prev_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/binmap.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/binmap.sdb index 54897d5..4d6f43f 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/binmap.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/binmap.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/cgname.json b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/cgname.json index 39f08d3..eb59b57 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/cgname.json +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/cgname.json @@ -1,9 +1,9 @@ { - "PDDW04SDGZ_H_G": [ - "PDDW04SDGZ_H_G", - "CQ4ek", + "PDUW16DGZ_H_G": [ + "PDUW16DGZ_H_G", + "M7qR3", "module", - 12 + 38 ], "PDB3AC_V_G": [ "PDB3AC_V_G", @@ -11,125 +11,11 @@ "module", 9 ], - "PCLAMP_G": [ - "PCLAMP_G", - "DA1Pu", + "dac_regfile": [ + "dac_regfile", + "LR0zI", "module", - 3 - ], - "PDUW04DGZ_H_G": [ - "PDUW04DGZ_H_G", - "YTwQz", - "module", - 26 - ], - "PVSS1ANA_V_G": [ - "PVSS1ANA_V_G", - "gL5Pd", - "module", - 95 - ], - "PVDD3A_H_G": [ - "PVDD3A_H_G", - "DTJPF", - "module", - 86 - ], - "PDDW08DGZ_V_G": [ - "PDDW08DGZ_V_G", - "K0TuH", - "module", - 15 - ], - "PRCUTA_G": [ - "PRCUTA_G", - "uuDJt", - "module", - 47 - ], - "dpram": [ - "dpram", - "bQxt6", - "module", - 135 - ], - "PRDW08DGZ_V_G": [ - "PRDW08DGZ_V_G", - "ZZxj5", - "module", - 49 - ], - "_vcs_unit__348857874": [ - "_vcs_unit__348857874", - "FgDcH", - "module", - 1 - ], - "PDUW16SDGZ_H_G": [ - "PDUW16SDGZ_H_G", - "iWZrk", - "module", - 40 - ], - "PDXOEDG_V_G": [ - "PDXOEDG_V_G", - "EZF3t", - "module", - 43 - ], - "PENDCAPA_G": [ - "PENDCAPA_G", - "wpYca", - "module", - 45 - ], - "sirv_gnrl_dffl": [ - "sirv_gnrl_dffl", - "BM4bj", - "module", - 127 - ], - "spi_bus_decoder_0000": [ - "spi_bus_decoder_0000", - "qLaCg", - "module", - 142 - ], - "PDDW08DGZ_H_G": [ - "PDDW08DGZ_H_G", - "C0gYT", - "module", - 14 - ], - "std": [ - "std", - "reYIK", - "module", - 2 - ], - "PVDD2ANA_V_G": [ - "PVDD2ANA_V_G", - "J6VbG", - "module", - 81 - ], - "PDUW12SDGZ_V_G": [ - "PDUW12SDGZ_V_G", - "qCQFW", - "module", - 37 - ], - "PDB3A_H_G": [ - "PDB3A_H_G", - "dfLHW", - "module", - 6 - ], - "PVSS1DGZ_H_G": [ - "PVSS1DGZ_H_G", - "Zp1LH", - "module", - 96 + 118 ], "PRUW16SDGZ_V_G": [ "PRUW16SDGZ_V_G", @@ -137,593 +23,17 @@ "module", 71 ], - "PRDW16SDGZ_V_G": [ - "PRDW16SDGZ_V_G", - "YRh5I", - "module", - 59 - ], - "PDDW04SDGZ_V_G": [ - "PDDW04SDGZ_V_G", - "J6fGD", - "module", - 13 - ], - "PCLAMPC_H_G": [ - "PCLAMPC_H_G", - "UyGax", - "module", - 4 - ], - "PDDW04DGZ_V_G": [ - "PDDW04DGZ_V_G", - "sZaSM", - "module", - 11 - ], - "PCLAMPC_V_G": [ - "PCLAMPC_V_G", - "EyyeT", - "module", - 5 - ], - "PVDD1ANA_V_G": [ - "PVDD1ANA_V_G", - "BL1m7", - "module", - 77 - ], - "PDB3A_V_G": [ - "PDB3A_V_G", - "xqWfY", - "module", - 7 - ], - "PDDW12DGZ_H_G": [ - "PDDW12DGZ_H_G", - "atFKr", - "module", - 18 - ], - "PDB3AC_H_G": [ - "PDB3AC_H_G", - "LsJ1x", - "module", - 8 - ], - "PDDW04DGZ_H_G": [ - "PDDW04DGZ_H_G", - "Z62Gy", - "module", - 10 - ], - "PVSS1A_H_G": [ - "PVSS1A_H_G", - "aYKwj", - "module", - 90 - ], - "PRDW16SDGZ_H_G": [ - "PRDW16SDGZ_H_G", - "V63WF", - "module", - 58 - ], - "PDUW08DGZ_V_G": [ - "PDUW08DGZ_V_G", - "aEWK6", - "module", - 31 - ], - "PDUW12DGZ_V_G": [ - "PDUW12DGZ_V_G", - "NkwYe", - "module", - 35 - ], - "PDDW08SDGZ_H_G": [ - "PDDW08SDGZ_H_G", - "QjV6F", - "module", - 16 - ], - "PDUW16SDGZ_V_G": [ - "PDUW16SDGZ_V_G", - "qePm9", - "module", - 41 - ], - "PDDW12DGZ_V_G": [ - "PDDW12DGZ_V_G", - "eR5Zz", - "module", - 19 - ], - "rst_gen_unit": [ - "rst_gen_unit", - "anuMN", - "module", - 124 - ], - "PDUW16DGZ_H_G": [ - "PDUW16DGZ_H_G", - "M7qR3", - "module", - 38 - ], - "PDDW08SDGZ_V_G": [ - "PDDW08SDGZ_V_G", - "N1ndr", - "module", - 17 - ], - "ramp_gen_0000": [ - "ramp_gen_0000", - "AyqFm", - "module", - 129 - ], - "PDDW12SDGZ_H_G": [ - "PDDW12SDGZ_H_G", - "KpuhN", - "module", - 20 - ], - "ulink_descrambler_32": [ - "ulink_descrambler_32", - "yuek5", - "module", - 120 - ], - "PDDW12SDGZ_V_G": [ - "PDDW12SDGZ_V_G", - "Pzaun", - "module", - 21 - ], - "PDDW16DGZ_H_G": [ - "PDDW16DGZ_H_G", - "GzkJA", - "module", - 22 - ], - "systemregfile": [ - "systemregfile", - "qcK8J", - "module", - 115 - ], - "PRDW16DGZ_V_G": [ - "PRDW16DGZ_V_G", - "Jztd6", - "module", - 57 - ], - "PRUW08SDGZ_V_G": [ - "PRUW08SDGZ_V_G", - "VJ8Wg", - "module", - 63 - ], - "PRUW16SDGZ_H_G": [ - "PRUW16SDGZ_H_G", - "riJVY", - "module", - 70 - ], - "PVDD2ANA_H_G": [ - "PVDD2ANA_H_G", - "mZVHG", - "module", - 80 - ], - "PDDW16DGZ_V_G": [ - "PDDW16DGZ_V_G", - "StNiL", - "module", - 23 - ], - "PDDW16SDGZ_H_G": [ - "PDDW16SDGZ_H_G", - "HiTWu", - "module", - 24 - ], - "PDDW16SDGZ_V_G": [ - "PDDW16SDGZ_V_G", - "ebe78", - "module", - 25 - ], - "ulink_frame_receiver_0000": [ - "ulink_frame_receiver_0000", - "P3BwM", - "module", - 123 - ], - "PRDW08SDGZ_H_G": [ - "PRDW08SDGZ_H_G", - "S90qD", - "module", - 50 - ], - "PDUW04SDGZ_V_G": [ - "PDUW04SDGZ_V_G", - "mJZpP", - "module", - 29 - ], - "PVDD2DGZ_H_G": [ - "PVDD2DGZ_H_G", - "nULrd", - "module", - 82 - ], - "PDUW04DGZ_V_G": [ - "PDUW04DGZ_V_G", - "QGhk6", - "module", - 27 - ], - "syn_fwft_fifo": [ - "syn_fwft_fifo", - "gzftm", - "module", - 117 - ], - "reset_tb": [ - "reset_tb", - "Q3Wk7", - "module", - 148 - ], "PDUW04SDGZ_H_G": [ "PDUW04SDGZ_H_G", "wGYhm", "module", 28 ], - "PDUW08DGZ_H_G": [ - "PDUW08DGZ_H_G", - "KkPJH", + "_vcs_unit__348857874": [ + "_vcs_unit__348857874", + "FgDcH", "module", - 30 - ], - "PRUW12SDGZ_V_G": [ - "PRUW12SDGZ_V_G", - "yt645", - "module", - 67 - ], - "PRDW12SDGZ_V_G": [ - "PRDW12SDGZ_V_G", - "zIUFF", - "module", - 55 - ], - "PDUW08SDGZ_H_G": [ - "PDUW08SDGZ_H_G", - "gxqJp", - "module", - 32 - ], - "pulse_generator": [ - "pulse_generator", - "aJYLF", - "module", - 126 - ], - "PRCUT_G": [ - "PRCUT_G", - "uQmb5", - "module", - 46 - ], - "PDUW12DGZ_H_G": [ - "PDUW12DGZ_H_G", - "HYpLe", - "module", - 34 - ], - "PDUW08SDGZ_V_G": [ - "PDUW08SDGZ_V_G", - "UxPrL", - "module", - 33 - ], - "PDUW12SDGZ_H_G": [ - "PDUW12SDGZ_H_G", - "uKPxf", - "module", - 36 - ], - "spi_sys_0000": [ - "spi_sys_0000", - "QT8j3", - "module", - 144 - ], - "PVDD1DGZ_V_G": [ - "PVDD1DGZ_V_G", - "sPggV", - "module", - 79 - ], - "iopad": [ - "iopad", - "ga3jL", - "module", - 114 - ], - "PRDW08DGZ_H_G": [ - "PRDW08DGZ_H_G", - "swWa5", - "module", - 48 - ], - "PDUW16DGZ_V_G": [ - "PDUW16DGZ_V_G", - "FDqaf", - "module", - 39 - ], - "PVSS1AC_H_G": [ - "PVSS1AC_H_G", - "EZJLH", - "module", - 92 - ], - "PRUW12DGZ_H_G": [ - "PRUW12DGZ_H_G", - "hpMjC", - "module", - 64 - ], - "PDXOEDG_H_G": [ - "PDXOEDG_H_G", - "IYQDs", - "module", - 42 - ], - "crc32": [ - "crc32", - "T59nH", - "module", - 122 - ], - "PVDD2POC_H_G": [ - "PVDD2POC_H_G", - "avdwk", - "module", - 84 - ], - "PENDCAP_G": [ - "PENDCAP_G", - "bhWYh", - "module", - 44 - ], - "PRDW08SDGZ_V_G": [ - "PRDW08SDGZ_V_G", - "JznNw", - "module", - 51 - ], - "PVSS3A_H_G": [ - "PVSS3A_H_G", - "jsR1C", - "module", - 106 - ], - "sirv_gnrl_xchecker": [ - "sirv_gnrl_xchecker", - "CjC7H", - "module", - 125 - ], - "PRDW16DGZ_H_G": [ - "PRDW16DGZ_H_G", - "EEqKt", - "module", - 56 - ], - "PRDW12DGZ_H_G": [ - "PRDW12DGZ_H_G", - "VaZm2", - "module", - 52 - ], - "PRDW12DGZ_V_G": [ - "PRDW12DGZ_V_G", - "ZKk4u", - "module", - 53 - ], - "da4008_chip_top": [ - "da4008_chip_top", - "ircEj", - "module", - 141 - ], - "PRDW12SDGZ_H_G": [ - "PRDW12SDGZ_H_G", - "fTzb4", - "module", - 54 - ], - "PRUW08DGZ_H_G": [ - "PRUW08DGZ_H_G", - "fLemy", - "module", - 60 - ], - "PVSS2ANA_H_G": [ - "PVSS2ANA_H_G", - "g8kcb", - "module", - 102 - ], - "PRUW08DGZ_V_G": [ - "PRUW08DGZ_V_G", - "EtT2L", - "module", - 61 - ], - "PRUW08SDGZ_H_G": [ - "PRUW08SDGZ_H_G", - "gwpgC", - "module", - 62 - ], - "PRUW12DGZ_V_G": [ - "PRUW12DGZ_V_G", - "pucZW", - "module", - 65 - ], - "PVDD3A_V_G": [ - "PVDD3A_V_G", - "t6fPF", - "module", - 87 - ], - "PRUW12SDGZ_H_G": [ - "PRUW12SDGZ_H_G", - "EkH6u", - "module", - 66 - ], - "PRUW16DGZ_H_G": [ - "PRUW16DGZ_H_G", - "AVYgt", - "module", - 68 - ], - "PRUW16DGZ_V_G": [ - "PRUW16DGZ_V_G", - "ErxQ3", - "module", - 69 - ], - "PVDD1A_H_G": [ - "PVDD1A_H_G", - "zNPu5", - "module", - 72 - ], - "PVDD1A_V_G": [ - "PVDD1A_V_G", - "CNBi6", - "module", - 73 - ], - "sirv_gnrl_ltch": [ - "sirv_gnrl_ltch", - "UTi0b", - "module", - 128 - ], - "PVDD1AC_H_G": [ - "PVDD1AC_H_G", - "W9VnM", - "module", - 74 - ], - "PVDD1AC_V_G": [ - "PVDD1AC_V_G", - "qn6Yx", - "module", - 75 - ], - "PVDD1ANA_H_G": [ - "PVDD1ANA_H_G", - "fEWTj", - "module", - 76 - ], - "awg_top": [ - "awg_top", - "J5zQK", - "module", - 137 - ], - "PVDD1DGZ_H_G": [ - "PVDD1DGZ_H_G", - "Eie6s", - "module", - 78 - ], - "PVSS2AC_V_G": [ - "PVSS2AC_V_G", - "YBQ1m", - "module", - 101 - ], - "PVSS3AC_V_G": [ - "PVSS3AC_V_G", - "i0k2A", - "module", - 109 - ], - "PVDD3AC_V_G": [ - "PVDD3AC_V_G", - "rZC3e", - "module", - 89 - ], - "PVDD2DGZ_V_G": [ - "PVDD2DGZ_V_G", - "LSxxn", - "module", - 83 - ], - "PVDD2POC_V_G": [ - "PVDD2POC_V_G", - "urn8Q", - "module", - 85 - ], - "PVDD3AC_H_G": [ - "PVDD3AC_H_G", - "U0PST", - "module", - 88 - ], - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", - "bghMB", - "module", - 113 - ], - "PVSS1A_V_G": [ - "PVSS1A_V_G", - "ZmPik", - "module", - 91 - ], - "PVSS1AC_V_G": [ - "PVSS1AC_V_G", - "I7RzE", - "module", - 93 - ], - "PVSS1ANA_H_G": [ - "PVSS1ANA_H_G", - "HtwuV", - "module", - 94 - ], - "PVSS1DGZ_V_G": [ - "PVSS1DGZ_V_G", - "jHcbf", - "module", - 97 - ], - "PVSS2A_H_G": [ - "PVSS2A_H_G", - "usz4x", - "module", - 98 + 1 ], "PVSS2A_V_G": [ "PVSS2A_V_G", @@ -731,53 +41,149 @@ "module", 99 ], - "PVSS2AC_H_G": [ - "PVSS2AC_H_G", - "TqmdJ", + "PENDCAPA_G": [ + "PENDCAPA_G", + "wpYca", "module", - 100 + 45 ], - "PVSS2ANA_V_G": [ - "PVSS2ANA_V_G", - "Md441", + "PDDW08DGZ_V_G": [ + "PDDW08DGZ_V_G", + "K0TuH", "module", - 103 + 15 ], - "PVSS2DGZ_H_G": [ - "PVSS2DGZ_H_G", - "ke5cH", + "PDDW16SDGZ_V_G": [ + "PDDW16SDGZ_V_G", + "ebe78", "module", - 104 + 25 ], - "PVSS2DGZ_V_G": [ - "PVSS2DGZ_V_G", - "S5Dr6", + "PDUW12SDGZ_V_G": [ + "PDUW12SDGZ_V_G", + "qCQFW", "module", - 105 + 37 ], - "PVSS3A_V_G": [ - "PVSS3A_V_G", - "VSdee", + "PDUW12SDGZ_H_G": [ + "PDUW12SDGZ_H_G", + "uKPxf", "module", - 107 + 36 ], - "tsdn28hpcpuhdb4096x128m4mw_170a": [ - "tsdn28hpcpuhdb4096x128m4mw_170a", - "UJ4u7", + "std": [ + "std", + "reYIK", "module", - 112 + 2 ], - "PVSS3AC_H_G": [ - "PVSS3AC_H_G", - "B0f3F", + "sram_if_0002": [ + "sram_if_0002", + "bEAZ8", "module", - 108 + 133 ], - "PVSS3DGZ_H_G": [ - "PVSS3DGZ_H_G", - "rq1J0", + "PCLAMP_G": [ + "PCLAMP_G", + "DA1Pu", "module", - 110 + 3 + ], + "PVDD2POC_V_G": [ + "PVDD2POC_V_G", + "urn8Q", + "module", + 85 + ], + "PDUW16DGZ_V_G": [ + "PDUW16DGZ_V_G", + "FDqaf", + "module", + 39 + ], + "iopad": [ + "iopad", + "ga3jL", + "module", + 114 + ], + "PVSS1ANA_V_G": [ + "PVSS1ANA_V_G", + "gL5Pd", + "module", + 95 + ], + "PDUW08DGZ_V_G": [ + "PDUW08DGZ_V_G", + "aEWK6", + "module", + 31 + ], + "PRDW12SDGZ_V_G": [ + "PRDW12SDGZ_V_G", + "zIUFF", + "module", + 55 + ], + "PDB3A_V_G": [ + "PDB3A_V_G", + "xqWfY", + "module", + 7 + ], + "PVDD3A_V_G": [ + "PVDD3A_V_G", + "t6fPF", + "module", + 87 + ], + "PRDW16DGZ_V_G": [ + "PRDW16DGZ_V_G", + "Jztd6", + "module", + 57 + ], + "PRUW12SDGZ_V_G": [ + "PRUW12SDGZ_V_G", + "yt645", + "module", + 67 + ], + "PDXOEDG_V_G": [ + "PDXOEDG_V_G", + "EZF3t", + "module", + 43 + ], + "da4008_chip_top": [ + "da4008_chip_top", + "ircEj", + "module", + 141 + ], + "PDDW12SDGZ_H_G": [ + "PDDW12SDGZ_H_G", + "KpuhN", + "module", + 20 + ], + "PDDW04SDGZ_H_G": [ + "PDDW04SDGZ_H_G", + "CQ4ek", + "module", + 12 + ], + "PCLAMPC_H_G": [ + "PCLAMPC_H_G", + "UyGax", + "module", + 4 + ], + "PRDW16SDGZ_V_G": [ + "PRDW16SDGZ_V_G", + "YRh5I", + "module", + 59 ], "PVSS3DGZ_V_G": [ "PVSS3DGZ_V_G", @@ -785,29 +191,239 @@ "module", 111 ], - "DEM_PhaseSync_4008": [ - "DEM_PhaseSync_4008", - "sIRhK", + "PVDD3AC_H_G": [ + "PVDD3AC_H_G", + "U0PST", "module", - 138 + 88 ], - "dacif_0000": [ - "dacif_0000", - "yeRHW", + "PCLAMPC_V_G": [ + "PCLAMPC_V_G", + "EyyeT", "module", - 116 + 5 ], - "dac_regfile": [ - "dac_regfile", - "LR0zI", + "PRDW08SDGZ_V_G": [ + "PRDW08SDGZ_V_G", + "JznNw", "module", - 118 + 51 ], - "ulink_rx": [ - "ulink_rx", - "dteMU", + "PDDW12DGZ_V_G": [ + "PDDW12DGZ_V_G", + "eR5Zz", "module", - 119 + 19 + ], + "PDDW08DGZ_H_G": [ + "PDDW08DGZ_H_G", + "C0gYT", + "module", + 14 + ], + "PVSS2DGZ_V_G": [ + "PVSS2DGZ_V_G", + "S5Dr6", + "module", + 105 + ], + "PDB3A_H_G": [ + "PDB3A_H_G", + "dfLHW", + "module", + 6 + ], + "rst_gen_unit": [ + "rst_gen_unit", + "anuMN", + "module", + 124 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", + "bghMB", + "module", + 113 + ], + "PDDW16SDGZ_H_G": [ + "PDDW16SDGZ_H_G", + "HiTWu", + "module", + 24 + ], + "PDUW16SDGZ_H_G": [ + "PDUW16SDGZ_H_G", + "iWZrk", + "module", + 40 + ], + "PDUW04SDGZ_V_G": [ + "PDUW04SDGZ_V_G", + "mJZpP", + "module", + 29 + ], + "PVSS3A_H_G": [ + "PVSS3A_H_G", + "jsR1C", + "module", + 106 + ], + "PDB3AC_H_G": [ + "PDB3AC_H_G", + "LsJ1x", + "module", + 8 + ], + "PDUW04DGZ_V_G": [ + "PDUW04DGZ_V_G", + "QGhk6", + "module", + 27 + ], + "PVDD3AC_V_G": [ + "PVDD3AC_V_G", + "rZC3e", + "module", + 89 + ], + "PVSS2DGZ_H_G": [ + "PVSS2DGZ_H_G", + "ke5cH", + "module", + 104 + ], + "PDDW04DGZ_V_G": [ + "PDDW04DGZ_V_G", + "sZaSM", + "module", + 11 + ], + "sram_if_0001": [ + "sram_if_0001", + "z4wk8", + "module", + 132 + ], + "PDDW04DGZ_H_G": [ + "PDDW04DGZ_H_G", + "Z62Gy", + "module", + 10 + ], + "PVDD1AC_V_G": [ + "PVDD1AC_V_G", + "qn6Yx", + "module", + 75 + ], + "PVSS2ANA_V_G": [ + "PVSS2ANA_V_G", + "Md441", + "module", + 103 + ], + "PDDW04SDGZ_V_G": [ + "PDDW04SDGZ_V_G", + "J6fGD", + "module", + 13 + ], + "PDDW16DGZ_H_G": [ + "PDDW16DGZ_H_G", + "GzkJA", + "module", + 22 + ], + "PVSS3AC_V_G": [ + "PVSS3AC_V_G", + "i0k2A", + "module", + 109 + ], + "PDDW08SDGZ_H_G": [ + "PDDW08SDGZ_H_G", + "QjV6F", + "module", + 16 + ], + "ulink_descrambler_32": [ + "ulink_descrambler_32", + "yuek5", + "module", + 120 + ], + "PVSS1AC_V_G": [ + "PVSS1AC_V_G", + "I7RzE", + "module", + 93 + ], + "PDDW08SDGZ_V_G": [ + "PDDW08SDGZ_V_G", + "N1ndr", + "module", + 17 + ], + "PRDW08SDGZ_H_G": [ + "PRDW08SDGZ_H_G", + "S90qD", + "module", + 50 + ], + "PDDW12DGZ_H_G": [ + "PDDW12DGZ_H_G", + "atFKr", + "module", + 18 + ], + "PDDW12SDGZ_V_G": [ + "PDDW12SDGZ_V_G", + "Pzaun", + "module", + 21 + ], + "PVDD1ANA_V_G": [ + "PVDD1ANA_V_G", + "BL1m7", + "module", + 77 + ], + "PVDD3A_H_G": [ + "PVDD3A_H_G", + "DTJPF", + "module", + 86 + ], + "PDDW16DGZ_V_G": [ + "PDDW16DGZ_V_G", + "StNiL", + "module", + 23 + ], + "PDUW04DGZ_H_G": [ + "PDUW04DGZ_H_G", + "YTwQz", + "module", + 26 + ], + "PVDD2DGZ_H_G": [ + "PVDD2DGZ_H_G", + "nULrd", + "module", + 82 + ], + "PDUW08DGZ_H_G": [ + "PDUW08DGZ_H_G", + "KkPJH", + "module", + 30 + ], + "PDUW08SDGZ_H_G": [ + "PDUW08SDGZ_H_G", + "gxqJp", + "module", + 32 ], "ulink_descrambler_128": [ "ulink_descrambler_128", @@ -821,41 +437,23 @@ "module", 130 ], - "sram_if_0000": [ - "sram_if_0000", - "nJgqZ", + "PRCUTA_G": [ + "PRCUTA_G", + "uuDJt", "module", - 131 + 47 ], - "sram_if_0001": [ - "sram_if_0001", - "z4wk8", + "PVDD1ANA_H_G": [ + "PVDD1ANA_H_G", + "fEWTj", "module", - 132 + 76 ], - "sram_if_0002": [ - "sram_if_0002", - "bEAZ8", + "PDUW08SDGZ_V_G": [ + "PDUW08SDGZ_V_G", + "UxPrL", "module", - 133 - ], - "sram_dmux_w_0000": [ - "sram_dmux_w_0000", - "dc6nH", - "module", - 134 - ], - "clk_regfile": [ - "clk_regfile", - "jAdLC", - "module", - 136 - ], - "DA4008_DEM_Parallel_PRBS_1CH": [ - "DA4008_DEM_Parallel_PRBS_1CH", - "cQW1k", - "module", - 139 + 33 ], "DA4008_DEM_Parallel_PRBS_64CH": [ "DA4008_DEM_Parallel_PRBS_64CH", @@ -863,11 +461,197 @@ "module", 140 ], - "spi_slave": [ - "spi_slave", - "eAsJz", + "PDUW12DGZ_H_G": [ + "PDUW12DGZ_H_G", + "HYpLe", "module", - 143 + 34 + ], + "PVSS1AC_H_G": [ + "PVSS1AC_H_G", + "EZJLH", + "module", + 92 + ], + "PDUW12DGZ_V_G": [ + "PDUW12DGZ_V_G", + "NkwYe", + "module", + 35 + ], + "PRUW16DGZ_H_G": [ + "PRUW16DGZ_H_G", + "AVYgt", + "module", + 68 + ], + "PDUW16SDGZ_V_G": [ + "PDUW16SDGZ_V_G", + "qePm9", + "module", + 41 + ], + "PDXOEDG_H_G": [ + "PDXOEDG_H_G", + "IYQDs", + "module", + 42 + ], + "PENDCAP_G": [ + "PENDCAP_G", + "bhWYh", + "module", + 44 + ], + "PRUW08DGZ_V_G": [ + "PRUW08DGZ_V_G", + "EtT2L", + "module", + 61 + ], + "PVDD2ANA_H_G": [ + "PVDD2ANA_H_G", + "mZVHG", + "module", + 80 + ], + "PRCUT_G": [ + "PRCUT_G", + "uQmb5", + "module", + 46 + ], + "DW_pulse_sync_0000": [ + "DW_pulse_sync_0000", + "Ss3zK", + "module", + 150 + ], + "PVDD1DGZ_H_G": [ + "PVDD1DGZ_H_G", + "Eie6s", + "module", + 78 + ], + "PRDW08DGZ_H_G": [ + "PRDW08DGZ_H_G", + "swWa5", + "module", + 48 + ], + "PVSS1A_H_G": [ + "PVSS1A_H_G", + "aYKwj", + "module", + 90 + ], + "PVSS1DGZ_V_G": [ + "PVSS1DGZ_V_G", + "jHcbf", + "module", + 97 + ], + "PRDW08DGZ_V_G": [ + "PRDW08DGZ_V_G", + "ZZxj5", + "module", + 49 + ], + "PRDW12DGZ_H_G": [ + "PRDW12DGZ_H_G", + "VaZm2", + "module", + 52 + ], + "PRDW12DGZ_V_G": [ + "PRDW12DGZ_V_G", + "ZKk4u", + "module", + 53 + ], + "TB": [ + "TB", + "sH4Fc", + "module", + 152 + ], + "PVDD2POC_H_G": [ + "PVDD2POC_H_G", + "avdwk", + "module", + 84 + ], + "PRDW12SDGZ_H_G": [ + "PRDW12SDGZ_H_G", + "fTzb4", + "module", + 54 + ], + "PRDW16DGZ_H_G": [ + "PRDW16DGZ_H_G", + "EEqKt", + "module", + 56 + ], + "PRDW16SDGZ_H_G": [ + "PRDW16SDGZ_H_G", + "V63WF", + "module", + 58 + ], + "PRUW12DGZ_H_G": [ + "PRUW12DGZ_H_G", + "hpMjC", + "module", + 64 + ], + "PRUW08DGZ_H_G": [ + "PRUW08DGZ_H_G", + "fLemy", + "module", + 60 + ], + "PRUW08SDGZ_H_G": [ + "PRUW08SDGZ_H_G", + "gwpgC", + "module", + 62 + ], + "dacif_0000": [ + "dacif_0000", + "yeRHW", + "module", + 116 + ], + "PRUW08SDGZ_V_G": [ + "PRUW08SDGZ_V_G", + "VJ8Wg", + "module", + 63 + ], + "PRUW12DGZ_V_G": [ + "PRUW12DGZ_V_G", + "pucZW", + "module", + 65 + ], + "PRUW12SDGZ_H_G": [ + "PRUW12SDGZ_H_G", + "EkH6u", + "module", + 66 + ], + "PRUW16DGZ_V_G": [ + "PRUW16DGZ_V_G", + "ErxQ3", + "module", + 69 + ], + "PRUW16SDGZ_H_G": [ + "PRUW16SDGZ_H_G", + "riJVY", + "module", + 70 ], "spi_if": [ "spi_if", @@ -875,6 +659,240 @@ "module", 145 ], + "PVDD1A_H_G": [ + "PVDD1A_H_G", + "zNPu5", + "module", + 72 + ], + "PVDD1A_V_G": [ + "PVDD1A_V_G", + "CNBi6", + "module", + 73 + ], + "crc32": [ + "crc32", + "T59nH", + "module", + 122 + ], + "sirv_gnrl_ltch": [ + "sirv_gnrl_ltch", + "UTi0b", + "module", + 128 + ], + "PVDD1AC_H_G": [ + "PVDD1AC_H_G", + "W9VnM", + "module", + 74 + ], + "PVDD1DGZ_V_G": [ + "PVDD1DGZ_V_G", + "sPggV", + "module", + 79 + ], + "PVDD2ANA_V_G": [ + "PVDD2ANA_V_G", + "J6VbG", + "module", + 81 + ], + "PVSS3A_V_G": [ + "PVSS3A_V_G", + "VSdee", + "module", + 107 + ], + "PVDD2DGZ_V_G": [ + "PVDD2DGZ_V_G", + "LSxxn", + "module", + 83 + ], + "PVSS1A_V_G": [ + "PVSS1A_V_G", + "ZmPik", + "module", + 91 + ], + "reset_tb": [ + "reset_tb", + "Q3Wk7", + "module", + 148 + ], + "PVSS1ANA_H_G": [ + "PVSS1ANA_H_G", + "HtwuV", + "module", + 94 + ], + "PVSS1DGZ_H_G": [ + "PVSS1DGZ_H_G", + "Zp1LH", + "module", + 96 + ], + "PVSS2A_H_G": [ + "PVSS2A_H_G", + "usz4x", + "module", + 98 + ], + "PVSS2AC_H_G": [ + "PVSS2AC_H_G", + "TqmdJ", + "module", + 100 + ], + "systemregfile": [ + "systemregfile", + "qcK8J", + "module", + 115 + ], + "DW_sync_0000": [ + "DW_sync_0000", + "zVfcK", + "module", + 149 + ], + "PVSS2AC_V_G": [ + "PVSS2AC_V_G", + "YBQ1m", + "module", + 101 + ], + "PVSS2ANA_H_G": [ + "PVSS2ANA_H_G", + "g8kcb", + "module", + 102 + ], + "PVSS3AC_H_G": [ + "PVSS3AC_H_G", + "B0f3F", + "module", + 108 + ], + "PVSS3DGZ_H_G": [ + "PVSS3DGZ_H_G", + "rq1J0", + "module", + 110 + ], + "sirv_gnrl_xchecker": [ + "sirv_gnrl_xchecker", + "CjC7H", + "module", + 125 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a": [ + "tsdn28hpcpuhdb4096x128m4mw_170a", + "UJ4u7", + "module", + 112 + ], + "syn_fwft_fifo": [ + "syn_fwft_fifo", + "gzftm", + "module", + 117 + ], + "ulink_rx": [ + "ulink_rx", + "dteMU", + "module", + 119 + ], + "ulink_frame_receiver_0000": [ + "ulink_frame_receiver_0000", + "P3BwM", + "module", + 123 + ], + "pulse_generator": [ + "pulse_generator", + "aJYLF", + "module", + 126 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 127 + ], + "ramp_gen_0000": [ + "ramp_gen_0000", + "AyqFm", + "module", + 129 + ], + "sram_if_0000": [ + "sram_if_0000", + "nJgqZ", + "module", + 131 + ], + "sram_dmux_w_0000": [ + "sram_dmux_w_0000", + "dc6nH", + "module", + 134 + ], + "dpram": [ + "dpram", + "bQxt6", + "module", + 135 + ], + "clk_regfile": [ + "clk_regfile", + "jAdLC", + "module", + 136 + ], + "awg_top": [ + "awg_top", + "J5zQK", + "module", + 137 + ], + "DEM_PhaseSync_4008": [ + "DEM_PhaseSync_4008", + "sIRhK", + "module", + 138 + ], + "DA4008_DEM_Parallel_PRBS_1CH": [ + "DA4008_DEM_Parallel_PRBS_1CH", + "cQW1k", + "module", + 139 + ], + "spi_bus_decoder_0000": [ + "spi_bus_decoder_0000", + "qLaCg", + "module", + 142 + ], + "spi_slave": [ + "spi_slave", + "eAsJz", + "module", + 143 + ], + "spi_sys_0000": [ + "spi_sys_0000", + "QT8j3", + "module", + 144 + ], "clk_gen": [ "clk_gen", "MEIvW", @@ -887,30 +905,12 @@ "module", 147 ], - "DW_sync_0000": [ - "DW_sync_0000", - "zVfcK", - "module", - 149 - ], - "DW_pulse_sync_0000": [ - "DW_pulse_sync_0000", - "Ss3zK", - "module", - 150 - ], "lvds_if": [ "lvds_if", "nS0i0", "module", 151 ], - "TB": [ - "TB", - "sH4Fc", - "module", - 152 - ], "...MASTER...": [ "SIM", "amcQw", diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/constraint.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/constraint.sdb index 82e87e8..85e2664 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/constraint.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/constraint.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/AllModulesSkeletons.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/AllModulesSkeletons.sdb index 645927b..07bd0fe 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/AllModulesSkeletons.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/AllModulesSkeletons.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/HsimSigOptDb.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/HsimSigOptDb.sdb index a582302..405f474 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/HsimSigOptDb.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/HsimSigOptDb.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/dve_debug.db.gz b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/dve_debug.db.gz index a58895a..c4df61c 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/dve_debug.db.gz and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/dve_debug.db.gz differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/.create_fsearch_db b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/.create_fsearch_db index 0efe198..72dfca3 100755 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/.create_fsearch_db +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/.create_fsearch_db @@ -5,5 +5,5 @@ PYTHONPATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export PYTHONPATH LD_LIBRARY_PATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib:/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export LD_LIBRARY_PATH -/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_X4vtNx.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_E1cKA4.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" \mv "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db" diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz new file mode 100644 index 0000000..fbbb0ed Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz index f24a0fd..125a143 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/vir.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/vir.sdb index 9b4dea7..a29ccd6 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/vir.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/debug_dump/vir.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/elabmoddb.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/elabmoddb.sdb index 4d03f67..1bf90b0 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/elabmoddb.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/elabmoddb.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_callgraph.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_callgraph.sdb index a00346b..29ba859 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_callgraph.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_callgraph.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_level.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_level.sdb index 4cd2f62..d9372b5 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_level.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_level.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_rtime_level.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_rtime_level.sdb index 8153356..93f8432 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_rtime_level.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/hslevel_rtime_level.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64094.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64094.sdb new file mode 100644 index 0000000..9c5b3e8 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64094.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64123.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64123.sdb new file mode 100644 index 0000000..b73abc8 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/indcall_64123.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/pcc.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/pcc.sdb index d7c1589..49aadd2 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/pcc.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/pcc.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/prof.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/prof.sdb index 76179fc..d6881ad 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/prof.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/prof.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/rmapats.dat b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/rmapats.dat index cc1f304..54fcebf 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/rmapats.dat and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/rmapats.dat differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/tt.sdb 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file mode 100644 index 0000000..e1e2683 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64122.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64123.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64123.sdb new file mode 100644 index 0000000..69ae935 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64123.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64124.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64124.sdb new file mode 100644 index 0000000..e8f7aa2 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/ttIncr_64124.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_hsim_uds.db b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_hsim_uds.db index 12a2348..3544e39 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_hsim_uds.db +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_hsim_uds.db @@ -3,3 +3,8 @@ vcselab_misc_mnmn.db 2715 vcselab_misc_hsim_name.db 18117 vcselab_master_hsim_virtintf_info.dat 160 vcselab_misc_hsim_merge.db 1349204 +vcselab_misc_midd.db 57445 +vcselab_misc_mnmn.db 2715 +vcselab_misc_hsim_name.db 18117 +vcselab_master_hsim_virtintf_info.dat 160 +vcselab_misc_hsim_merge.db 1349204 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_midd.db b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_midd.db index 3b682e9..2c06e1c 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_midd.db and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_midd.db differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_tCEYNb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_tCEYNb new file mode 100644 index 0000000..f71343b Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/simv.daidir/vcselab_misc_tCEYNb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus.log b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus.log index dbf7adf..488ef27 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus.log @@ -1,2 +1,2 @@ File Name Time -./verdplus_000.fsdb 0 to 198,910,080 +./verdplus_000.fsdb 0 to 228,913,152 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus_000.fsdb b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus_000.fsdb index 8d52e1d..b11782c 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus_000.fsdb and b/DA4008_V1.2/sim/chip_top/work_RTL/flattop/verdplus_000.fsdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/cm.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/cm.log index 1afd018..7c1df55 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/cm.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/cm.log @@ -3,7 +3,7 @@ : // Generated by: VCS Coverage Metrics O-2018.09-SP2_Full64 : // User: shbyang -: // Date: Fri Mar 13 16:24:06 2026 +: // Date: Sat Mar 14 17:19:37 2026 : Disabling fsm sequence coverage for module \$unit::../../lib/tphn28hpcpgv18.v::../../lib/tsdn28hpcpuhdb4096x128m4mw_170a_ffg0p99v0c.v...@348857874 ... : Disabling fsm sequence coverage for module PCLAMP_G ... diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc new file mode 100644 index 0000000..0440fde --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc @@ -0,0 +1,85 @@ +Magic 271485 +Revision Verdi_O-2018.09-SP2 + +; Window Layout +viewPort 0 27 1920 392 256 65 + +; File list: +; openDirFile [-d delimiter] [-s time_offset] [-rf auto_bus_rule_file] path_name file_name +openDirFile -d / "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb" + +; file time scale: +; fileTimeScale ### s|ms|us|ns|ps + +; signal spacing: +signalSpacing 5 + +; windowTimeUnit is used for zoom, cursor & marker +; waveform viewport range +zoom 0.000000 13227140.194787 +cursor 1165056.000000 +marker 6998784.000000 + +; user define markers +; userMarker time_pos marker_name color linestyle +; visible top row signal index +top 13 +; marker line index +markerPos 26 + +; event list +; addEvent event_name event_expression +; curEvent event_name + + + +COMPLEX_EVENT_BEGIN + + +COMPLEX_EVENT_END + + + +; toolbar current search type +; curSTATUS search_type +curSTATUS ByChange + + +addGroup "SPI" -e FALSE +activeDirFile "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb" +addSignal -h 15 /TB/U_da4008_chip_top/PI_sclk +addSignal -h 15 -holdScope PI_csn +addSignal -h 15 -holdScope PI_mosi +addSignal -h 15 -holdScope PO_miso +addGroup "SYS" -e FALSE +addSignal -h 15 /TB/U_da4008_chip_top/clk +addSignal -h 15 -holdScope PI_async_rstn +addSignal -h 15 -holdScope PI_sync_in +addSignal -h 15 -holdScope PO_sync_out +addSignal -h 15 -holdScope PO_irq +addGroup "LVDS" +addSignal -h 15 /TB/U_da4008_chip_top/lvds_clk[0:0] +addSignal -h 15 -holdScope lvds_data[3:0] +addSignal -h 15 -holdScope lvds_valid[0:0] +addGroup "DAC" -e FALSE +addSignal -w analog -ds pwc -h 98 /TB/cs_wave[7:0] +addSignal -h 15 /TB/U_da4008_chip_top/MSB_OUT[63:0] +addSignal -h 15 -holdScope LSB_OUT[63:0] +addSignal -h 15 -holdScope MSB_DUM[63:0] +addSignal -h 15 -holdScope DEM_VLD +addGroup "A_sram" +addSignal -h 15 /TB/U_da4008_chip_top/digital_top/wave_awrdata[511:0] +addSignal -h 15 -holdScope wave_awren[0:0] +addSignal -h 15 -holdScope wave_arwaddr[12:0] +addSignal -h 15 -holdScope wave_awrmask[63:0] +addGroup "B_sram" +addSignal -h 15 /TB/U_da4008_chip_top/digital_top/slv[2]/din[31:0] +addSignal -h 15 -holdScope wren +addSignal -h 15 -holdScope addr[18:0] +addSignal -h 15 -holdScope rden +addSignal -h 15 -holdScope dout[31:0] +addGroup "G7" + +; getSignalForm Scope Hierarchy Status +; active file of getSignalForm + diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.conf b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.conf index 1ff985d..071fb06 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.conf +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.conf @@ -22,8 +22,8 @@ Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\Layout="@ByteAr Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\isNestedWindow=0 Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\isVisible=true Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\size=@Size(1920 977) -Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_x=-10 -Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_y=20 +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_x=-1 +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_y=27 Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_width=1920 Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\geometry_height=977 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qDockerWindow_restoreNewChildState=true @@ -45,14 +45,14 @@ Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGro Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\widgetDock_%3CDecl._Tree%3E\qBaseWindowBeFix=0 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\widgetDock_%3CDecl._Tree%3E\dockIsFloating=false Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\ProductVersion=201809 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Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\isNestedWindow=0 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\isVisible=true -Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\size=@Size(1920 977) -Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_x=-1 -Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_y=27 -Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_width=1920 -Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_height=977 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\size=@Size(1440 723) +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_x=233 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_y=197 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_width=1440 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\geometry_height=723 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_OneSearch\isNestedWindow=1 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_OneSearch\isVisible=true Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_OneSearch\qBaseWindowBeMax=0 @@ -95,12 +95,12 @@ Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\ Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\windowDock_OneSearch_1\qBaseWindowBeFix=0 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\windowDock_OneSearch_1\dockIsFloating=false Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\ProductVersion=201809 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Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\isNestedWindow=0 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\isVisible=true Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\size=@Size(1920 977) -Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_x=-1 -Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_y=27 +Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_x=-10 +Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_y=20 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_width=1920 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\geometry_height=977 Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_2\isNestedWindow=1 @@ -117,6 +117,11 @@ Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\ Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\windowDock_nWave_1\qBaseWindowBeMax=0 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\windowDock_nWave_1\qBaseWindowBeFix=0 Verdi_1\qBaseWindowRestoreStateGroup\VERDI_LAST_RUN_LAYOUT\qBaseDockWidgetGroup\windowDock_nWave_1\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_3\isNestedWindow=1 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_3\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_3\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_3\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\backup_layout_to_restore\qBaseDockWidgetGroup\windowDock_nWave_3\dockIsFloating=false Verdi_1\qBaseWindowNextStateGroup\0\qDockerWindow_restoreNewChildState=true Verdi_1\qBaseWindowNextStateGroup\0\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\isVisible=true Verdi_1\qBaseWindowNextStateGroup\0\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\qBaseWindowBeMax=0 @@ -136,7 +141,7 @@ Verdi_1\qBaseWindowNextStateGroup\0\qBaseDockWidgetGroup\widgetDock_%3CDecl._Tre Verdi_1\qBaseWindowNextStateGroup\0\qBaseDockWidgetGroup\widgetDock_%3CDecl._Tree%3E\qBaseWindowBeFix=0 Verdi_1\qBaseWindowNextStateGroup\0\qBaseDockWidgetGroup\widgetDock_%3CDecl._Tree%3E\dockIsFloating=false Verdi_1\qBaseWindowNextStateGroup\0\ProductVersion=201809 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window\nWave_3\splitters\splitter_3\layout=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x2\xff\xff\xff\xff\xff\xff\xff\xff\x1\0\0\0\x1\0\0\0\0\x1) window\nWave_3\splitters\wholeSplitter\layout=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x3\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\xff\x1\0\0\0\x6\x1\0\0\0\x1) window\nWave_3\splitters\middleSplitter\layout=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x2\xff\xff\xff\xff\xff\xff\xff\xff\x1\0\0\0\x6\x1\0\0\0\x2) +window\nEditor_3\layout=@ByteArray(\0\0\0\xff\0\x3\x14Q\xfd\0\0\0\0\0\0\x3\xc5\0\0\0\xda\0\0\0\x4\0\0\0\x4\0\0\0\b\0\0\0\b\xfc\0\0\0\x1\0\0\0\x2\0\0\0\x3\0\0\0\x16\0\x66\0i\0l\0\x65\0T\0o\0o\0l\0\x42\0\x61\0r\x1\0\0\0\0\xff\xff\xff\xff\0\0\0\0\0\0\0\0\0\0\0\x16\0\x65\0\x64\0i\0t\0T\0o\0o\0l\0\x62\0\x61\0r\x1\0\0\0?\xff\xff\xff\xff\0\0\0\0\0\0\0\0\0\0\0\x1a\0s\0\x65\0\x61\0r\0\x63\0h\0T\0o\0o\0l\0\x62\0\x61\0r\x1\0\0\0\xd5\xff\xff\xff\xff\0\0\0\0\0\0\0\0) +window\nEditor_3\geometry=@ByteArray(\x1\xd9\xd0\xcb\0\x1\0\0\0\0\0\0\0\0\0\x1b\0\0\x3\xc4\0\0\x1&\0\0\0\0\0\0\0\x1b\0\0\x3\xc4\0\0\x1&\0\0\0\0\0\0) +window\nEditor_3\menubar=true [qBaseWindow_saveRestoreSession_group] 10=/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses [qDockerWindow_C] -Verdi_1\position.x=-1 -Verdi_1\position.y=27 +Verdi_1\position.x=-10 +Verdi_1\position.y=20 Verdi_1\width=1920 Verdi_1\height=977 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.rc b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.rc index e7e2b6b..f21cbb6 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.rc +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas.rc @@ -219,6 +219,8 @@ Selection-LineColor = ID_BLUE2 Selection-LineWidth = 1 [FSM_Dlg-Print] Orientation = Landscape +[FileBrowser] +nWaveRestoreRCDirHistory = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc\"" [Form] version = Verdi_O-2018.09-SP2 wave/sigCPL.fm = 100,100,243,333 @@ -372,8 +374,11 @@ savePropStat = FALSE savePropDtl = TRUE [QtDialog] qWaveSignalDialog = 559,313,800,479 -QwWarnMsgDlg = 659,446,600,250 EventReportDialog = 599,412,720,280 +SetWindowTimeUnitDialog = 742,509,433,86 +restoreSigDlg = 683,333,551,438 +saveSigDlg = 674,352,551,386 +QwWarnMsgDlg = 659,483,600,250 QwUserAskDlg = 798,487,324,134 [Relationship] hideRecursiceNode = FALSE @@ -561,7 +566,7 @@ pdmlMacro = ID_BLACK font = COURIER12 annotFont = Helvetica_M_R_10 [Text.1] -viewport = -1 27 1920 977 45 +viewport = -10 20 1920 977 45 [TextPrinter] Orientation = Landscape Indicator = FALSE @@ -651,35 +656,35 @@ DefaultLogTimeUnit = "1.000000ns" [VIA.oneSearch.preference.vgifColumnSettingRC.setting0] parRuleSets = "" [VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column0] -name = Severity -width = 60 -visualIndex = 1 -isHidden = TRUE -isUserChangeColumnVisible = FALSE -[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] -name = Time -width = 60 -visualIndex = 0 -isHidden = TRUE -isUserChangeColumnVisible = FALSE -[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] name = Message width = 2000 visualIndex = 4 isHidden = FALSE isUserChangeColumnVisible = FALSE -[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] name = Code width = 60 visualIndex = 2 isHidden = TRUE isUserChangeColumnVisible = FALSE -[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] name = Type width = 60 visualIndex = 3 isHidden = TRUE isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +name = Severity +width = 60 +visualIndex = 1 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +name = Time +width = 60 +visualIndex = 0 +isHidden = TRUE +isUserChangeColumnVisible = FALSE [Vi] ViFont = "Clean 14" ViBG = white @@ -699,7 +704,7 @@ scope_to_save_with_macro open_file_dir open_rc_file_dir getSignalForm = 559 276 800 479 245 381 505 183 -viewPort = 0 27 1920 309 152 65 +viewPort = 0 27 1920 392 256 65 signalSpacing = 5 digitalSignalHeight = 15 analogSignalHeight = 98 @@ -970,7 +975,8 @@ curveWindow_Drag&Drop_Mode = TRUE hspiceIncOpenMode = TRUE pcSelectMode = TRUE hierarchyDelimiter = / -RecentFile1 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb\"" +RecentFile1 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc\"" +RecentFile2 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb\"" open_file_time_range = FALSE value_window_aligment = Right signal_window_alignment = Auto @@ -1296,7 +1302,7 @@ AddImportArgument = FALSE LineBreakWithScope = TRUE StopAfterCompileOption = -s [wave.0] -viewPort = 0 27 1920 309 152 65 +viewPort = 0 27 1920 392 256 65 [wave.1] viewPort = 127 219 960 332 100 65 [wave.2] diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas_dump.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas_dump.log index 78fdfed..897c3ce 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas_dump.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/novas_dump.log @@ -278,9 +278,9 @@ DBUS_STARTER_BUS_TYPE=session W3264_NO_HOST_CHECK=1 SCL_HOME=/opt/synopsys/scl/2018.06 HOSTTYPE=x86_64-linux -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/300489a5_6011_46a1_a329_83b2a6d46428 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/461a392b_7deb_466e_bdba_86422bb75acb CDS_SPECTRERF_FBENABLE=1 -GNOME_TERMINAL_SERVICE=:1.1458 +GNOME_TERMINAL_SERVICE=:1.1513 HISTSIZE=1000 GROUP=cryo TXS_HOME=/opt/synopsys/txs/O-2018.06-SP1 @@ -315,8 +315,8 @@ argv[7]=-cm_name argv[8]=sine_1g argv[9]=+ENABLE_FSDB=1 316 profile - 100 - CPU/Mem usage: 0.080 sys, 0.350 user, 316.72M mem -317 Fri Mar 13 16:24:06 2026 + CPU/Mem usage: 0.070 sys, 0.340 user, 308.33M mem +317 Sat Mar 14 17:19:37 2026 318 pliAppInit 319 FSDB_GATE is set. 320 FSDB_RTL is set. @@ -348,61 +348,61 @@ argv[9]=+ENABLE_FSDB=1 346 *Verdi* : Begin traversing the scopes, layer (0). 347 *Verdi* : End of traversing. 348 pliAppHDL_DumpVarComplete traverse var: profile - - CPU/Mem usage: 0.090 sys, 0.420 user, 413.95M mem - incr: 0.010 sys, 0.070 user, 9.70M mem - accu: 0.010 sys, 0.070 user, 9.70M mem - accu incr: 0.010 sys, 0.070 user, 9.70M mem + CPU/Mem usage: 0.100 sys, 0.410 user, 405.39M mem + incr: 0.020 sys, 0.070 user, 9.52M mem + accu: 0.020 sys, 0.070 user, 9.52M mem + accu incr: 0.020 sys, 0.070 user, 9.52M mem Count usage: 12707 var, 14739 idcode, 7320 callback incr: 12707 var, 14739 idcode, 7320 callback accu: 12707 var, 14739 idcode, 7320 callback accu incr: 12707 var, 14739 idcode, 7320 callback -349 Fri Mar 13 16:24:07 2026 +349 Sat Mar 14 17:19:37 2026 350 pliAppHDL_DumpVarComplete: profile - - CPU/Mem usage: 0.100 sys, 0.420 user, 415.00M mem - incr: 0.010 sys, 0.000 user, 1.05M mem - accu: 0.020 sys, 0.070 user, 10.75M mem - accu incr: 0.010 sys, 0.000 user, 1.05M mem + CPU/Mem usage: 0.100 sys, 0.410 user, 406.58M mem + incr: 0.000 sys, 0.000 user, 1.19M mem + accu: 0.020 sys, 0.070 user, 10.72M mem + accu incr: 0.000 sys, 0.000 user, 1.19M mem Count usage: 12707 var, 14739 idcode, 7320 callback incr: 0 var, 0 idcode, 0 callback accu: 12707 var, 14739 idcode, 7320 callback accu incr: 0 var, 0 idcode, 0 callback -351 Fri Mar 13 16:24:07 2026 +351 Sat Mar 14 17:19:37 2026 352 sps_call_fsdbDumpMDA_vd_main at 0 : ../../sim/chip_top/TB.sv(59) 353 *Verdi* : Begin traversing the MDAs, layer (0). 354 *Verdi* : Enable +mda and +packedmda dumping. 355 *Verdi* : End of traversing the MDAs. 356 pliAppHDL_DumpVarComplete traverse var: profile - - CPU/Mem usage: 0.100 sys, 0.440 user, 418.83M mem - incr: 0.000 sys, 0.020 user, 3.83M mem - accu: 0.000 sys, 0.020 user, 3.83M mem - accu incr: 0.000 sys, 0.020 user, 3.83M mem + CPU/Mem usage: 0.100 sys, 0.430 user, 410.39M mem + incr: 0.000 sys, 0.020 user, 3.82M mem + accu: 0.000 sys, 0.020 user, 3.82M mem + accu incr: 0.000 sys, 0.020 user, 3.82M mem Count usage: 80429 var, 81757 idcode, 7372 callback incr: 67722 var, 67018 idcode, 52 callback accu: 67722 var, 67018 idcode, 52 callback accu incr: 67722 var, 67018 idcode, 52 callback -357 Fri Mar 13 16:24:07 2026 +357 Sat Mar 14 17:19:37 2026 358 pliAppHDL_DumpVarComplete: profile - - CPU/Mem usage: 0.100 sys, 0.460 user, 426.30M mem - incr: 0.000 sys, 0.020 user, 7.47M mem - accu: 0.000 sys, 0.040 user, 11.30M mem - accu incr: 0.000 sys, 0.020 user, 7.47M mem + CPU/Mem usage: 0.100 sys, 0.450 user, 417.86M mem + incr: 0.000 sys, 0.020 user, 7.46M mem + accu: 0.000 sys, 0.040 user, 11.28M mem + accu incr: 0.000 sys, 0.020 user, 7.46M mem Count usage: 80429 var, 81757 idcode, 7372 callback incr: 0 var, 0 idcode, 0 callback accu: 67722 var, 67018 idcode, 52 callback accu incr: 0 var, 0 idcode, 0 callback -359 Fri Mar 13 16:24:07 2026 -360 End of simulation at 479076480 -361 Fri Mar 13 16:24:18 2026 +359 Sat Mar 14 17:19:37 2026 +360 End of simulation at 509079552 +361 Sat Mar 14 17:19:47 2026 362 Begin FSDB profile info: -363 FSDB Writer : bc1(46410999) bcn(4266969) mtf/stf(0/0) -FSDB Writer elapsed time : flush(0.354180) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) +363 FSDB Writer : bc1(49305168) bcn(4576712) mtf/stf(0/0) +FSDB Writer elapsed time : flush(0.290561) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) FSDB Writer cpu time : MT Compression : 0 364 End FSDB profile info -365 Parallel profile - Flush:4 Expand:0 ProduceWait:0 ConsumerWait:585 BlockUsed:585 -366 ProduceTime:12.620525258 ConsumerTime:6.997658838 Buffer:64MB +365 Parallel profile - Flush:4 Expand:0 ProduceWait:0 ConsumerWait:622 BlockUsed:622 +366 ProduceTime:12.078049562 ConsumerTime:5.709506825 Buffer:64MB 367 SimExit 368 Sim process exit diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/sim.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/sim.log index 9e3b128..3e9ebfd 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/sim.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/sim.log @@ -1,7 +1,7 @@ Command: /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/./simv -l sim.log -cm line+cond+fsm+tgl+branch -cm_dir ../../coverage/try/ -cm_name sine_1g +ENABLE_FSDB=1 Chronologic VCS simulator copyright 1991-2018 Contains Synopsys proprietary information. -Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 13 16:24 2026 +Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 14 17:19 2026 Information: *** Instance TB.U_da4008_chip_top.digital_top.u_dw_stream_sync is the DW_stream_sync Clock Domain Crossing Module *** ../../../../case/config/try//sine_1g.txt ../../data_RTL/try/sine_1g.txt @@ -828,4 +828,4 @@ data[255]='h46586c80 VCS Coverage Metrics: during simulation line, cond, FSM, branch, tgl was monitored --------------------------------------------------------------------------- V C S S i m u l a t i o n R e p o r t -Time: 479076480 ps +Time: 509079552 ps diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv index 0036aa9..f87b060 100755 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/.vcs.timestamp b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/.vcs.timestamp index 0d4e6bb..3d08c7c 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/.vcs.timestamp +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/.vcs.timestamp @@ -133,8 +133,8 @@ HSPICE_HOME=/opt/synopsys/hspice/N-2017.12-SP2 HOSTTYPE=x86_64-linux HISTCONTROL=ignoredups GROUP=cryo -GNOME_TERMINAL_SERVICE=:1.1458 -GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/300489a5_6011_46a1_a329_83b2a6d46428 +GNOME_TERMINAL_SERVICE=:1.1513 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/461a392b_7deb_466e_bdba_86422bb75acb GNOME_SHELL_SESSION_MODE=classic GNOME_DESKTOP_SESSION_ID=this-is-deprecated GENUS_HOME=/opt/cadence/GENUS152 @@ -170,7 +170,7 @@ AMS_ENABLE_NOISE=YES 1773384753 ./../../rtl/define/../define/chip_undefine.v 1773384753 ./../../rtl/define/../define/chip_define.v 1773384753 ../../rtl/define/chip_undefine.v -1773384753 ../../sim/chip_top/TB.sv +1773479827 ../../sim/chip_top/TB.sv 1773384753 ../../model/DW_pulse_sync.v 1773384753 ../../model/DW_sync.v 1773384753 ../../model/DW_reset_sync.v @@ -226,5 +226,5 @@ AMS_ENABLE_NOISE=YES 1551421768 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so 1551421789 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so 1550752033 /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a -1773384887 simv.daidir +1773479969 simv.daidir -1 partitionlib diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64094_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64094_archive_1.so new file mode 100755 index 0000000..81768e1 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64094_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64123_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64123_archive_1.so new file mode 100755 index 0000000..a048a5e Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_64123_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_csrc0.so b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_csrc0.so new file mode 100755 index 0000000..1a959ff Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_csrc0.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_prev_archive_1.so b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_prev_archive_1.so new file mode 100755 index 0000000..f9266c0 Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/_prev_archive_1.so differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/binmap.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/binmap.sdb index 54897d5..4d6f43f 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/binmap.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/binmap.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/cgname.json b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/cgname.json index 39f08d3..eb59b57 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/cgname.json +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/cgname.json @@ -1,9 +1,9 @@ { - "PDDW04SDGZ_H_G": [ - "PDDW04SDGZ_H_G", - "CQ4ek", + "PDUW16DGZ_H_G": [ + "PDUW16DGZ_H_G", + "M7qR3", "module", - 12 + 38 ], "PDB3AC_V_G": [ "PDB3AC_V_G", @@ -11,125 +11,11 @@ "module", 9 ], - "PCLAMP_G": [ - "PCLAMP_G", - "DA1Pu", + "dac_regfile": [ + "dac_regfile", + "LR0zI", "module", - 3 - ], - "PDUW04DGZ_H_G": [ - "PDUW04DGZ_H_G", - "YTwQz", - "module", - 26 - ], - "PVSS1ANA_V_G": [ - "PVSS1ANA_V_G", - "gL5Pd", - "module", - 95 - ], - "PVDD3A_H_G": [ - "PVDD3A_H_G", - "DTJPF", - "module", - 86 - ], - "PDDW08DGZ_V_G": [ - "PDDW08DGZ_V_G", - "K0TuH", - "module", - 15 - ], - "PRCUTA_G": [ - "PRCUTA_G", - "uuDJt", - "module", - 47 - ], - "dpram": [ - "dpram", - "bQxt6", - "module", - 135 - ], - "PRDW08DGZ_V_G": [ - "PRDW08DGZ_V_G", - "ZZxj5", - "module", - 49 - ], - "_vcs_unit__348857874": [ - "_vcs_unit__348857874", - "FgDcH", - "module", - 1 - ], - "PDUW16SDGZ_H_G": [ - "PDUW16SDGZ_H_G", - "iWZrk", - "module", - 40 - ], - "PDXOEDG_V_G": [ - "PDXOEDG_V_G", - "EZF3t", - "module", - 43 - ], - "PENDCAPA_G": [ - "PENDCAPA_G", - "wpYca", - "module", - 45 - ], - "sirv_gnrl_dffl": [ - "sirv_gnrl_dffl", - "BM4bj", - "module", - 127 - ], - "spi_bus_decoder_0000": [ - "spi_bus_decoder_0000", - "qLaCg", - "module", - 142 - ], - "PDDW08DGZ_H_G": [ - "PDDW08DGZ_H_G", - "C0gYT", - "module", - 14 - ], - "std": [ - "std", - "reYIK", - "module", - 2 - ], - "PVDD2ANA_V_G": [ - "PVDD2ANA_V_G", - "J6VbG", - "module", - 81 - ], - "PDUW12SDGZ_V_G": [ - "PDUW12SDGZ_V_G", - "qCQFW", - "module", - 37 - ], - "PDB3A_H_G": [ - "PDB3A_H_G", - "dfLHW", - "module", - 6 - ], - "PVSS1DGZ_H_G": [ - "PVSS1DGZ_H_G", - "Zp1LH", - "module", - 96 + 118 ], "PRUW16SDGZ_V_G": [ "PRUW16SDGZ_V_G", @@ -137,593 +23,17 @@ "module", 71 ], - "PRDW16SDGZ_V_G": [ - "PRDW16SDGZ_V_G", - "YRh5I", - "module", - 59 - ], - "PDDW04SDGZ_V_G": [ - "PDDW04SDGZ_V_G", - "J6fGD", - "module", - 13 - ], - "PCLAMPC_H_G": [ - "PCLAMPC_H_G", - "UyGax", - "module", - 4 - ], - "PDDW04DGZ_V_G": [ - "PDDW04DGZ_V_G", - "sZaSM", - "module", - 11 - ], - "PCLAMPC_V_G": [ - "PCLAMPC_V_G", - "EyyeT", - "module", - 5 - ], - "PVDD1ANA_V_G": [ - "PVDD1ANA_V_G", - "BL1m7", - "module", - 77 - ], - "PDB3A_V_G": [ - "PDB3A_V_G", - "xqWfY", - "module", - 7 - ], - "PDDW12DGZ_H_G": [ - "PDDW12DGZ_H_G", - "atFKr", - "module", - 18 - ], - "PDB3AC_H_G": [ - "PDB3AC_H_G", - "LsJ1x", - "module", - 8 - ], - "PDDW04DGZ_H_G": [ - "PDDW04DGZ_H_G", - "Z62Gy", - "module", - 10 - ], - "PVSS1A_H_G": [ - "PVSS1A_H_G", - "aYKwj", - "module", - 90 - ], - "PRDW16SDGZ_H_G": [ - "PRDW16SDGZ_H_G", - "V63WF", - "module", - 58 - ], - "PDUW08DGZ_V_G": [ - "PDUW08DGZ_V_G", - "aEWK6", - "module", - 31 - ], - "PDUW12DGZ_V_G": [ - "PDUW12DGZ_V_G", - "NkwYe", - "module", - 35 - ], - "PDDW08SDGZ_H_G": [ - "PDDW08SDGZ_H_G", - "QjV6F", - "module", - 16 - ], - "PDUW16SDGZ_V_G": [ - "PDUW16SDGZ_V_G", - "qePm9", - "module", - 41 - ], - "PDDW12DGZ_V_G": [ - "PDDW12DGZ_V_G", - "eR5Zz", - "module", - 19 - ], - "rst_gen_unit": [ - "rst_gen_unit", - "anuMN", - "module", - 124 - ], - "PDUW16DGZ_H_G": [ - "PDUW16DGZ_H_G", - "M7qR3", - "module", - 38 - ], - "PDDW08SDGZ_V_G": [ - "PDDW08SDGZ_V_G", - "N1ndr", - "module", - 17 - ], - "ramp_gen_0000": [ - "ramp_gen_0000", - "AyqFm", - "module", - 129 - ], - "PDDW12SDGZ_H_G": [ - "PDDW12SDGZ_H_G", - "KpuhN", - "module", - 20 - ], - "ulink_descrambler_32": [ - "ulink_descrambler_32", - "yuek5", - "module", - 120 - ], - "PDDW12SDGZ_V_G": [ - "PDDW12SDGZ_V_G", - "Pzaun", - "module", - 21 - ], - "PDDW16DGZ_H_G": [ - "PDDW16DGZ_H_G", - "GzkJA", - "module", - 22 - ], - "systemregfile": [ - "systemregfile", - "qcK8J", - "module", - 115 - ], - "PRDW16DGZ_V_G": [ - "PRDW16DGZ_V_G", - "Jztd6", - "module", - 57 - ], - "PRUW08SDGZ_V_G": [ - "PRUW08SDGZ_V_G", - "VJ8Wg", - "module", - 63 - ], - "PRUW16SDGZ_H_G": [ - "PRUW16SDGZ_H_G", - "riJVY", - "module", - 70 - ], - "PVDD2ANA_H_G": [ - "PVDD2ANA_H_G", - "mZVHG", - "module", - 80 - ], - "PDDW16DGZ_V_G": [ - "PDDW16DGZ_V_G", - "StNiL", - "module", - 23 - ], - "PDDW16SDGZ_H_G": [ - "PDDW16SDGZ_H_G", - "HiTWu", - "module", - 24 - ], - "PDDW16SDGZ_V_G": [ - "PDDW16SDGZ_V_G", - "ebe78", - "module", - 25 - ], - "ulink_frame_receiver_0000": [ - "ulink_frame_receiver_0000", - "P3BwM", - "module", - 123 - ], - "PRDW08SDGZ_H_G": [ - "PRDW08SDGZ_H_G", - "S90qD", - "module", - 50 - ], - "PDUW04SDGZ_V_G": [ - "PDUW04SDGZ_V_G", - "mJZpP", - "module", - 29 - ], - "PVDD2DGZ_H_G": [ - "PVDD2DGZ_H_G", - "nULrd", - "module", - 82 - ], - "PDUW04DGZ_V_G": [ - "PDUW04DGZ_V_G", - "QGhk6", - "module", - 27 - ], - "syn_fwft_fifo": [ - "syn_fwft_fifo", - "gzftm", - "module", - 117 - ], - "reset_tb": [ - "reset_tb", - "Q3Wk7", - "module", - 148 - ], "PDUW04SDGZ_H_G": [ "PDUW04SDGZ_H_G", "wGYhm", "module", 28 ], - "PDUW08DGZ_H_G": [ - "PDUW08DGZ_H_G", - "KkPJH", + "_vcs_unit__348857874": [ + "_vcs_unit__348857874", + "FgDcH", "module", - 30 - ], - "PRUW12SDGZ_V_G": [ - "PRUW12SDGZ_V_G", - "yt645", - "module", - 67 - ], - "PRDW12SDGZ_V_G": [ - "PRDW12SDGZ_V_G", - "zIUFF", - "module", - 55 - ], - "PDUW08SDGZ_H_G": [ - "PDUW08SDGZ_H_G", - "gxqJp", - "module", - 32 - ], - "pulse_generator": [ - "pulse_generator", - "aJYLF", - "module", - 126 - ], - "PRCUT_G": [ - "PRCUT_G", - "uQmb5", - "module", - 46 - ], - "PDUW12DGZ_H_G": [ - "PDUW12DGZ_H_G", - "HYpLe", - "module", - 34 - ], - "PDUW08SDGZ_V_G": [ - "PDUW08SDGZ_V_G", - "UxPrL", - "module", - 33 - ], - "PDUW12SDGZ_H_G": [ - "PDUW12SDGZ_H_G", - "uKPxf", - "module", - 36 - ], - "spi_sys_0000": [ - "spi_sys_0000", - "QT8j3", - "module", - 144 - ], - "PVDD1DGZ_V_G": [ - "PVDD1DGZ_V_G", - "sPggV", - "module", - 79 - ], - "iopad": [ - "iopad", - "ga3jL", - "module", - 114 - ], - "PRDW08DGZ_H_G": [ - "PRDW08DGZ_H_G", - "swWa5", - "module", - 48 - ], - "PDUW16DGZ_V_G": [ - "PDUW16DGZ_V_G", - "FDqaf", - "module", - 39 - ], - "PVSS1AC_H_G": [ - "PVSS1AC_H_G", - "EZJLH", - "module", - 92 - ], - "PRUW12DGZ_H_G": [ - "PRUW12DGZ_H_G", - "hpMjC", - "module", - 64 - ], - "PDXOEDG_H_G": [ - "PDXOEDG_H_G", - "IYQDs", - "module", - 42 - ], - "crc32": [ - "crc32", - "T59nH", - "module", - 122 - ], - "PVDD2POC_H_G": [ - "PVDD2POC_H_G", - "avdwk", - "module", - 84 - ], - "PENDCAP_G": [ - "PENDCAP_G", - "bhWYh", - "module", - 44 - ], - "PRDW08SDGZ_V_G": [ - "PRDW08SDGZ_V_G", - "JznNw", - "module", - 51 - ], - "PVSS3A_H_G": [ - "PVSS3A_H_G", - "jsR1C", - "module", - 106 - ], - "sirv_gnrl_xchecker": [ - "sirv_gnrl_xchecker", - "CjC7H", - "module", - 125 - ], - "PRDW16DGZ_H_G": [ - "PRDW16DGZ_H_G", - "EEqKt", - "module", - 56 - ], - "PRDW12DGZ_H_G": [ - "PRDW12DGZ_H_G", - "VaZm2", - "module", - 52 - ], - "PRDW12DGZ_V_G": [ - "PRDW12DGZ_V_G", - "ZKk4u", - "module", - 53 - ], - "da4008_chip_top": [ - "da4008_chip_top", - "ircEj", - "module", - 141 - ], - "PRDW12SDGZ_H_G": [ - "PRDW12SDGZ_H_G", - "fTzb4", - "module", - 54 - ], - "PRUW08DGZ_H_G": [ - "PRUW08DGZ_H_G", - "fLemy", - "module", - 60 - ], - "PVSS2ANA_H_G": [ - "PVSS2ANA_H_G", - "g8kcb", - "module", - 102 - ], - "PRUW08DGZ_V_G": [ - "PRUW08DGZ_V_G", - "EtT2L", - "module", - 61 - ], - "PRUW08SDGZ_H_G": [ - "PRUW08SDGZ_H_G", - "gwpgC", - "module", - 62 - ], - "PRUW12DGZ_V_G": [ - "PRUW12DGZ_V_G", - "pucZW", - "module", - 65 - ], - "PVDD3A_V_G": [ - "PVDD3A_V_G", - "t6fPF", - "module", - 87 - ], - "PRUW12SDGZ_H_G": [ - "PRUW12SDGZ_H_G", - "EkH6u", - "module", - 66 - ], - "PRUW16DGZ_H_G": [ - "PRUW16DGZ_H_G", - "AVYgt", - "module", - 68 - ], - "PRUW16DGZ_V_G": [ - "PRUW16DGZ_V_G", - "ErxQ3", - "module", - 69 - ], - "PVDD1A_H_G": [ - "PVDD1A_H_G", - "zNPu5", - "module", - 72 - ], - "PVDD1A_V_G": [ - "PVDD1A_V_G", - "CNBi6", - "module", - 73 - ], - "sirv_gnrl_ltch": [ - "sirv_gnrl_ltch", - "UTi0b", - "module", - 128 - ], - "PVDD1AC_H_G": [ - "PVDD1AC_H_G", - "W9VnM", - "module", - 74 - ], - "PVDD1AC_V_G": [ - "PVDD1AC_V_G", - "qn6Yx", - "module", - 75 - ], - "PVDD1ANA_H_G": [ - "PVDD1ANA_H_G", - "fEWTj", - "module", - 76 - ], - "awg_top": [ - "awg_top", - "J5zQK", - "module", - 137 - ], - "PVDD1DGZ_H_G": [ - "PVDD1DGZ_H_G", - "Eie6s", - "module", - 78 - ], - "PVSS2AC_V_G": [ - "PVSS2AC_V_G", - "YBQ1m", - "module", - 101 - ], - "PVSS3AC_V_G": [ - "PVSS3AC_V_G", - "i0k2A", - "module", - 109 - ], - "PVDD3AC_V_G": [ - "PVDD3AC_V_G", - "rZC3e", - "module", - 89 - ], - "PVDD2DGZ_V_G": [ - "PVDD2DGZ_V_G", - "LSxxn", - "module", - 83 - ], - "PVDD2POC_V_G": [ - "PVDD2POC_V_G", - "urn8Q", - "module", - 85 - ], - "PVDD3AC_H_G": [ - "PVDD3AC_H_G", - "U0PST", - "module", - 88 - ], - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ - "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", - "bghMB", - "module", - 113 - ], - "PVSS1A_V_G": [ - "PVSS1A_V_G", - "ZmPik", - "module", - 91 - ], - "PVSS1AC_V_G": [ - "PVSS1AC_V_G", - "I7RzE", - "module", - 93 - ], - "PVSS1ANA_H_G": [ - "PVSS1ANA_H_G", - "HtwuV", - "module", - 94 - ], - "PVSS1DGZ_V_G": [ - "PVSS1DGZ_V_G", - "jHcbf", - "module", - 97 - ], - "PVSS2A_H_G": [ - "PVSS2A_H_G", - "usz4x", - "module", - 98 + 1 ], "PVSS2A_V_G": [ "PVSS2A_V_G", @@ -731,53 +41,149 @@ "module", 99 ], - "PVSS2AC_H_G": [ - "PVSS2AC_H_G", - "TqmdJ", + "PENDCAPA_G": [ + "PENDCAPA_G", + "wpYca", "module", - 100 + 45 ], - "PVSS2ANA_V_G": [ - "PVSS2ANA_V_G", - "Md441", + "PDDW08DGZ_V_G": [ + "PDDW08DGZ_V_G", + "K0TuH", "module", - 103 + 15 ], - "PVSS2DGZ_H_G": [ - "PVSS2DGZ_H_G", - "ke5cH", + "PDDW16SDGZ_V_G": [ + "PDDW16SDGZ_V_G", + "ebe78", "module", - 104 + 25 ], - "PVSS2DGZ_V_G": [ - "PVSS2DGZ_V_G", - "S5Dr6", + "PDUW12SDGZ_V_G": [ + "PDUW12SDGZ_V_G", + "qCQFW", "module", - 105 + 37 ], - "PVSS3A_V_G": [ - "PVSS3A_V_G", - "VSdee", + "PDUW12SDGZ_H_G": [ + "PDUW12SDGZ_H_G", + "uKPxf", "module", - 107 + 36 ], - "tsdn28hpcpuhdb4096x128m4mw_170a": [ - "tsdn28hpcpuhdb4096x128m4mw_170a", - "UJ4u7", + "std": [ + "std", + "reYIK", "module", - 112 + 2 ], - "PVSS3AC_H_G": [ - "PVSS3AC_H_G", - "B0f3F", + "sram_if_0002": [ + "sram_if_0002", + "bEAZ8", "module", - 108 + 133 ], - "PVSS3DGZ_H_G": [ - "PVSS3DGZ_H_G", - "rq1J0", + "PCLAMP_G": [ + "PCLAMP_G", + "DA1Pu", "module", - 110 + 3 + ], + "PVDD2POC_V_G": [ + "PVDD2POC_V_G", + "urn8Q", + "module", + 85 + ], + "PDUW16DGZ_V_G": [ + "PDUW16DGZ_V_G", + "FDqaf", + "module", + 39 + ], + "iopad": [ + "iopad", + "ga3jL", + "module", + 114 + ], + "PVSS1ANA_V_G": [ + "PVSS1ANA_V_G", + "gL5Pd", + "module", + 95 + ], + "PDUW08DGZ_V_G": [ + "PDUW08DGZ_V_G", + "aEWK6", + "module", + 31 + ], + "PRDW12SDGZ_V_G": [ + "PRDW12SDGZ_V_G", + "zIUFF", + "module", + 55 + ], + "PDB3A_V_G": [ + "PDB3A_V_G", + "xqWfY", + "module", + 7 + ], + "PVDD3A_V_G": [ + "PVDD3A_V_G", + "t6fPF", + "module", + 87 + ], + "PRDW16DGZ_V_G": [ + "PRDW16DGZ_V_G", + "Jztd6", + "module", + 57 + ], + "PRUW12SDGZ_V_G": [ + "PRUW12SDGZ_V_G", + "yt645", + "module", + 67 + ], + "PDXOEDG_V_G": [ + "PDXOEDG_V_G", + "EZF3t", + "module", + 43 + ], + "da4008_chip_top": [ + "da4008_chip_top", + "ircEj", + "module", + 141 + ], + "PDDW12SDGZ_H_G": [ + "PDDW12SDGZ_H_G", + "KpuhN", + "module", + 20 + ], + "PDDW04SDGZ_H_G": [ + "PDDW04SDGZ_H_G", + "CQ4ek", + "module", + 12 + ], + "PCLAMPC_H_G": [ + "PCLAMPC_H_G", + "UyGax", + "module", + 4 + ], + "PRDW16SDGZ_V_G": [ + "PRDW16SDGZ_V_G", + "YRh5I", + "module", + 59 ], "PVSS3DGZ_V_G": [ "PVSS3DGZ_V_G", @@ -785,29 +191,239 @@ "module", 111 ], - "DEM_PhaseSync_4008": [ - "DEM_PhaseSync_4008", - "sIRhK", + "PVDD3AC_H_G": [ + "PVDD3AC_H_G", + "U0PST", "module", - 138 + 88 ], - "dacif_0000": [ - "dacif_0000", - "yeRHW", + "PCLAMPC_V_G": [ + "PCLAMPC_V_G", + "EyyeT", "module", - 116 + 5 ], - "dac_regfile": [ - "dac_regfile", - "LR0zI", + "PRDW08SDGZ_V_G": [ + "PRDW08SDGZ_V_G", + "JznNw", "module", - 118 + 51 ], - "ulink_rx": [ - "ulink_rx", - "dteMU", + "PDDW12DGZ_V_G": [ + "PDDW12DGZ_V_G", + "eR5Zz", "module", - 119 + 19 + ], + "PDDW08DGZ_H_G": [ + "PDDW08DGZ_H_G", + "C0gYT", + "module", + 14 + ], + "PVSS2DGZ_V_G": [ + "PVSS2DGZ_V_G", + "S5Dr6", + "module", + 105 + ], + "PDB3A_H_G": [ + "PDB3A_H_G", + "dfLHW", + "module", + 6 + ], + "rst_gen_unit": [ + "rst_gen_unit", + "anuMN", + "module", + 124 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array": [ + "tsdn28hpcpuhdb4096x128m4mw_170a_Int_Array", + "bghMB", + "module", + 113 + ], + "PDDW16SDGZ_H_G": [ + "PDDW16SDGZ_H_G", + "HiTWu", + "module", + 24 + ], + "PDUW16SDGZ_H_G": [ + "PDUW16SDGZ_H_G", + "iWZrk", + "module", + 40 + ], + "PDUW04SDGZ_V_G": [ + "PDUW04SDGZ_V_G", + "mJZpP", + "module", + 29 + ], + "PVSS3A_H_G": [ + "PVSS3A_H_G", + "jsR1C", + "module", + 106 + ], + "PDB3AC_H_G": [ + "PDB3AC_H_G", + "LsJ1x", + "module", + 8 + ], + "PDUW04DGZ_V_G": [ + "PDUW04DGZ_V_G", + "QGhk6", + "module", + 27 + ], + "PVDD3AC_V_G": [ + "PVDD3AC_V_G", + "rZC3e", + "module", + 89 + ], + "PVSS2DGZ_H_G": [ + "PVSS2DGZ_H_G", + "ke5cH", + "module", + 104 + ], + "PDDW04DGZ_V_G": [ + "PDDW04DGZ_V_G", + "sZaSM", + "module", + 11 + ], + "sram_if_0001": [ + "sram_if_0001", + "z4wk8", + "module", + 132 + ], + "PDDW04DGZ_H_G": [ + "PDDW04DGZ_H_G", + "Z62Gy", + "module", + 10 + ], + "PVDD1AC_V_G": [ + "PVDD1AC_V_G", + "qn6Yx", + "module", + 75 + ], + "PVSS2ANA_V_G": [ + "PVSS2ANA_V_G", + "Md441", + "module", + 103 + ], + "PDDW04SDGZ_V_G": [ + "PDDW04SDGZ_V_G", + "J6fGD", + "module", + 13 + ], + "PDDW16DGZ_H_G": [ + "PDDW16DGZ_H_G", + "GzkJA", + "module", + 22 + ], + "PVSS3AC_V_G": [ + "PVSS3AC_V_G", + "i0k2A", + "module", + 109 + ], + "PDDW08SDGZ_H_G": [ + "PDDW08SDGZ_H_G", + "QjV6F", + "module", + 16 + ], + "ulink_descrambler_32": [ + "ulink_descrambler_32", + "yuek5", + "module", + 120 + ], + "PVSS1AC_V_G": [ + "PVSS1AC_V_G", + "I7RzE", + "module", + 93 + ], + "PDDW08SDGZ_V_G": [ + "PDDW08SDGZ_V_G", + "N1ndr", + "module", + 17 + ], + "PRDW08SDGZ_H_G": [ + "PRDW08SDGZ_H_G", + "S90qD", + "module", + 50 + ], + "PDDW12DGZ_H_G": [ + "PDDW12DGZ_H_G", + "atFKr", + "module", + 18 + ], + "PDDW12SDGZ_V_G": [ + "PDDW12SDGZ_V_G", + "Pzaun", + "module", + 21 + ], + "PVDD1ANA_V_G": [ + "PVDD1ANA_V_G", + "BL1m7", + "module", + 77 + ], + "PVDD3A_H_G": [ + "PVDD3A_H_G", + "DTJPF", + "module", + 86 + ], + "PDDW16DGZ_V_G": [ + "PDDW16DGZ_V_G", + "StNiL", + "module", + 23 + ], + "PDUW04DGZ_H_G": [ + "PDUW04DGZ_H_G", + "YTwQz", + "module", + 26 + ], + "PVDD2DGZ_H_G": [ + "PVDD2DGZ_H_G", + "nULrd", + "module", + 82 + ], + "PDUW08DGZ_H_G": [ + "PDUW08DGZ_H_G", + "KkPJH", + "module", + 30 + ], + "PDUW08SDGZ_H_G": [ + "PDUW08SDGZ_H_G", + "gxqJp", + "module", + 32 ], "ulink_descrambler_128": [ "ulink_descrambler_128", @@ -821,41 +437,23 @@ "module", 130 ], - "sram_if_0000": [ - "sram_if_0000", - "nJgqZ", + "PRCUTA_G": [ + "PRCUTA_G", + "uuDJt", "module", - 131 + 47 ], - "sram_if_0001": [ - "sram_if_0001", - "z4wk8", + "PVDD1ANA_H_G": [ + "PVDD1ANA_H_G", + "fEWTj", "module", - 132 + 76 ], - "sram_if_0002": [ - "sram_if_0002", - "bEAZ8", + "PDUW08SDGZ_V_G": [ + "PDUW08SDGZ_V_G", + "UxPrL", "module", - 133 - ], - "sram_dmux_w_0000": [ - "sram_dmux_w_0000", - "dc6nH", - "module", - 134 - ], - "clk_regfile": [ - "clk_regfile", - "jAdLC", - "module", - 136 - ], - "DA4008_DEM_Parallel_PRBS_1CH": [ - "DA4008_DEM_Parallel_PRBS_1CH", - "cQW1k", - "module", - 139 + 33 ], "DA4008_DEM_Parallel_PRBS_64CH": [ "DA4008_DEM_Parallel_PRBS_64CH", @@ -863,11 +461,197 @@ "module", 140 ], - "spi_slave": [ - "spi_slave", - "eAsJz", + "PDUW12DGZ_H_G": [ + "PDUW12DGZ_H_G", + "HYpLe", "module", - 143 + 34 + ], + "PVSS1AC_H_G": [ + "PVSS1AC_H_G", + "EZJLH", + "module", + 92 + ], + "PDUW12DGZ_V_G": [ + "PDUW12DGZ_V_G", + "NkwYe", + "module", + 35 + ], + "PRUW16DGZ_H_G": [ + "PRUW16DGZ_H_G", + "AVYgt", + "module", + 68 + ], + "PDUW16SDGZ_V_G": [ + "PDUW16SDGZ_V_G", + "qePm9", + "module", + 41 + ], + "PDXOEDG_H_G": [ + "PDXOEDG_H_G", + "IYQDs", + "module", + 42 + ], + "PENDCAP_G": [ + "PENDCAP_G", + "bhWYh", + "module", + 44 + ], + "PRUW08DGZ_V_G": [ + "PRUW08DGZ_V_G", + "EtT2L", + "module", + 61 + ], + "PVDD2ANA_H_G": [ + "PVDD2ANA_H_G", + "mZVHG", + "module", + 80 + ], + "PRCUT_G": [ + "PRCUT_G", + "uQmb5", + "module", + 46 + ], + "DW_pulse_sync_0000": [ + "DW_pulse_sync_0000", + "Ss3zK", + "module", + 150 + ], + "PVDD1DGZ_H_G": [ + "PVDD1DGZ_H_G", + "Eie6s", + "module", + 78 + ], + "PRDW08DGZ_H_G": [ + "PRDW08DGZ_H_G", + "swWa5", + "module", + 48 + ], + "PVSS1A_H_G": [ + "PVSS1A_H_G", + "aYKwj", + "module", + 90 + ], + "PVSS1DGZ_V_G": [ + "PVSS1DGZ_V_G", + "jHcbf", + "module", + 97 + ], + "PRDW08DGZ_V_G": [ + "PRDW08DGZ_V_G", + "ZZxj5", + "module", + 49 + ], + "PRDW12DGZ_H_G": [ + "PRDW12DGZ_H_G", + "VaZm2", + "module", + 52 + ], + "PRDW12DGZ_V_G": [ + "PRDW12DGZ_V_G", + "ZKk4u", + "module", + 53 + ], + "TB": [ + "TB", + "sH4Fc", + "module", + 152 + ], + "PVDD2POC_H_G": [ + "PVDD2POC_H_G", + "avdwk", + "module", + 84 + ], + "PRDW12SDGZ_H_G": [ + "PRDW12SDGZ_H_G", + "fTzb4", + "module", + 54 + ], + "PRDW16DGZ_H_G": [ + "PRDW16DGZ_H_G", + "EEqKt", + "module", + 56 + ], + "PRDW16SDGZ_H_G": [ + "PRDW16SDGZ_H_G", + "V63WF", + "module", + 58 + ], + "PRUW12DGZ_H_G": [ + "PRUW12DGZ_H_G", + "hpMjC", + "module", + 64 + ], + "PRUW08DGZ_H_G": [ + "PRUW08DGZ_H_G", + "fLemy", + "module", + 60 + ], + "PRUW08SDGZ_H_G": [ + "PRUW08SDGZ_H_G", + "gwpgC", + "module", + 62 + ], + "dacif_0000": [ + "dacif_0000", + "yeRHW", + "module", + 116 + ], + "PRUW08SDGZ_V_G": [ + "PRUW08SDGZ_V_G", + "VJ8Wg", + "module", + 63 + ], + "PRUW12DGZ_V_G": [ + "PRUW12DGZ_V_G", + "pucZW", + "module", + 65 + ], + "PRUW12SDGZ_H_G": [ + "PRUW12SDGZ_H_G", + "EkH6u", + "module", + 66 + ], + "PRUW16DGZ_V_G": [ + "PRUW16DGZ_V_G", + "ErxQ3", + "module", + 69 + ], + "PRUW16SDGZ_H_G": [ + "PRUW16SDGZ_H_G", + "riJVY", + "module", + 70 ], "spi_if": [ "spi_if", @@ -875,6 +659,240 @@ "module", 145 ], + "PVDD1A_H_G": [ + "PVDD1A_H_G", + "zNPu5", + "module", + 72 + ], + "PVDD1A_V_G": [ + "PVDD1A_V_G", + "CNBi6", + "module", + 73 + ], + "crc32": [ + "crc32", + "T59nH", + "module", + 122 + ], + "sirv_gnrl_ltch": [ + "sirv_gnrl_ltch", + "UTi0b", + "module", + 128 + ], + "PVDD1AC_H_G": [ + "PVDD1AC_H_G", + "W9VnM", + "module", + 74 + ], + "PVDD1DGZ_V_G": [ + "PVDD1DGZ_V_G", + "sPggV", + "module", + 79 + ], + "PVDD2ANA_V_G": [ + "PVDD2ANA_V_G", + "J6VbG", + "module", + 81 + ], + "PVSS3A_V_G": [ + "PVSS3A_V_G", + "VSdee", + "module", + 107 + ], + "PVDD2DGZ_V_G": [ + "PVDD2DGZ_V_G", + "LSxxn", + "module", + 83 + ], + "PVSS1A_V_G": [ + "PVSS1A_V_G", + "ZmPik", + "module", + 91 + ], + "reset_tb": [ + "reset_tb", + "Q3Wk7", + "module", + 148 + ], + "PVSS1ANA_H_G": [ + "PVSS1ANA_H_G", + "HtwuV", + "module", + 94 + ], + "PVSS1DGZ_H_G": [ + "PVSS1DGZ_H_G", + "Zp1LH", + "module", + 96 + ], + "PVSS2A_H_G": [ + "PVSS2A_H_G", + "usz4x", + "module", + 98 + ], + "PVSS2AC_H_G": [ + "PVSS2AC_H_G", + "TqmdJ", + "module", + 100 + ], + "systemregfile": [ + "systemregfile", + "qcK8J", + "module", + 115 + ], + "DW_sync_0000": [ + "DW_sync_0000", + "zVfcK", + "module", + 149 + ], + "PVSS2AC_V_G": [ + "PVSS2AC_V_G", + "YBQ1m", + "module", + 101 + ], + "PVSS2ANA_H_G": [ + "PVSS2ANA_H_G", + "g8kcb", + "module", + 102 + ], + "PVSS3AC_H_G": [ + "PVSS3AC_H_G", + "B0f3F", + "module", + 108 + ], + "PVSS3DGZ_H_G": [ + "PVSS3DGZ_H_G", + "rq1J0", + "module", + 110 + ], + "sirv_gnrl_xchecker": [ + "sirv_gnrl_xchecker", + "CjC7H", + "module", + 125 + ], + "tsdn28hpcpuhdb4096x128m4mw_170a": [ + "tsdn28hpcpuhdb4096x128m4mw_170a", + "UJ4u7", + "module", + 112 + ], + "syn_fwft_fifo": [ + "syn_fwft_fifo", + "gzftm", + "module", + 117 + ], + "ulink_rx": [ + "ulink_rx", + "dteMU", + "module", + 119 + ], + "ulink_frame_receiver_0000": [ + "ulink_frame_receiver_0000", + "P3BwM", + "module", + 123 + ], + "pulse_generator": [ + "pulse_generator", + "aJYLF", + "module", + 126 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 127 + ], + "ramp_gen_0000": [ + "ramp_gen_0000", + "AyqFm", + "module", + 129 + ], + "sram_if_0000": [ + "sram_if_0000", + "nJgqZ", + "module", + 131 + ], + "sram_dmux_w_0000": [ + "sram_dmux_w_0000", + "dc6nH", + "module", + 134 + ], + "dpram": [ + "dpram", + "bQxt6", + "module", + 135 + ], + "clk_regfile": [ + "clk_regfile", + "jAdLC", + "module", + 136 + ], + "awg_top": [ + "awg_top", + "J5zQK", + "module", + 137 + ], + "DEM_PhaseSync_4008": [ + "DEM_PhaseSync_4008", + "sIRhK", + "module", + 138 + ], + "DA4008_DEM_Parallel_PRBS_1CH": [ + "DA4008_DEM_Parallel_PRBS_1CH", + "cQW1k", + "module", + 139 + ], + "spi_bus_decoder_0000": [ + "spi_bus_decoder_0000", + "qLaCg", + "module", + 142 + ], + "spi_slave": [ + "spi_slave", + "eAsJz", + "module", + 143 + ], + "spi_sys_0000": [ + "spi_sys_0000", + "QT8j3", + "module", + 144 + ], "clk_gen": [ "clk_gen", "MEIvW", @@ -887,30 +905,12 @@ "module", 147 ], - "DW_sync_0000": [ - "DW_sync_0000", - "zVfcK", - "module", - 149 - ], - "DW_pulse_sync_0000": [ - "DW_pulse_sync_0000", - "Ss3zK", - "module", - 150 - ], "lvds_if": [ "lvds_if", "nS0i0", "module", 151 ], - "TB": [ - "TB", - "sH4Fc", - "module", - 152 - ], "...MASTER...": [ "SIM", "amcQw", diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/constraint.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/constraint.sdb index 82e87e8..85e2664 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/constraint.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/constraint.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/AllModulesSkeletons.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/AllModulesSkeletons.sdb index 645927b..07bd0fe 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/AllModulesSkeletons.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/AllModulesSkeletons.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/HsimSigOptDb.sdb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/HsimSigOptDb.sdb index a582302..405f474 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/HsimSigOptDb.sdb and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/HsimSigOptDb.sdb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/dve_debug.db.gz b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/dve_debug.db.gz index a58895a..c4df61c 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/dve_debug.db.gz and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/dve_debug.db.gz differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/.create_fsearch_db b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/.create_fsearch_db index 0efe198..72dfca3 100755 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/.create_fsearch_db +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/.create_fsearch_db @@ -5,5 +5,5 @@ PYTHONPATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export PYTHONPATH LD_LIBRARY_PATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib:/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 export LD_LIBRARY_PATH -/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_X4vtNx.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_E1cKA4.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" \mv "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/simv.daidir/debug_dump/fsearch/fsearch.db" diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz new file mode 100644 index 0000000..fbbb0ed Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/debug_dump/fsearch/idents_E1cKA4.xml.gz differ diff --git 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a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_hsim_uds.db +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_hsim_uds.db @@ -3,3 +3,8 @@ vcselab_misc_mnmn.db 2715 vcselab_misc_hsim_name.db 18117 vcselab_master_hsim_virtintf_info.dat 160 vcselab_misc_hsim_merge.db 1349204 +vcselab_misc_midd.db 57445 +vcselab_misc_mnmn.db 2715 +vcselab_misc_hsim_name.db 18117 +vcselab_master_hsim_virtintf_info.dat 160 +vcselab_misc_hsim_merge.db 1349204 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_midd.db b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_midd.db index 3b682e9..2c06e1c 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_midd.db and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_midd.db differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_tCEYNb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_tCEYNb new file mode 100644 index 0000000..f71343b Binary files /dev/null and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/simv.daidir/vcselab_misc_tCEYNb differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/compiler.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/compiler.log index c9b958d..609c1a4 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/compiler.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/compiler.log @@ -249,13 +249,13 @@ TB "../../../../sim/chip_top/TB.sv", 131: *Error* failed to find identifier lvds_bus.data -"../../../../sim/chip_top/TB.sv", 218: +"../../../../sim/chip_top/TB.sv", 224: *Error* failed to find identifier lvds_bus.valid -"../../../../sim/chip_top/TB.sv", 219: +"../../../../sim/chip_top/TB.sv", 225: *Error* failed to find identifier lvds_bus.clk -"../../../../sim/chip_top/TB.sv", 220: +"../../../../sim/chip_top/TB.sv", 226: *Error* view lvds_if is not defined for instance lvds_bus "../../../../sim/chip_top/TB.sv", 69: diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/da_debug.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/da_debug.log new file mode 100644 index 0000000..94d3d9c --- /dev/null +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/da_debug.log @@ -0,0 +1,5 @@ +##################################################################################################### +# da_debug.log : log primitive debug message of Data Agent (Verdi internal layer to access FSDB). # +# This is for R&D to analyze when there are issues happening when Verdi reading FSDB # +##################################################################################################### +[DA][EVDP][XML]: start update xml in interactive mode at init[DA][EVDP][XML]: start update xml file in interactive mode diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas.rc b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas.rc index e39103d..205efa9 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas.rc +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas.rc @@ -221,6 +221,7 @@ Selection-LineWidth = 1 Orientation = Landscape [Form] version = Verdi_O-2018.09-SP2 +wave/sigCPL.fm = 100,100,243,333 [General] autoSaveSession = FALSE TclAutoSource = @@ -370,6 +371,12 @@ saveWaveformStat = TRUE savePropStat = FALSE savePropDtl = TRUE [QtDialog] +qWaveSignalDialog = 559,313,800,479 +QwWarnMsgDlg = 659,446,600,250 +EventReportDialog = 599,412,720,280 +saveSigDlg = 683,359,551,386 +restoreSigDlg = 683,333,551,438 +SetWindowTimeUnitDialog = 742,509,433,86 QwUserAskDlg = 798,487,324,134 [Relationship] hideRecursiceNode = FALSE @@ -557,7 +564,7 @@ pdmlMacro = ID_BLACK font = COURIER12 annotFont = Helvetica_M_R_10 [Text.1] -viewport = -10 20 1920 977 45 +viewport = -1 27 1920 977 45 [TextPrinter] Orientation = Landscape Indicator = FALSE @@ -694,8 +701,8 @@ waveform_vertical_scroll_bar = TRUE scope_to_save_with_macro open_file_dir open_rc_file_dir -getSignalForm = 0 0 800 479 100 30 100 30 -viewPort = 0 27 1920 392 152 65 +getSignalForm = 559 276 800 479 245 381 505 183 +viewPort = 0 27 1920 280 152 65 signalSpacing = 5 digitalSignalHeight = 15 analogSignalHeight = 98 @@ -1292,7 +1299,7 @@ AddImportArgument = FALSE LineBreakWithScope = TRUE StopAfterCompileOption = -s [wave.0] -viewPort = 0 27 1920 392 152 65 +viewPort = 0 27 1920 280 152 65 [wave.1] viewPort = 127 219 960 332 100 65 [wave.2] diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses index e1765b4..7213f1d 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses @@ -19,15 +19,15 @@ Console = FALSE powerDumped = 0 [hb] postSimFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb -syncTime = 291747108 -viewport = 0 27 1920 977 0 0 189 1918 -activeNode = "TB" -activeScope = "TB" -activeFile = "../../../../sim/chip_top/TB.sv" +syncTime = 7001856 +viewport = 0 20 1920 977 0 0 75 1918 +activeNode = "TB.U_da4008_chip_top.digital_top.dut" +activeScope = "TB.U_da4008_chip_top.digital_top.dut" +activeFile = "../../../../rtl/lvds/ulink_rx.sv" interactiveMode = False viewType = Source simulatorMode = False -sourceBeginLine = 315 +sourceBeginLine = 71 baMode = False srcLineNum = True AutoWrap = True @@ -44,26 +44,24 @@ DnDtraceCrossHierOnly = True traceIncTopPort = False leadingZero = False signalPane = False -Scope1 = "TB" -Scope2 = "TB.clk_40g_inst" -Scope3 = "TB.U_da4008_chip_top" -Scope4 = "TB.U_da4008_chip_top.digital_top.U_awg_top" -multipleSelection = 1 322 5 0 0 +Scope1 = "TB.U_da4008_chip_top.digital_top.dut" +Scope2 = "TB" +multipleSelection = 1 34 6 0 0 sdfCheckUndef = FALSE simFlow = FALSE [hb.design] importCmd = "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" invokeDir = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g [hb.sourceTab.1] -scope = TB -File = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/TB.sv -Line = 316 +scope = TB.U_da4008_chip_top.digital_top.dut +File = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/lvds/ulink_rx.sv +Line = 72 [nMemoryManager] WaveformFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb UserActionNum = 0 nMemWindowNum = 0 [wave.0] -viewPort = 0 27 1920 309 152 65 +viewPort = 0 27 1920 392 256 65 primaryWindow = TRUE SessionFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.wave.0 displayGrid = FALSE diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.config b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.config index 47836c8..430888e 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.config +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.config @@ -45,11 +45,11 @@ Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseD Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\qBaseWindowBeFix=0 Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qBaseDockWidgetGroup\windowDock_nWave_1\dockIsFloating=false Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\ProductVersion=201809 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Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isNestedWindow=0 Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isVisible=true Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\size=@Size(1920 977) -Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_x=-1 -Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_y=27 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_x=-10 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_y=20 Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_width=1920 Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_height=977 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.png b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.png index 2191939..a8d2778 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.png and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.png differ diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.wave.0 b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.wave.0 index 368a825..b4cfaff 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.wave.0 +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/novas_autosave.ses.wave.0 @@ -2,7 +2,7 @@ Magic 271485 Revision Verdi_O-2018.09-SP2 ; Window Layout -viewPort 0 27 1920 309 152 65 +viewPort 0 27 1920 392 256 65 ; File list: ; openDirFile [-d delimiter] [-s time_offset] [-rf auto_bus_rule_file] path_name file_name @@ -16,16 +16,16 @@ signalSpacing 5 ; windowTimeUnit is used for zoom, cursor & marker ; waveform viewport range -zoom 134289743.767873 134518596.178090 -cursor 291747108.000000 -marker 291769308.000000 +zoom 0.000000 25862591.942020 +cursor 7001856.000000 +marker 479076480.000000 ; user define markers ; userMarker time_pos marker_name color linestyle ; visible top row signal index -top 0 +top 15 ; marker line index -markerPos 1 +markerPos 40 ; event list ; addEvent event_name event_expression @@ -45,12 +45,49 @@ COMPLEX_EVENT_END curSTATUS ByChange -addGroup "G1" +addGroup "SPI" -e FALSE activeDirFile "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb" -addSignal -w analog -ds pwc -h 98 -UNSIGNED -HEX /TB/cs_wave[7:0] -addSignal -c ID_CYAN6 -ls solid -lw 1 -h 15 -UNSIGNED -HEX -holdScope cnt_c[5:0] -addSignal -h 15 -holdScope clk_40g -addGroup "G2" +addSignal -h 15 /TB/U_da4008_chip_top/PI_sclk +addSignal -h 15 -holdScope PI_csn +addSignal -h 15 -holdScope PI_mosi +addSignal -h 15 -holdScope PO_miso +addGroup "SYS" -e FALSE +addSignal -h 15 /TB/U_da4008_chip_top/clk +addSignal -h 15 -holdScope PI_async_rstn +addSignal -h 15 -holdScope PI_sync_in +addSignal -h 15 -holdScope PO_sync_out +addSignal -h 15 -holdScope PO_irq +addGroup "LVDS" -e FALSE +addSignal -h 15 /TB/U_da4008_chip_top/lvds_clk[0:0] +addSignal -h 15 -holdScope lvds_data[3:0] +addSignal -h 15 -holdScope lvds_valid[0:0] +addGroup "DAC" -e FALSE +addSignal -h 15 /TB/start +addSignal -w analog -ds pwc -h 98 -holdScope cs_wave[7:0] +addSignal -h 15 /TB/U_da4008_chip_top/MSB_OUT[63:0] +addSignal -h 15 -holdScope LSB_OUT[63:0] +addSignal -h 15 -holdScope MSB_DUM[63:0] +addSignal -h 15 -holdScope DEM_VLD +addGroup "A_sram" +addSignal -h 15 /TB/U_da4008_chip_top/digital_top/wave_awrdata[511:0] +addSignal -h 15 -holdScope wave_awren[0:0] +addSignal -h 15 -holdScope wave_arwaddr[12:0] +addSignal -h 15 -holdScope wave_awrmask[63:0] +addGroup "B_sram" -e FALSE +addSignal -h 15 /TB/U_da4008_chip_top/digital_top/slv[2]/din[31:0] +addSignal -h 15 -holdScope wren +addSignal -h 15 -holdScope addr[18:0] +addSignal -h 15 -holdScope rden +addSignal -h 15 -holdScope dout[31:0] +addGroup "G7" +addSignal -expanded -h 15 /TB/U_da4008_chip_top/digital_top/dut/serial_in[3:0] +addSignal -h 15 -holdScope serial_in[3] +addSignal -h 15 -holdScope serial_in[2] +addSignal -h 15 -holdScope serial_in[1] +addSignal -h 15 -holdScope serial_in[0] +addSignal -h 15 -holdScope train_ready +addSignal -h 15 -holdScope frame_done +addGroup "G8" ; getSignalForm Scope Hierarchy Status ; active file of getSignalForm diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/turbo.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/turbo.log index e5be389..b9422a5 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/turbo.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/turbo.log @@ -1,3 +1,3 @@ Command Line: /opt/synopsys/verdi/Verdi_O-2018.09-SP2/platform/LINUXAMD64/bin/Novas -sverilog -f filelist_vlg.f -top TB -ssf verdplus_000.fsdb -nologo uname(Linux cryo1 3.10.0-1160.92.1.el7.x86_64 #1 SMP Tue Jun 20 11:48:01 UTC 2023 x86_64) -au time 5150.715472 126.554022 61.746470 delta 1618165760 1618165760 total 2043252736 2043252736 +au time 8711.256049 158.666959 108.289195 delta 2423099392 2423099392 total 2848186368 2848186368 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd index 9161df9..e39b23d 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd @@ -3,1098 +3,1122 @@ debImport "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" debLoadSimResult \ /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb wvCreateWindow -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcHBSelect "TB.clk_40g_inst" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.U_awg_top" -delim \ - "." -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.cmd_fifo_inst" -win \ - $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.start_dffr" -win \ - $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -win \ - $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.U_awg_top" -delim \ - "." -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -win \ - $_nTrace1 +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.U_DEM_PhaseSync_4008" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSearchString "dut" -win $_nTrace1 -next -case +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_spi_slave" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_dac_regfile" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSearchString "dut" -win $_nTrace1 -next -case srcDeselectAll -win $_nTrace1 -srcSelect -signal "wave_data_out" -line 67 -pos 1 -win $_nTrace1 -srcSelect -win $_nTrace1 -range {66 67 2 11 17 6} -backward +srcSelect -signal "wave_awren" -line 333 -pos 1 -win $_nTrace1 +srcSearchString "wave_awren" -win $_nTrace1 -next -case +srcSearchString "wave_awren" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {333 333 8 9 1 1} +srcSearchString "wave_awren" -win $_nTrace1 -next -case srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -signal "wave_valid_out" -line 68 -pos 1 -win $_nTrace1 -srcSelect -signal "wave_data_out" -line 67 -pos 1 -win $_nTrace1 -wvAddSignal -win $_nWave2 \ - "/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_valid_out" \ - "/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_data_out\[511:0\]" -wvSetPosition -win $_nWave2 {("G1" 0)} -wvSetPosition -win $_nWave2 {("G1" 2)} -wvSetPosition -win $_nWave2 {("G1" 2)} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 134167125.123435 -snap {("G1" 2)} -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 130416216.249016 139937754.161002 -wvZoom -win $_nWave2 134066990.773393 134623407.419412 -wvZoom -win $_nWave2 134384516.551619 134464478.633724 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 134426929.355389 -snap {("G1" 2)} -wvZoom -win $_nWave2 134390500.595264 134408238.159094 -srcHBSelect "TB" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB" -delim "." -srcHBSelect "TB" -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -signal "cs_wave" -line 386 -pos 1 -win $_nTrace1 -srcAddSelectedToWave -clipboard -win $_nTrace1 -wvDrop -win $_nWave2 -wvBusWaveform -win $_nWave2 -analog -wvSetPosition -win $_nWave2 {("G1" 3)} -wvSelectSignal -win $_nWave2 {( "G1" 2 )} -wvBusWaveform -win $_nWave2 -analog -wvSetPosition -win $_nWave2 {("G1" 3)} -srcDeselectAll -win $_nTrace1 -srcSelect -signal "cs_wave" -line 323 -pos 1 -win $_nTrace1 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvSetCursor -win $_nWave2 134394778.976026 -snap {("G2" 0)} -wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 134382827.009899 -snap {("G2" 0)} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 124268496.601073 -snap {("G1" 3)} -wvZoom -win $_nWave2 126553894.239714 148836521.216458 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 134227249.683363 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134413270.421392 -snap {("G1" 3)} -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 134233893.281178 134526211.583795 -wvSetCursor -win $_nWave2 134426854.736674 -snap {("G1" 3)} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 127982267.763864 136552508.908766 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 133570555.594471 134970821.589523 -wvSetCursor -win $_nWave2 134423072.935455 -snap {("G1" 3)} -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 134362119.198043 134507406.188585 -wvZoom -win $_nWave2 134392008.292655 134472752.165753 -srcDeselectAll -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {105 105 8 9 8 1} -backward srcDeselectAll -win $_nTrace1 srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top" -delim "." srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {15 16 4 1 7 1} -srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {22 23 11 1 1 1} -srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {23 28 2 1 9 1} -backward +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {29 37 12 1 1 1} +srcAction -pos 107 1 13 -win $_nTrace1 -name "my_drv.do_drive" -ctrlKey off +wvRestoreSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc" \ + -overWriteAutoAlias on -appendSignals on +wvExpandGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvCollapseGroup -win $_nWave2 "DAC" +wvExpandGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {DAC} +wvSetCursor -win $_nWave2 125799713.018962 -snap {("LVDS" 3)} +wvCollapseGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvScrollDown -win $_nWave2 5 +wvScrollDown -win $_nWave2 6 +wvZoom -win $_nWave2 276701662.351342 301226835.761002 +wvZoom -win $_nWave2 291062855.129050 292364429.627237 +wvZoom -win $_nWave2 291700836.188934 291839763.937995 srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -signal "CcalRsv0" -line 59 -pos 1 -win $_nTrace1 +srcAction -pos 107 1 3 -win $_nTrace1 -name "my_drv.do_drive" -ctrlKey off srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {29 74 2 1 1 1} +srcAction -pos 80 2 3 -win $_nTrace1 -name "my_drv" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcAction -pos 81 2 4 -win $_nTrace1 -name "lvds_drv" -ctrlKey off srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -win $_nTrace1 -range {24 27 1 1 2 1} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 +verdiWindowResize -win $_Verdi_1 "239" "111" "1440" "723" +srcDeselectAll -win $_nTrace1 +srcAction -pos 89 1 26 -win $_nTrace1 -name "//lvds_drv.file_path = LVDS_FILE;" \ + -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcAction -pos 94 5 6 -win $_nTrace1 -name "CONFIG_FILE" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "LVDS_FILE" -line 42 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -all -win $_nTrace1 +srcSelect -win $_nTrace1 -range {1 390 1 2 1 1} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 107 -pos 1 -win $_nTrace1 +srcSearchString "DATA_O_FILE" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {53 53 4 5 1 1} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 53 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 50 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CASE_TEMP" -line 44 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 50 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CASE_TEMP" -line 44 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 50 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 52 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 53 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 54 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 53 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 46 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 52 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 52 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 50 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 47 -pos 1 -win $_nTrace1 +srcAction -pos 46 3 7 -win $_nTrace1 -name "CONFIG_FILE" -ctrlKey off +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcAction -pos 94 1 13 -win $_nTrace1 -name "my_drv.file_path" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 107 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -all -win $_nTrace1 +srcSelect -win $_nTrace1 -range {1 390 1 2 1 1} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 39 -pos 1 -win $_nTrace1 +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_O_FILE" -line 107 -pos 1 -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 41 -pos 1 -win $_nTrace1 +verdiDockWidgetMaximize -dock widgetDock_MTB_SOURCE_TAB_1 +verdiDockWidgetHide -dock widgetDock_MTB_SOURCE_TAB_1 +verdiDockWidgetMaximize -dock widgetDock_ +verdiDockWidgetRestore -dock widgetDock_ +verdiWindowPreviousLayout -win $_Verdi_1 +verdiWindowPreviousLayout -win $_Verdi_1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "DATA_TEMP" -line 41 -pos 1 -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 284492011.552057 307285996.250447 +wvZoom -win $_nWave2 291437584.706966 292579322.759837 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 134 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 130 1 5 -win $_nTrace1 -name "my_drv.do_drive" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 94 1 3 -win $_nTrace1 -name "my_drv.file_path" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 107 1 4 -win $_nTrace1 -name "my_drv.do_drive" -ctrlKey off +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +wvCollapseGroup -win $_nWave2 "DAC" +wvExpandGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {DAC} +wvCollapseGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {LVDS} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 136577912.708964 -snap {("LVDS" 2)} +wvSetCursor -win $_nWave2 150420268.726764 -snap {("LVDS" 2)} +wvSetCursor -win $_nWave2 135655088.974444 -snap {("LVDS" 2)} +wvSetMarker -win $_nWave2 6998784.000000 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +wvZoom -win $_nWave2 0.000000 12611924.371774 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 0.000000 128284.036839 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 0.000000 15688003.486840 +wvZoom -win $_nWave2 3051830.303225 7041150.961036 +wvZoom -win $_nWave2 3051830.303225 3226822.754203 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.U_awg_top" -delim \ + "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSearchString "awg_top" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "wave_awrdata" -line 392 -pos 2 -win $_nTrace1 +srcSelect -signal "wave_awren" -line 393 -pos 2 -win $_nTrace1 +srcSelect -signal "wave_arwaddr" -line 394 -pos 2 -win $_nTrace1 +srcSelect -signal "wave_awrmask" -line 395 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 1)} +wvSetPosition -win $_nWave2 {("LVDS" 2)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("G5" 0)} +wvAddSignal -win $_nWave2 \ + "/TB/U_da4008_chip_top/digital_top/wave_awrdata\[511:0\]" \ + "/TB/U_da4008_chip_top/digital_top/wave_awren\[0:0\]" \ + "/TB/U_da4008_chip_top/digital_top/wave_arwaddr\[12:0\]" \ + "/TB/U_da4008_chip_top/digital_top/wave_awrmask\[63:0\]" +wvSetPosition -win $_nWave2 {("G5" 0)} +wvSetPosition -win $_nWave2 {("G5" 4)} +wvSetPosition -win $_nWave2 {("G5" 4)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 2153255.380547 -snap {("G5" 2)} +wvZoom -win $_nWave2 0.000000 8305413.610680 +wvZoom -win $_nWave2 5111023.760419 6441579.532759 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "LVDS" 3 )} +wvSetCursor -win $_nWave2 1590929.770212 -snap {("LVDS" 3)} +wvZoom -win $_nWave2 730832.922633 2855661.975474 +wvZoom -win $_nWave2 1119867.103954 1338698.830948 +wvSetCursor -win $_nWave2 1163410.861455 -snap {("LVDS" 2)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 4612021.241753 7389918.205898 +wvZoom -win $_nWave2 5761678.535878 5864105.760239 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 5413862.249211 5465954.925300 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +wvSelectGroup -win $_nWave2 {G5} +wvSetPosition -win $_nWave2 {("G5" 0)} +wvSelectGroup -win $_nWave2 {G5} +wvRenameGroup -win $_nWave2 {G5} {A_sram} +wvSelectGroup -win $_nWave2 {G6} +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSearchString "awg_top" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {388 388 3 4 3 1} +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "slv\[2\].din" -line 396 -pos 1 +srcSelect -win $_nTrace1 -range {396 397 8 8 10 10} +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "slv\[2\].din" -line 396 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].wren" -line 397 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].addr\[18:0\]" -line 398 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].rden" -line 399 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].rden" -line 399 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].rden" -line 399 -pos 1 +srcSelect -win $_nTrace1 -signal "slv\[2\].dout" -line 400 -pos 1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 1)} +wvSetPosition -win $_nWave2 {("LVDS" 2)} +wvSetPosition -win $_nWave2 {("LVDS" 3)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 0)} +wvSetPosition -win $_nWave2 {("G6" 0)} +wvAddSignal -win $_nWave2 \ + "/TB/U_da4008_chip_top/digital_top/slv\[2\]/din\[31:0\]" \ + "/TB/U_da4008_chip_top/digital_top/slv\[2\]/wren" \ + "/TB/U_da4008_chip_top/digital_top/slv\[2\]/addr\[18:0\]" \ + "/TB/U_da4008_chip_top/digital_top/slv\[2\]/rden" \ + "/TB/U_da4008_chip_top/digital_top/slv\[2\]/dout\[31:0\]" +wvSetPosition -win $_nWave2 {("G6" 0)} +wvSetPosition -win $_nWave2 {("G6" 5)} +wvSetPosition -win $_nWave2 {("G6" 5)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 3391157.044872 7121429.794231 +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {A_sram} +wvScrollDown -win $_nWave2 5 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 4477275.874628 7816261.272656 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 5451058.170461 5833141.687082 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "G6" 3 )} +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 108 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -range {105 105 2 7 1 2} -backward +wvSelectGroup -win $_nWave2 {G6} +wvSetPosition -win $_nWave2 {("G6" 0)} +wvSelectGroup -win $_nWave2 {G6} +wvRenameGroup -win $_nWave2 {G6} {B_sram} +wvSelectSignal -win $_nWave2 {( "A_sram" 3 )} +wvSelectGroup -win $_nWave2 {B_sram} +wvExpandGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {B_sram} +wvCollapseGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {B_sram} +wvZoom -win $_nWave2 0.000000 13227140.194787 +wvSelectGroup -win $_nWave2 {B_sram} +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +wvSaveSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc" +srcDeselectAll -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 115 -pos 1 -win $_nTrace1 +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {112 112 2 3 1 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {87 87 2 3 1 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {83 83 3 4 1 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {215 215 8 9 1 1} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_sync_in" -line 215 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_sync_in" -line 215 -pos 1 -win $_nTrace1 +srcAction -pos 214 3 6 -win $_nTrace1 -name "PI_sync_in" -ctrlKey off +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {87 87 2 3 1 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {83 83 3 4 1 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {215 215 8 9 1 1} +nsMsgSwitchTab -tab general +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {137 137 2 3 1 1} +srcSearchString "start" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_sync_in" -line 215 -pos 1 -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.U_DEM_PhaseSync_4008" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.DEM_VLD_dffr" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.DEM_VLD_dffr" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.U_DEM_PhaseSync_4008" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.U_iopad" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 40 -pos 1 -win $_nTrace1 +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.U_awg_top" -delim \ + "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -win \ + $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -win \ + $_nTrace1 +srcSetScope -win $_nTrace1 \ + "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -delim \ + "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top.awg_ctrl_inst" -win \ + $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 39 -pos 1 -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.U_awg_top" -delim \ + "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.U_awg_top" -win $_nTrace1 +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {88 88 8 9 6 1} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_start" -line 88 -pos 1 -win $_nTrace1 +srcSearchString "sync_start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {76 76 14 15 1 1} +srcSearchString "sync_start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {76 76 8 8 1 11} +srcSearchString "sync_start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {75 75 3 4 1 1} +srcSearchString "sync_start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {88 88 8 9 1 1} +srcSearchString "sync_start" -win $_nTrace1 -next -case +srcSearchString "sync_start" -win $_nTrace1 -next -case +srcSearchString "sync_start" -win $_nTrace1 -next -case +srcSearchString "sync_start" -win $_nTrace1 -next -case +srcSearchString "sync_start" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start_posedge" -line 76 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start_posedge" -line 76 -pos 1 -win $_nTrace1 +srcSearchString "start_posedge" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {74 74 3 4 1 1} +srcSearchString "start_posedge" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {76 76 11 12 1 1} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 72 -pos 1 -win $_nTrace1 +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {72 72 8 8 1 6} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {71 71 3 3 1 6} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {38 38 5 6 1 1} +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 40 -pos 1 -win $_nTrace1 +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -next -case +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {273 273 1 2 34 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {252 252 1 2 31 1} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {168 168 1 1 61 66} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {108 108 1 1 57 62} +srcSearchString "start" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {480 480 1 2 30 1} +srcSearchString "start" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 40 -pos 1 -win $_nTrace1 +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "sync_in" -win $_nTrace1 -next -case +srcSearchString "awg_top" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_pulse" -line 391 -pos 1 -win $_nTrace1 +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcSearchString "sync_pulse" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 356 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 356 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_int" -line 356 -pos 1 -win $_nTrace1 +srcAction -pos 355 22 5 -win $_nTrace1 -name "sync_int" -ctrlKey off +srcSearchString "sync_pulse" -win $_nTrace1 -prev -case +srcSearchString "sync_pulse" -win $_nTrace1 -prev -case +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.U_iopad" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_in" -line 40 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_out" -line 41 -pos 1 -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top" -delim "." +srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_mosi" -line 8 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_sync_in" -line 14 -pos 1 -win $_nTrace1 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 112 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -range {134 138 1 1 1 1} -backward +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 138 5 0 -win $_nTrace1 -name " +" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcAction -pos 138 5 0 -win $_nTrace1 -name " +" -ctrlKey off +srcInvokeExtEditor -win $_nTrace1 +srcSaveAs -win $_nTrace3 -file \ + /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/TB.sv +verdiWindowResize -win $_Verdi_1 "251" "274" "1440" "723" +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {B_sram} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvScrollDown -win $_nWave2 3 +wvSelectSignal -win $_nWave2 {( "DAC" 1 )} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 118199958.244831 144761746.614456 +wvZoom -win $_nWave2 124955838.543753 125709192.102269 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +srcInvokeExtEditor -win $_nTrace1 +srcCloseWindow -win $_nTrace3 +srcSaveAs -win $_nTrace3 -file \ + /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/TB.sv +srcCloseWindow -win $_nTrace3 +srcDeselectAll -win $_nTrace1 +debReload +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollUp -win $_nWave2 2 +wvSelectSignal -win $_nWave2 {( "DAC" 1 )} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 474654968.570613 487826761.553742 +wvZoom -win $_nWave2 478270282.289666 479704356.731562 +wvZoom -win $_nWave2 478913188.489535 479380279.524590 +wvSetCursor -win $_nWave2 479205921.663345 -snap {("DAC" 1)} +wvZoom -win $_nWave2 479119170.080439 479169169.761227 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 452545173.206075 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 478888759.172333 -snap {("DAC" 1)} +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 423379060.172004 490649288.621555 +wvSetCursor -win $_nWave2 478832377.494092 -snap {("DAC" 2)} +wvSetCursor -win $_nWave2 476493613.833448 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 476247428.184960 -snap {("DAC" 1)} +wvSelectSignal -win $_nWave2 {( "DAC" 2 )} +wvSetCursor -win $_nWave2 473108561.166728 -snap {("DAC" 1)} +wvSetMarker -win $_nWave2 449170212.000000 +wvSetCursor -win $_nWave2 478586191.845603 -snap {("DAC" 0)} +wvSetCursor -win $_nWave2 453413709.287628 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 453413709.287628 -snap {("DAC" 1)} +wvSetMarker -win $_nWave2 449170212.000000 +wvSetCursor -win $_nWave2 476308974.597082 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 451505770.511840 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 476739799.481937 -snap {("DAC" 1)} +wvSetMarker -win $_nWave2 479099172.000000 +wvSetCursor -win $_nWave2 449351646.087563 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 449905563.796663 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 449905563.796663 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 446458964.717821 -snap {("DAC" 1)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 144 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 141 -pos 1 -win $_nTrace1 +wvScrollDown -win $_nWave2 2 +wvScrollUp -win $_nWave2 2 +wvScrollDown -win $_nWave2 2 +wvScrollUp -win $_nWave2 2 +wvScrollUp -win $_nWave2 1 +wvSelectGroup -win $_nWave2 {DAC} +wvSetPosition -win $_nWave2 {("LVDS" 3)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvAddSignal -win $_nWave2 "/TB/start" +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvSetCursor -win $_nWave2 451074945.626985 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 451013399.214862 -snap {("DAC" 1)} +wvSetMarker -win $_nWave2 479076480.000000 +wvSetMarker -win $_nWave2 479076480.000000 +wvSetCursor -win $_nWave2 475939696.124349 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 450459481.505763 -snap {("DAC" 1)} +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +srcDeselectAll -win $_nTrace1 +wvSetCursor -win $_nWave2 471692993.687918 -snap {("B_sram" 0)} +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {A_sram} +wvZoom -win $_nWave2 4615980.909164 8678044.109229 +wvZoom -win $_nWave2 5132565.341743 5325819.949614 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 5400699.479746 5452328.341135 +wvZoom -win $_nWave2 5445240.591224 5447885.802786 +wvZoom -win $_nWave2 5447778.832657 5448519.395089 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +verdiWindowResize -win $_Verdi_1 "233" "197" "1440" "723" +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "serial_in" -line 12 -pos 1 -win $_nTrace1 +wvCollapseGroup -win $_nWave2 "A_sram" +wvExpandGroup -win $_nWave2 "A_sram" +wvSelectGroup -win $_nWave2 {A_sram} +wvCollapseGroup -win $_nWave2 "A_sram" +wvCollapseGroup -win $_nWave2 "A_sram" +wvExpandGroup -win $_nWave2 "A_sram" +wvSelectGroup -win $_nWave2 {A_sram} +wvCollapseGroup -win $_nWave2 "A_sram" +wvExpandGroup -win $_nWave2 "A_sram" +wvSelectGroup -win $_nWave2 {A_sram} +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 2 +wvScrollUp -win $_nWave2 4 +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvCollapseGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {B_sram} +wvScrollDown -win $_nWave2 7 +wvCollapseGroup -win $_nWave2 "A_sram" +wvSelectGroup -win $_nWave2 {B_sram} +wvScrollUp -win $_nWave2 7 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 1998177.016752 6172146.785079 +wvZoom -win $_nWave2 2315139.039415 2609188.144778 +wvScrollDown -win $_nWave2 6 +wvZoomOut -win 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-wvZoomAll -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 132435936.412165 135609782.382826 -wvZoom -win $_nWave2 134336080.332520 134496949.090723 -wvCenterCursor -win $_nWave2 -wvSetCursor -win $_nWave2 134397742.619126 -snap {("G1" 3)} -wvZoomAll -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoom -win $_nWave2 129262090.441503 138783628.353488 -wvZoom -win $_nWave2 134264162.534797 134871678.668716 -wvZoom -win $_nWave2 134381898.219568 134473913.185588 -wvZoom -win $_nWave2 134397042.006394 134400334.133980 -wvSetCursor -win $_nWave2 134397740.871786 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134397732.000000 -wvSetCursor -win $_nWave2 134397770.318366 -snap {("G1" 0)} -wvSetCursor -win $_nWave2 134397727.130049 -wvSetCursor -win $_nWave2 134398942.292229 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134398942.292229 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134398292.504375 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134398447.589694 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134398956.033966 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134398942.292229 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134398946.218440 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134398946.218440 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134398946.218440 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134398944.255334 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134398942.292229 -wvSetCursor -win $_nWave2 134398944.255334 srcDeselectAll -win $_nTrace1 -srcSelect -signal "cs_wave" -line 323 -pos 1 -win $_nTrace1 -srcAddSelectedToWave -clipboard -win $_nTrace1 -wvDrop -win $_nWave2 -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectSignal -win $_nWave2 {( "G1" 4 )} -wvSetCursor -win $_nWave2 134398459.368326 -snap {("G2" 0)} -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 101 1 5 -win $_nTrace1 -name "lvds_drv.train_count" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -range {82 82 1 5 1 1} -backward +wvSelectGroup -win $_nWave2 {A_sram} +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top.dut" -delim "." +srcHBSelect "TB.U_da4008_chip_top.digital_top.dut" -win $_nTrace1 +wvSetPosition -win $_nWave2 {("LVDS" 0)} +wvCollapseGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {B_sram} +wvSelectGroup -win $_nWave2 {G7} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "serial_in" -line 12 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "serial_in" -line 12 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 4)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 0)} +wvSetPosition -win $_nWave2 {("B_sram" 0)} +wvSetPosition -win $_nWave2 {("G7" 0)} +wvAddSignal -win $_nWave2 \ + "/TB/U_da4008_chip_top/digital_top/dut/serial_in\[3:0\]" +wvSetPosition -win $_nWave2 {("G7" 0)} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvSelectSignal -win $_nWave2 {( "G7" 1 )} +wvExpandBus -win $_nWave2 {("G7" 1)} +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 -wvSetCursor -win $_nWave2 134397681.978627 -snap {("G1" 4)} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectSignal -win $_nWave2 {( "G1" 2 )} -wvSelectSignal -win $_nWave2 {( "G1" 4 )} -wvGoToGroup -win $_nWave2 "G2" -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G1" 4 )} -wvSelectGroup -win $_nWave2 {G2} -wvSetPosition -win $_nWave2 {("G1" 0)} -wvCollapseGroup -win $_nWave2 "G1" -wvSelectGroup -win $_nWave2 {G2} -wvExpandGroup -win $_nWave2 "G1" -wvSelectGroup -win $_nWave2 {G2} -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G1" 4 )} -wvGoToGroup -win $_nWave2 "G2" -wvSetPosition -win $_nWave2 {("G1" 4)} -wvSetPosition -win $_nWave2 {("G2" 0)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "tap_adj_mask" -line 16 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "train_ready" -line 25 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("B_sram" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 0)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 4)} +wvSetPosition -win $_nWave2 {("A_sram" 0)} +wvSetPosition -win $_nWave2 {("B_sram" 0)} +wvSetPosition -win $_nWave2 {("G7" 0)} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/dut/train_ready" +wvSetPosition -win $_nWave2 {("G7" 1)} +wvSetPosition -win $_nWave2 {("G7" 2)} +wvScrollDown -win $_nWave2 4 +wvScrollDown -win $_nWave2 7 +wvSetPosition -win $_nWave2 {("G7" 3)} +wvSetPosition -win $_nWave2 {("G7" 4)} wvMoveSelected -win $_nWave2 -wvSetPosition -win $_nWave2 {("G2" 1)} -wvSetPosition -win $_nWave2 {("G2" 1)} -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSetCursor -win $_nWave2 134397387.512833 -snap {("G2" 1)} -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G1" 2 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSetCursor -win $_nWave2 134397503.336045 -snap {("G1" 3)} -wvSetCursor -win $_nWave2 134397493.520519 -snap {("G1" 3)} -srcActiveTrace "TB.cs_wave\[7:0\]" -win $_nTrace1 -TraceByDConWave -TraceTime \ - 26916 -TraceValue 00000000 -wvSetCursor -win $_nWave2 134397452.295307 -snap {("G2" 1)} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSetCursor -win $_nWave2 134397731.056260 -snap {("G1" 2)} -wvSetCursor -win $_nWave2 134397617.196152 -snap {("G1" 2)} -wvZoom -win $_nWave2 134397595.601994 134397607.380626 -wvSetCursor -win $_nWave2 134397597.378879 -snap {("G2" 1)} +wvSetPosition -win $_nWave2 {("G7" 4)} +wvScrollDown -win $_nWave2 11 +wvScrollDown -win $_nWave2 1 +wvSetPosition -win $_nWave2 {("G7" 5)} +wvSetPosition -win $_nWave2 {("G7" 6)} +wvSetPosition -win $_nWave2 {("G8" 0)} +wvSetPosition -win $_nWave2 {("G7" 6)} +wvMoveSelected -win $_nWave2 +wvSetPosition -win $_nWave2 {("G7" 6)} +wvScrollUp -win $_nWave2 1 +wvSelectSignal -win $_nWave2 {( "G7" 1 )} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvCollapseBus -win $_nWave2 {("G7" 1)} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvSetPosition -win $_nWave2 {("G7" 2)} +wvSelectSignal -win $_nWave2 {( "G7" 2 )} +wvSelectSignal -win $_nWave2 {( "G7" 1 )} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvExpandBus -win $_nWave2 {("G7" 1)} +wvSetPosition -win $_nWave2 {("G7" 6)} +wvScrollDown -win $_nWave2 7 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollUp -win $_nWave2 1 +wvZoom -win $_nWave2 4225137.024006 5688434.302924 +wvScrollDown -win $_nWave2 1 +wvZoom -win $_nWave2 4952099.899076 5023055.759810 +wvScrollDown -win $_nWave2 0 +wvZoom -win $_nWave2 4994946.072986 5000464.140838 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G1" 2 )} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectGroup -win $_nWave2 {G2} -wvGetSignalOpen -win $_nWave2 -wvGetSignalSetScope -win $_nWave2 "/PCLAMPC_H_G" -wvGetSignalSetScope -win $_nWave2 "/_\$novas_unit__1" -wvGetSignalSetScope -win $_nWave2 "/clk_gen" -wvGetSignalSetScope -win $_nWave2 "/reset_tb" -wvGetSignalSetScope -win $_nWave2 "/sirv_gnrl_dffl" -wvGetSignalSetScope -win $_nWave2 "/sirv_gnrl_xchecker" -wvGetSignalSetScope -win $_nWave2 "/sirv_gnrl_ltch/LTCH_PROC" -wvGetSignalSetScope -win $_nWave2 "/sirv_gnrl_dffl" -wvGetSignalSetScope -win $_nWave2 "/TB" -wvSetPosition -win $_nWave2 {("G2" 1)} -wvSetPosition -win $_nWave2 {("G2" 1)} -wvAddSignal -win $_nWave2 -clear -wvAddSignal -win $_nWave2 -group {"G1" \ -{/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_valid_out} \ -{/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_data_out\[511:0\]} \ -{/TB/cs_wave\[7:0\]} -height 52 \ -} -wvAddSignal -win $_nWave2 -group {"G2" \ -{/TB/cs_wave\[7:0\]} \ -} -wvAddSignal -win $_nWave2 -group {"G3" \ -} -wvSetPosition -win $_nWave2 {("G2" 1)} -wvGetSignalClose -win $_nWave2 -wvGetSignalOpen -win $_nWave2 -wvGetSignalSetScope -win $_nWave2 "/PCLAMPC_H_G" -wvGetSignalSetScope -win $_nWave2 "/sirv_gnrl_ltch" -wvGetSignalSetScope -win $_nWave2 "/TB" -wvSelectGroup -win $_nWave2 {G3} -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSetPosition -win $_nWave2 {("G2" 4)} -wvSetPosition -win $_nWave2 {("G2" 4)} -wvAddSignal -win $_nWave2 -clear -wvAddSignal -win $_nWave2 -group {"G1" \ -{/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_valid_out} \ -{/TB/U_da4008_chip_top/digital_top/U_awg_top/wave_data_out\[511:0\]} \ -{/TB/cs_wave\[7:0\]} -height 52 \ -} -wvAddSignal -win $_nWave2 -group {"G2" \ -{/TB/cs_wave\[7:0\]} \ -{/TB/cs_wave\[7:0\]} \ -{/TB/cs_wave\[7:0\]} \ -{/TB/data_out\[63:0\]} \ -} -wvAddSignal -win $_nWave2 -group {"G3" \ -} -wvSelectSignal -win $_nWave2 {( "G2" 3 4 )} -wvSetPosition -win $_nWave2 {("G2" 4)} -wvSelectSignal -win $_nWave2 {( "G2" 4 )} -wvSelectSignal -win $_nWave2 {( "G2" 2 3 4 )} -wvCut -win $_nWave2 -wvSetPosition -win $_nWave2 {("G2" 1)} -verdiWindowPreviousLayout -win $_Verdi_1 -verdiDockWidgetSetCurTab -dock windowDock_nWave_2 -wvZoom -win $_nWave2 134393363.843887 134479900.391200 -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectGroup -win $_nWave2 {G2} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectSignal -win $_nWave2 {( "G2" 1 )} -wvSelectGroup -win $_nWave2 {G3} -wvSelectSignal -win $_nWave2 {( "G1" 3 )} -wvSelectGroup -win $_nWave2 {G1} -wvSelectSignal -win $_nWave2 {( "G1" 2 )} -wvCut -win $_nWave2 -wvSetPosition -win $_nWave2 {("G3" 0)} -wvSetPosition -win $_nWave2 {("G2" 1)} -wvSelectGroup -win $_nWave2 {G1} -wvTpfCloseForm -win $_nWave2 -wvGetSignalClose -win $_nWave2 -wvCloseWindow -win $_nWave2 -wvCreateWindow -wvAddSignal -win $_nWave3 "/TB/cs_wave\[7:0\]" -wvSetPosition -win $_nWave3 {("G1" 0)} -wvSetPosition -win $_nWave3 {("G1" 1)} -wvSetPosition -win $_nWave3 {("G1" 1)} -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoom -win $_nWave3 130416216.249016 136475376.738462 -wvZoom -win $_nWave3 134170222.062079 134517079.192065 -wvZoom -win $_nWave3 134394221.031454 134474885.480288 -wvZoomIn -win $_nWave3 -wvZoomIn -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomIn -win $_nWave3 -wvZoomIn -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoom -win $_nWave3 129981990.697674 137695207.728086 -wvZoomIn -win $_nWave3 -wvZoom -win $_nWave3 134299690.451502 134499764.954080 -wvSetCursor -win $_nWave3 134343714.000368 -snap {("G1" 1)} -wvSelectSignal -win $_nWave3 {( "G1" 1 )} -wvBusWaveform -win $_nWave3 -analog -wvSetPosition -win $_nWave3 {("G1" 1)} -wvSetCursor -win $_nWave3 134396924.035043 -snap {("G1" 1)} -wvSetMarker -win $_nWave3 134399436.000000 -wvZoomIn -win $_nWave3 -wvZoomIn -win $_nWave3 -wvZoomIn -win $_nWave3 -wvSetCursor -win $_nWave3 134399064.068590 -snap {("G1" 1)} -wvSetCursor -win $_nWave3 134397945.584117 -snap {("G1" 1)} -wvSetMarker -win $_nWave3 134397972.000000 -wvSetMarker -win $_nWave3 134398908.000000 -wvSelectGroup -win $_nWave3 {G1} -wvSetCursor -win $_nWave3 134398691.240433 -snap {("G2" 0)} -wvZoom -win $_nWave3 134397080.622791 134400823.817495 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 srcDeselectAll -win $_nTrace1 -srcSelect -signal "rst_n" -line 318 -pos 1 -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -signal "cnt_c" -line 322 -pos 1 -win $_nTrace1 -srcSelect -win $_nTrace1 -range {322 323 4 2 4 1} -srcDeselectAll -win $_nTrace1 -srcSelect -signal "cnt_c" -line 322 -pos 1 -win $_nTrace1 -srcAddSelectedToWave -clipboard -win $_nTrace1 -wvDrop -win $_nWave3 -wvZoomOut -win $_nWave3 -wvSetPosition -win $_nWave3 {("G1" 0)} -wvCollapseGroup -win $_nWave3 "G1" -wvExpandGroup -win $_nWave3 "G1" -wvSelectSignal -win $_nWave3 {( "G1" 2 )} -wvChangeDisplayAttr -win $_nWave3 -c ID_PURPLE5 -lw 1 -ls solid -wvZoom -win $_nWave3 134349810.792163 134468664.478263 -wvZoom -win $_nWave3 134395736.366693 134400272.225912 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoomOut -win $_nWave3 -wvSelectSignal -win $_nWave3 {( "G1" 2 )} -wvSetPosition -win $_nWave3 {("G1" 2)} -wvExpandBus -win $_nWave3 {("G1" 2)} -wvSelectSignal -win $_nWave3 {( "G1" 2 )} -wvSelectSignal -win $_nWave3 {( "G1" 2 )} -wvSelectSignal -win $_nWave3 {( "G1" 2 )} -wvSetPosition -win $_nWave3 {("G1" 2)} -wvCollapseBus -win $_nWave3 {("G1" 2)} -wvSetPosition -win $_nWave3 {("G1" 2)} -wvSetCursor -win $_nWave3 134507752.074226 -snap {("G1" 1)} -wvZoom -win $_nWave3 134393503.598726 134489749.284148 -wvSetCursor -win $_nWave3 134449230.826216 -snap {("G1" 1)} -wvSetCursor -win $_nWave3 134397463.617957 -snap {("G1" 2)} -wvZoomIn -win $_nWave3 -wvZoomOut -win $_nWave3 -wvZoom -win $_nWave3 134396660.135789 134404178.433219 -wvZoom -win $_nWave3 134397664.368530 134397924.393128 -wvSearchNext -win $_nWave3 -wvSetSearchMode -win $_nWave3 -posedge -wvSearchNext -win $_nWave3 -wvSearchNext -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -negedge -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -value -wvSearchNext -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -value 44 -wvSearchNext -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -value 3 -wvSearchPrev -win $_nWave3 -wvSearchPrev -win $_nWave3 -wvSearchNext -win $_nWave3 -wvSetSearchMode -win $_nWave3 -analog -wvSetSearchMode -win $_nWave3 -analog * -wvSearchNext -win $_nWave3 -wvSetSearchMode -win $_nWave3 -analog 33 -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -analog 33 -wvSearchPrev -win $_nWave3 -wvSetSearchMode -win $_nWave3 -analog 33 -wvSearchNext -win $_nWave3 -wvSetSearchMode -win $_nWave3 -analog 33 -wvSearchNext -win $_nWave3 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+wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("A_sram" 0)} +wvSetPosition -win $_nWave2 {("B_sram" 0)} +wvSetPosition -win $_nWave2 {("G7" 4)} +wvSetPosition -win $_nWave2 {("G7" 0)} +wvSetPosition -win $_nWave2 {("B_sram" 0)} +wvSetPosition -win $_nWave2 {("G7" 0)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/dut/frame_done" +wvSetPosition -win $_nWave2 {("G7" 0)} +wvSetPosition -win $_nWave2 {("G7" 1)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 17 +wvSetPosition -win $_nWave2 {("G7" 2)} +wvSetPosition -win $_nWave2 {("G7" 3)} +wvSetPosition -win $_nWave2 {("G7" 4)} +wvSetPosition -win $_nWave2 {("G7" 5)} +wvSetPosition -win $_nWave2 {("G7" 6)} +wvSetPosition -win $_nWave2 {("G7" 7)} +wvSetPosition -win $_nWave2 {("G8" 0)} +wvSetPosition -win $_nWave2 {("G7" 7)} +wvMoveSelected -win $_nWave2 +wvSetPosition -win $_nWave2 {("G7" 7)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvSetCursor -win $_nWave2 7452216.680695 -snap {("G7" 5)} +wvZoom -win $_nWave2 3376785.683440 11178325.021043 +wvZoom -win $_nWave2 5311110.624419 7231160.104580 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "G7" 6 )} +wvScrollUp -win $_nWave2 13 +wvScrollDown -win $_nWave2 12 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 8 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 13 +wvScrollUp -win $_nWave2 7 +wvSelectGroup -win $_nWave2 {A_sram} +wvSelectGroup -win $_nWave2 {A_sram} +wvZoom -win $_nWave2 5721295.028461 6441533.168320 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 5124611.006829 5688676.741248 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 debExit diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd.bak b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd.bak index 4b2e9e4..499cc38 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd.bak +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdiLog/verdi.cmd.bak @@ -3,252 +3,159 @@ debImport "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" debLoadSimResult \ /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb wvCreateWindow -verdiWindowResize -win $_Verdi_1 "587" "176" "1057" "712" -srcHBSelect "TB.clk_40g_inst" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.U_iopad" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top" -delim "." -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 srcDeselectAll -win $_nTrace1 srcDeselectAll -win $_nTrace1 -srcSelect -signal "MSB_OUT" -line 24 -pos 1 -win $_nTrace1 -srcSelect -signal "LSB_OUT" -line 25 -pos 1 -win $_nTrace1 -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/MSB_OUT\[63:0\]" \ - "/TB/U_da4008_chip_top/LSB_OUT\[63:0\]" -wvSetPosition -win $_nWave2 {("G1" 0)} -wvSetPosition -win $_nWave2 {("G1" 2)} -wvSetPosition -win $_nWave2 {("G1" 2)} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -srcHBSelect "TB.U_da4008_chip_top.U_iopad" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcSelect -signal "wave_data_valid" -line 53 -pos 1 -win $_nTrace1 -srcSelect -signal "wave_data_out" -line 52 -pos 1 -win $_nTrace1 -wvSetPosition -win $_nWave2 {("G1" 0)} -wvSetPosition -win $_nWave2 {("G1" 1)} -wvSetPosition -win $_nWave2 {("G1" 0)} -wvSetPosition -win $_nWave2 {("G2" 0)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/wave_data_valid" \ - "/TB/U_da4008_chip_top/digital_top/wave_data_out\[63:0\]" -wvSetPosition -win $_nWave2 {("G2" 0)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2/digital_top" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {digital_top} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/clk" \ - "/TB/U_da4008_chip_top/digital_top/rst_n" \ - "/TB/U_da4008_chip_top/digital_top/sync_in" \ - "/TB/U_da4008_chip_top/digital_top/sync_out" \ - "/TB/U_da4008_chip_top/digital_top/cfgid\[4:0\]" \ - "/TB/U_da4008_chip_top/digital_top/sclk" \ - "/TB/U_da4008_chip_top/digital_top/csn" \ - "/TB/U_da4008_chip_top/digital_top/mosi" \ - "/TB/U_da4008_chip_top/digital_top/miso" \ - "/TB/U_da4008_chip_top/digital_top/oen" \ - "/TB/U_da4008_chip_top/digital_top/irq" \ - "/TB/U_da4008_chip_top/digital_top/wave_data_out\[63:0\]" \ - "/TB/U_da4008_chip_top/digital_top/wave_data_valid" \ - "/TB/U_da4008_chip_top/digital_top/lvds_data\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/lvds_valid\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/lvds_clk\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/phase_tap\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/Rterm\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/PrbsEn" \ - "/TB/U_da4008_chip_top/digital_top/Set\[63:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CasAddr\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CasDw\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/IMainCtrl\[9:0\]" \ - "/TB/U_da4008_chip_top/digital_top/IBleedCtrl\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/ICkCml\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CurRsv0\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CurRsv1\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CcalRstn\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/EnAllP\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/DccEn\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CasGateCkCtrl\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiEnPi\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiEnQec\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiEnDcc\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiQecCtrlIp\[4:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiQecCtrlIn\[4:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiQecCtrlQp\[4:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiQecCtrlQn\[4:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiDccCtrlIup\[5:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiDccCtrlIdn\[5:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiDccCtrlQup\[5:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiDccCtrlQdn\[5:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiSiqNOut\[7:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiSiqPOut\[7:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiSiPOut\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SpiSqPOut\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CrtlCrossOverN\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CrtlCrossOverP\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CcalRsv0\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CcalRsv1\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SelCk10GDig\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SelCk2p5GDig\[3:0\]" \ - "/TB/U_da4008_chip_top/digital_top/SelCk625MDig\[8:0\]" \ - "/TB/U_da4008_chip_top/digital_top/P2sDataEn\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/P2sEnAllP\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/EnPiP\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CkDivRstn\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/p2srsv0\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/p2srsv1\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CkRxSw\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/RstnCk\[15:0\]" \ - "/TB/U_da4008_chip_top/digital_top/CtrlZin\[15:0\]" -wvSetPosition -win $_nWave2 {("G2/digital_top" 0)} -wvSetPosition -win $_nWave2 {("G2/digital_top" 62)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {slv[3:0]} -wvAddSubGroup -win $_nWave2 -holdpost {slv[3](sram_if)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[3](sram_if)" 0)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/slv\[3\]/clk" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/addr\[19:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[3\]/wben\[3:0\]" -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[3](sram_if)" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[3](sram_if)" 7)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {slv[2](sram_if)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[2](sram_if)" 0)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/slv\[2\]/clk" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/addr\[19:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/wben\[3:0\]" -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[2](sram_if)" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[2](sram_if)" 7)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {slv[1](sram_if)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[1](sram_if)" 0)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/slv\[1\]/clk" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/addr\[19:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/wben\[3:0\]" -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[1](sram_if)" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[1](sram_if)" 7)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {slv[0](sram_if)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[0](sram_if)" 0)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/slv\[0\]/clk" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/addr\[19:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[0\]/wben\[3:0\]" -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[0](sram_if)" 0)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]/slv[0](sram_if)" 7)} -wvSetPosition -win $_nWave2 {("G2/slv[3:0]" 0)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvSetPosition -win $_nWave2 {("G2/mst(sram_if)" 0)} -wvAddSubGroup -win $_nWave2 -holdpost {mst(sram_if)} -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/mst/clk" \ - "/TB/U_da4008_chip_top/digital_top/mst/addr\[24:0\]" \ - "/TB/U_da4008_chip_top/digital_top/mst/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/mst/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/mst/rden" \ - "/TB/U_da4008_chip_top/digital_top/mst/wren" \ - "/TB/U_da4008_chip_top/digital_top/mst/wben\[3:0\]" -wvSetPosition -win $_nWave2 {("G2/mst(sram_if)" 0)} -wvSetPosition -win $_nWave2 {("G2/mst(sram_if)" 7)} -wvSetPosition -win $_nWave2 {("G2" 2)} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollUp -win $_nWave2 34 -wvSetPosition -win $_nWave2 {("G2" 0)} -wvCollapseGroup -win $_nWave2 "G2" -wvSelectGroup -win $_nWave2 {G2} -wvCut -win $_nWave2 -wvSetPosition -win $_nWave2 {("G3" 0)} -wvSetPosition -win $_nWave2 {("G1" 2)} +srcSearchString "PI_mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 4 5 1 1} +srcSearchString "PI_mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 4 5 1 1} +nsMsgSwitchTab -tab general +srcSearchString "PI_mosi" -win $_nTrace1 -next -case +srcSearchString "PI_mosi" -win $_nTrace1 -next -case wvSelectGroup -win $_nWave2 {G1} +wvSelectGroup -win $_nWave2 {G1} +wvSelectGroup -win $_nWave2 {G1} +wvSelectGroup -win $_nWave2 {G1} +wvSelectGroup -win $_nWave2 {G1} +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 208 -pos 2 -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "PI_csn" -line 210 -pos 0 +srcSelect -win $_nTrace1 -signal "PI_mosi" -line 211 -pos 0 +srcSelect -win $_nTrace1 -signal "PO_miso" -line 212 -pos 0 +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/PI_sclk" \ + "/TB/U_da4008_chip_top/PI_csn" "/TB/U_da4008_chip_top/PI_mosi" \ + "/TB/U_da4008_chip_top/PO_miso" +wvSetPosition -win $_nWave2 {("G1" 0)} +wvSetPosition -win $_nWave2 {("G1" 4)} +wvSetPosition -win $_nWave2 {("G1" 4)} +wvScrollUp -win $_nWave2 2 +wvSelectGroup -win $_nWave2 {G1} +wvSelectGroup -win $_nWave2 {G1} +wvSetPosition -win $_nWave2 {("G1" 0)} +wvRenameGroup -win $_nWave2 {G1} {SPI} +wvSelectGroup -win $_nWave2 {G2} +wvSelectGroup -win $_nWave2 {SPI} +wvSelectGroup -win $_nWave2 {SPI} +wvSelectGroup -win $_nWave2 {SPI} +wvSelectSignal -win $_nWave2 {( "SPI" 2 )} +wvSelectGroup -win $_nWave2 {G2} +wvSelectGroup -win $_nWave2 {G2} +wvRenameGroup -win $_nWave2 {G2} {SYS} +wvSelectGroup -win $_nWave2 {SYS} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "clk" -line 217 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/clk" +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +srcSearchString "PI_async_rstn" -win $_nTrace1 -next -case +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/PI_async_rstn" +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.sclk" -line 209 -pos 1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvAddSignal -win $_nWave2 "/TB/spi_bus/sclk" +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSelectSignal -win $_nWave2 {( "SYS" 3 )} wvCut -win $_nWave2 wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 2)} srcDeselectAll -win $_nTrace1 -srcSelect -signal "wave_data_out" -line 52 -pos 1 -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -signal "wave_data_valid" -line 53 -pos 1 -win $_nTrace1 -srcHBSelect "TB.spi_bus" -win $_nTrace1 -srcHBSelect "TB.clk_inst" -win $_nTrace1 -srcHBSelect "TB.clk_40g_inst" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top" -delim "." -srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.U_DEM_PhaseSync_4008" -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -signal "LSB_OUT" -line 25 -pos 1 -win $_nTrace1 -srcSelect -signal "MSB_OUT" -line 24 -pos 1 -win $_nTrace1 -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/LSB_OUT\[63:0\]" \ - "/TB/U_da4008_chip_top/MSB_OUT\[63:0\]" +srcSelect -signal "rst_n" -line 214 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SYS" 2)} wvSetPosition -win $_nWave2 {("G3" 0)} -wvSetPosition -win $_nWave2 {("G3" 2)} -wvSetPosition -win $_nWave2 {("G3" 2)} -wvZoomOut -win $_nWave2 -wvSelectSignal -win $_nWave2 {( "G3" 1 2 )} -wvSetRadix -win $_nWave2 -format UDec +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvAddSignal -win $_nWave2 "/TB/rst_n" +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSelectSignal -win $_nWave2 {( "SYS" 2 )} +wvSelectSignal -win $_nWave2 {( "SYS" 3 )} +wvCut -win $_nWave2 +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +srcSearchString "PI_sync_in" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {215 215 4 5 1 1} srcDeselectAll -win $_nTrace1 +srcSelect -signal "sync_out" -line 216 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PI_sync_in" -line 215 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/PI_sync_in" +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PO_sync_out" -line 216 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/PO_sync_out" +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "PO_irq" -line 213 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvScrollDown -win $_nWave2 0 +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/PO_irq" +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("SYS" 5)} +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvSetCursor -win $_nWave2 28824292.042648 -snap {("SYS" 4)} +wvScrollDown -win $_nWave2 0 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 wvZoomIn -win $_nWave2 wvZoomIn -win $_nWave2 wvZoomIn -win $_nWave2 @@ -259,201 +166,789 @@ wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvSetCursor -win $_nWave2 56840696.020036 -snap {("SYS" 5)} +wvSetCursor -win $_nWave2 119740552.529517 -snap {("SYS" 4)} +wvSetCursor -win $_nWave2 104159854.128086 -snap {("SYS" 4)} +wvSetCursor -win $_nWave2 84539715.400358 -snap {("SYS" 5)} +wvSetCursor -win $_nWave2 87713561.371020 -snap {("SYS" 5)} +wvSetCursor -win $_nWave2 171964745.319499 -snap {("SYS" 4)} +wvSetCursor -win $_nWave2 234287538.925224 -snap {("SYS" 5)} +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 217 -pos 3 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("SYS" 5)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/lvds_data\[3:0\]" +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("G3" 1)} +wvSetPosition -win $_nWave2 {("G3" 1)} +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 218 -pos 3 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("SYS" 5)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("G3" 1)} +wvSetPosition -win $_nWave2 {("G4" 0)} +wvSetPosition -win $_nWave2 {("G3" 1)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/lvds_valid\[0:0\]" +wvSetPosition -win $_nWave2 {("G3" 1)} +wvSetPosition -win $_nWave2 {("G3" 2)} +wvSelectSignal -win $_nWave2 {( "G3" 1 )} +wvSelectSignal -win $_nWave2 {( "G3" 1 )} wvZoomOut -win $_nWave2 wvSelectSignal -win $_nWave2 {( "G3" 2 )} srcDeselectAll -win $_nTrace1 -srcSearchString "wave sram" -win $_nTrace1 -prev -case -srcSearchString "wave sram" -win $_nTrace1 -prev -case -srcSearchString "wave sram" -win $_nTrace1 -next -case -srcSearchString "wave sram" -win $_nTrace1 -next -case -srcSearchString "wave sram" -win $_nTrace1 -next -case -srcSearchString "wave sram" -win $_nTrace1 -next -case +srcSelect -word -line 219 -pos 3 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("SYS" 5)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("G3" 1)} +wvSetPosition -win $_nWave2 {("G3" 2)} +wvSetPosition -win $_nWave2 {("G4" 0)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("G4" 0)} +wvSetPosition -win $_nWave2 {("G3" 2)} +wvSetPosition -win $_nWave2 {("G3" 1)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/lvds_clk\[0:0\]" +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("G3" 1)} +srcSearchString "phase_tap" -win $_nTrace1 -prev -case +srcSearchString "phase_tap" -win $_nTrace1 -next -case +srcSearchString "phase_tap" -win $_nTrace1 -next -case +srcSearchString "phase_tap" -win $_nTrace1 -next -case +srcSearchString "phase_tap" -win $_nTrace1 -next -case +srcSearchString "phase_tap" -win $_nTrace1 -prev -case +srcSearchString "phase_tap" -win $_nTrace1 -next -case +srcSearchString "phase_" -win $_nTrace1 -next -case +srcSearchString "p" -win $_nTrace1 -next -case +srcSearchString "p" -win $_nTrace1 -next -case +srcSearchString "pH" -win $_nTrace1 -next -case +wvSelectGroup -win $_nWave2 {G3} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSelectGroup -win $_nWave2 {G3} +wvScrollDown -win $_nWave2 0 +wvRenameGroup -win $_nWave2 {G3} {LVDS} +wvSelectSignal -win $_nWave2 {( "LVDS" 1 )} +wvScrollDown -win $_nWave2 3 +wvSelectGroup -win $_nWave2 {G4} +wvScrollUp -win $_nWave2 4 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvSelectSignal -win $_nWave2 {( "SYS" 5 )} +wvScrollDown -win $_nWave2 1 +wvSelectGroup -win $_nWave2 {LVDS} +wvCollapseGroup -win $_nWave2 "LVDS" +wvSelectSignal -win $_nWave2 {( "SYS" 4 )} +wvScrollDown -win $_nWave2 0 +wvSelectGroup -win $_nWave2 {LVDS} +wvScrollDown -win $_nWave2 3 +wvScrollDown -win $_nWave2 0 +wvSelectGroup -win $_nWave2 {G4} +wvSelectGroup -win $_nWave2 {G4} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "MSB_OUT" -line 221 -pos 1 -win $_nTrace1 +srcSelect -signal "LSB_OUT" -line 222 -pos 1 -win $_nTrace1 +srcSelect -signal "MSB_DUM" -line 223 -pos 1 -win $_nTrace1 +srcSelect -signal "DEM_VLD" -line 224 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SYS" 2)} +wvSetPosition -win $_nWave2 {("SYS" 1)} +wvSetPosition -win $_nWave2 {("SYS" 0)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvRenameGroup -win $_nWave2 {G4} {DAC} +wvSetPosition -win $_nWave2 {("SYS" 4)} +wvSetPosition -win $_nWave2 {("SYS" 5)} +wvSetPosition -win $_nWave2 {("LVDS" 0)} +wvSetPosition -win $_nWave2 {("LVDS" 1)} +wvSetPosition -win $_nWave2 {("LVDS" 2)} +wvSetPosition -win $_nWave2 {("LVDS" 3)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/MSB_OUT\[63:0\]" \ + "/TB/U_da4008_chip_top/LSB_OUT\[63:0\]" \ + "/TB/U_da4008_chip_top/MSB_DUM\[63:0\]" \ + "/TB/U_da4008_chip_top/DEM_VLD" +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("DAC" 4)} +wvSetPosition -win $_nWave2 {("DAC" 4)} +wvSetCursor -win $_nWave2 53666850.049374 -snap {("DAC" 2)} +wvSelectGroup -win $_nWave2 {DAC} +wvScrollDown -win $_nWave2 1 +wvSelectSignal -win $_nWave2 {( "DAC" 4 )} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 0 +wvSelectSignal -win $_nWave2 {( "DAC" 1 )} +wvSelectSignal -win $_nWave2 {( "DAC" 2 )} +wvSetCursor -win $_nWave2 134455656.575313 -snap {("DAC" 4)} +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollUp -win $_nWave2 2 +wvSetMarker -win $_nWave2 134469888.000000 +wvSetMarker -win $_nWave2 134469888.000000 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 125696870.125224 145979774.168157 +wvZoom -win $_nWave2 133691503.143912 135675042.954908 +wvZoom -win $_nWave2 134390532.379618 134573864.920288 +wvSetMarker -win $_nWave2 134466048.000000 +wvSetCursor -win $_nWave2 134466620.303456 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134467385.555564 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134463122.008106 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134454922.878381 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134434370.393201 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134464871.155781 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 134465089.799241 -snap {("DAC" 1)} +wvScrollDown -win $_nWave2 1 +wvCenterMarker -win $_nWave2 +wvCenterCursor -win $_nWave2 +wvCenterMarker -win $_nWave2 +wvSetCursor -win $_nWave2 134464244.191396 -snap {("LVDS" 1)} +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 2 +wvScrollUp -win $_nWave2 3 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 2 +wvSelectSignal -win $_nWave2 {( "SYS" 4 )} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvCollapseGroup -win $_nWave2 "SYS" +wvCollapseGroup -win $_nWave2 "LVDS" +wvScrollUp -win $_nWave2 3 +wvSelectSignal -win $_nWave2 {( "SPI" 1 )} +wvSelectSignal -win $_nWave2 {( "SPI" 2 )} +wvSelectSignal -win $_nWave2 {( "SPI" 3 )} +wvSelectSignal -win $_nWave2 {( "SPI" 4 )} +wvSelectSignal -win $_nWave2 {( "SPI" 3 )} +wvSetCursor -win $_nWave2 6347691.941324 -snap {("SPI" 3)} +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 3462377.422540 -snap {("SPI" 3)} +wvSetCursor -win $_nWave2 5482097.585689 -snap {("SPI" 3)} +wvZoom -win $_nWave2 3750908.874419 15580698.401431 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 211 -pos 1 +srcAction -pos 210 7 10 -win $_nTrace1 -name "spi_bus.mosi" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcAction -pos 74 1 9 -win $_nTrace1 -name "spi_bus.mosi" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDumpAU -win $_nTrace1 -file +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcAction -pos 74 1 10 -win $_nTrace1 -name "spi_bus.mosi" -ctrlKey off +srcDumpAU -win $_nTrace1 -file +srcAction -pos 74 2 0 -win $_nTrace1 -name " " -ctrlKey off +srcAction -pos 74 2 0 -win $_nTrace1 -name " " -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -range {75 75 2 3 9 1} -backward +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.csn" -line 76 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.csn" -line 76 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 76 -pos 1 -win $_nTrace1 +srcAction -pos 76 1 1 -win $_nTrace1 -name "vif" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.csn" -line 76 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 76 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.sclk" -line 74 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.sclk" -line 74 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcAction -pos 74 1 7 -win $_nTrace1 -name "spi_bus.mosi" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 75 -pos 1 +srcSearchString "spi_bus.mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 8 9 1 1} +nsMsgSwitchTab -tab general +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 8 9 1 1} +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcSearchString "spi_bus.mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 8 9 1 1} +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -next -case +srcSearchString "spi_bus.mosi" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {211 211 8 9 1 1} +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 211 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 211 -pos 1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -signal "spi_bus.mosi" -line 211 -pos 1 +srcAction -pos 210 7 5 -win $_nTrace1 -name "spi_bus.mosi" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -all -win $_nTrace1 +srcSelect -win $_nTrace1 -range {1 390 1 2 1 1} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -win $_nTrace1 -range {14 24 1 1 1 1} -backward +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcAction -pos 80 2 1 -win $_nTrace1 -name "my_drv" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 80 2 3 -win $_nTrace1 -name "my_drv" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 80 0 8 -win $_nTrace1 -name "spi_driver" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcAction -pos 80 2 2 -win $_nTrace1 -name "my_drv" -ctrlKey off +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcAction -pos 94 5 6 -win $_nTrace1 -name "CONFIG_FILE" -ctrlKey off +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {131 131 2 2 1 7} +nsMsgSwitchTab -tab general +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 131 -pos 1 -win $_nTrace1 +srcAction -pos 130 3 4 -win $_nTrace1 -name "file_path" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcSelect -signal "file_path" -line 131 -pos 1 -win $_nTrace1 +srcAction -pos 130 3 4 -win $_nTrace1 -name "file_path" -ctrlKey off +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {131 131 2 2 1 7} +nsMsgSwitchTab -tab general +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 95 -pos 5 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 95 -pos 5 -win $_nTrace1 +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {91 91 6 7 6 1} +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -next -case +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {78 78 2 3 6 1} +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {77 77 2 3 1 1} +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {68 68 5 6 6 1} +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {65 65 5 6 1 1} +srcSearchString "vif" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {96 96 6 7 1 1} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 93 1 3 -win $_nTrace1 -name "my_drv" -ctrlKey off +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {81 81 3 4 1 1} +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {131 131 2 2 1 7} +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {120 120 2 2 1 7} +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {108 108 2 2 1 7} +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {96 96 2 2 1 7} +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {95 95 2 2 1 7} +srcSearchString "my_drv" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {94 94 2 3 1 1} +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "CONFIG_FILE" -line 95 -pos 1 -win $_nTrace1 +srcAction -pos 94 5 5 -win $_nTrace1 -name "CONFIG_FILE" -ctrlKey off +srcSearchString "CONFIG_FILE" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcAction -pos 39 8 15 -win $_nTrace1 -name "\"../../case_temp.txt\"" -ctrlKey \ + off +srcHBSelect "TB.spi_bus" -win $_nTrace1 +srcHBSelect "TB.spi_bus" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.spi_bus" -delim "." +srcHBSelect "TB.spi_bus" -win $_nTrace1 +srcHBSelect "TB.clk_inst" -win $_nTrace1 +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcSearchString "spi_dre" -win $_nTrace1 -next -case +srcSearchString "spi_dr" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcAction -pos 80 0 7 -win $_nTrace1 -name "spi_driver" -ctrlKey off +srcSearchString "spi_driver" -win $_nTrace1 -next -case +srcSearchString "spi_driver" -win $_nTrace1 -next -case +srcSearchString "spi_dri" -win $_nTrace1 -next -case +srcSearchString "spi_dri" -win $_nTrace1 -next -case +srcSearchString "spi_dri" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 2 -pos 3 -win $_nTrace1 +srcAction -pos 2 3 17 -win $_nTrace1 -name "\"../../model/SPI_DRIVER.sv\"" \ + -ctrlKey on +srcDeselectAll -win $_nTrace1 +srcSelect -word -line 2 -pos 3 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +wvSelectGroup -win $_nWave2 {SYS} +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "cs_wave" -line 381 -pos 1 -win $_nTrace1 +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {DAC} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvCollapseGroup -win $_nWave2 "DAC" +wvExpandGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {DAC} +wvScrollDown -win $_nWave2 3 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "cs_wave" -line 323 -pos 1 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 0)} +wvSetPosition -win $_nWave2 {("SPI" 1)} +wvSetPosition -win $_nWave2 {("SPI" 2)} +wvSetPosition -win $_nWave2 {("SPI" 3)} +wvSetPosition -win $_nWave2 {("SPI" 4)} +wvSetPosition -win $_nWave2 {("SYS" 3)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvSetPosition -win $_nWave2 {("DAC" 2)} +wvSetPosition -win $_nWave2 {("DAC" 3)} +wvSetPosition -win $_nWave2 {("DAC" 4)} +wvSetPosition -win $_nWave2 {("G5" 0)} +wvSetPosition -win $_nWave2 {("DAC" 4)} +wvSetPosition -win $_nWave2 {("DAC" 3)} +wvSetPosition -win $_nWave2 {("DAC" 2)} +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvAddSignal -win $_nWave2 "/TB/cs_wave\[7:0\]" +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 0 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 127819433.182111 138206565.449732 +wvZoom -win $_nWave2 134341586.001304 134923810.469495 +wvZoom -win $_nWave2 134391233.048975 134499553.880267 +wvZoom -win $_nWave2 134395754.490874 134414809.139193 +wvZoom -win $_nWave2 134397845.161814 134399344.991020 +wvSetCursor -win $_nWave2 134397936.385759 -snap {("DAC" 1)} +wvBusWaveform -win $_nWave2 -analog +wvSetPosition -win $_nWave2 {("DAC" 1)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 4 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 110556110.769231 157692437.066190 +wvZoom -win $_nWave2 131974047.941700 135318843.904335 +wvZoom -win $_nWave2 134008449.779438 134862100.746646 +wvZoom -win $_nWave2 134367319.148441 134503740.412133 +wvZoom -win $_nWave2 134391479.622650 134424100.330306 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollUp -win $_nWave2 4 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 4 +wvScrollUp -win $_nWave2 4 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 4 +wvScrollDown -win $_nWave2 1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 4 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvSetCursor -win $_nWave2 240923762.318426 -snap {("DAC" 1)} +wvSetCursor -win $_nWave2 133878593.671556 -snap {("DAC" 1)} +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 4 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 4 +wvScrollUp -win $_nWave2 6 +wvSetCursor -win $_nWave2 288531451.878354 -snap {("DAC" 1)} +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 4 +wvScrollUp -win $_nWave2 4 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvSetCursor -win $_nWave2 132724467.864043 -snap {("DAC" 0)} +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcSearchString "my_drv" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "start" -line 83 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out_r\[38\]\[7\]" -line 361 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out_r\[0 \]\[7\]" -line 323 -pos 1 -win $_nTrace1 +srcSearchString "data_out_r" -win $_nTrace1 -next -case +srcSearchString "data_out_r" -win $_nTrace1 -next -case +srcSearchString "data_out_r" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {323 323 14 14 1 11} +srcSearchString "data_out_r" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {323 323 12 12 1 11} +srcSearchString "data_out_r" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {290 290 2 3 1 1} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out" -line 290 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out" -line 290 -pos 1 -win $_nTrace1 +srcAction -pos 289 5 4 -win $_nTrace1 -name "data_out" -ctrlKey off +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out_r\[k\]" -line 42 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "data_out_r\[k\]" -line 42 -pos 1 -win $_nTrace1 +srcAction -pos 41 7 3 -win $_nTrace1 -name "data_out_r\[k\]" -ctrlKey off +srcDeselectAll -win $_nTrace1 +srcHBSelect "TB.U_DEM_Reverse_64CH.genblk1\[0\].U_DEM_Reverse" -win $_nTrace1 +srcHBSelect "TB.lvds_bus" -win $_nTrace1 srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top" -delim "." srcHBSelect "TB.U_da4008_chip_top" -win $_nTrace1 -srcSearchString "wave sram" -win $_nTrace1 -prev -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg" -win $_nTrace1 -next -case -srcSearchString "awg" -win $_nTrace1 -prev -case -srcSearchString "awg" -win $_nTrace1 -prev -case +srcHBSelect "TB.U_DEM_Reverse_64CH" -win $_nTrace1 +wvSelectGroup -win $_nWave2 {DAC} +wvSetPosition -win $_nWave2 {("DAC" 0)} +wvCollapseGroup -win $_nWave2 "DAC" +wvExpandGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {DAC} +wvScrollDown -win $_nWave2 3 +wvExpandGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {DAC} +wvCollapseGroup -win $_nWave2 "LVDS" +wvSelectGroup -win $_nWave2 {DAC} +wvScrollUp -win $_nWave2 3 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 srcDeselectAll -win $_nTrace1 -srcSelect -signal "PI_mosi" -line 8 -pos 1 -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.DEM_VLD_dffr" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.U_DEM_PhaseSync_4008" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.U_iopad" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcSetScope -win $_nTrace1 "TB.U_da4008_chip_top.digital_top" -delim "." -srcHBSelect "TB.U_da4008_chip_top.digital_top" -win $_nTrace1 -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -next -case -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {381 381 1 1 4 11} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 3 4 3 1} -nsMsgSwitchTab -tab general -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 1 2 1 1} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {381 381 1 1 4 11} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 3 4 3 1} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 1 2 1 1} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {381 381 1 1 4 11} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 3 4 3 1} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {388 388 1 2 1 1} -srcSearchString "awg_top" -win $_nTrace1 -prev -case -srcSelect -win $_nTrace1 -range {381 381 1 1 4 11} -wvSelectGroup -win $_nWave2 {G3} -wvCut -win $_nWave2 -wvSetPosition -win $_nWave2 {("G2" 0)} -wvSelectGroup -win $_nWave2 {G2} -wvSelectGroup -win $_nWave2 {G2} -srcDeselectAll -win $_nTrace1 -srcSelect -signal "awg_busy" -line 411 -pos 1 -win $_nTrace1 -srcSelect -win $_nTrace1 -range {389 411 7 8 2 5} -backward -srcDeselectAll -win $_nTrace1 -srcSelect -signal "sync_pulse" -line 391 -pos 1 -win $_nTrace1 -srcDeselectAll -win $_nTrace1 -srcSelect -signal "clk" -line 389 -pos 2 -win $_nTrace1 -srcSelect -signal "ch0_rstn_o" -line 390 -pos 1 -win $_nTrace1 -srcSelect -signal "sync_pulse" -line 391 -pos 1 -win $_nTrace1 -srcSelect -signal "wave_awrdata" -line 392 -pos 2 -win $_nTrace1 -srcSelect -signal "wave_awren" -line 393 -pos 2 -win $_nTrace1 -srcSelect -signal "wave_arwaddr" -line 394 -pos 2 -win $_nTrace1 -srcSelect -signal "wave_awrmask" -line 395 -pos 2 -win $_nTrace1 -srcSelect -win $_nTrace1 -signal "slv\[2\].din" -line 396 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[2\].wren" -line 397 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[2\].addr\[18:0\]" -line 398 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[2\].rden" -line 399 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[2\].dout" -line 400 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].din" -line 401 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].wren" -line 402 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].wren" -line 402 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].addr\[7 :0\]" -line 403 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].wren" -line 402 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].rden" -line 404 -pos 1 -srcSelect -win $_nTrace1 -signal "slv\[1\].dout" -line 405 -pos 1 -srcSelect -signal "wave_data_out_bank" -line 406 -pos 1 -win $_nTrace1 -srcSelect -signal "awg_data_valid" -line 407 -pos 1 -win $_nTrace1 -srcSelect -signal "cmd_fifo_empty" -line 408 -pos 2 -win $_nTrace1 -srcSelect -signal "cmd_fifo_full" -line 409 -pos 2 -win $_nTrace1 -srcSelect -signal "awg_status" -line 410 -pos 1 -win $_nTrace1 -srcSelect -signal "awg_busy" -line 411 -pos 1 -win $_nTrace1 -wvAddSignal -win $_nWave2 "/TB/U_da4008_chip_top/digital_top/clk" \ - "/TB/U_da4008_chip_top/digital_top/ch0_rstn_o" \ - "/TB/U_da4008_chip_top/digital_top/sync_pulse" \ - "/TB/U_da4008_chip_top/digital_top/wave_awrdata\[511:0\]" \ - "/TB/U_da4008_chip_top/digital_top/wave_awren\[0:0\]" \ - "/TB/U_da4008_chip_top/digital_top/wave_arwaddr\[12:0\]" \ - "/TB/U_da4008_chip_top/digital_top/wave_awrmask\[63:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/addr\[18:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[2\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/din\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/addr\[7:0\]" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/wren" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/rden" \ - "/TB/U_da4008_chip_top/digital_top/slv\[1\]/dout\[31:0\]" \ - "/TB/U_da4008_chip_top/digital_top/wave_data_out_bank\[511:0\]" \ - "/TB/U_da4008_chip_top/digital_top/awg_data_valid" \ - "/TB/U_da4008_chip_top/digital_top/cmd_fifo_empty" \ - "/TB/U_da4008_chip_top/digital_top/cmd_fifo_full" \ - "/TB/U_da4008_chip_top/digital_top/awg_status\[2:0\]" \ - "/TB/U_da4008_chip_top/digital_top/awg_busy" -wvSetPosition -win $_nWave2 {("G2" 0)} -wvSetPosition -win $_nWave2 {("G2" 23)} -wvSetPosition -win $_nWave2 {("G2" 23)} -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollDown -win $_nWave2 0 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 +srcSelect -signal "csn" -line 82 -pos 1 -win $_nTrace1 +wvCollapseGroup -win $_nWave2 "SPI" +wvSelectGroup -win $_nWave2 {DAC} +wvExpandGroup -win $_nWave2 "SPI" +wvSelectGroup -win $_nWave2 {DAC} wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 6 +wvScrollDown -win $_nWave2 4 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 0 wvScrollDown -win $_nWave2 0 wvScrollDown -win $_nWave2 0 -wvScrollDown -win $_nWave2 0 -wvScrollDown -win $_nWave2 0 -wvScrollDown -win $_nWave2 0 -wvSetCursor -win $_nWave2 135609782.382826 -snap {("G2" 22)} -wvSelectSignal -win $_nWave2 {( "G2" 21 )} -wvSelectSignal -win $_nWave2 {( "G2" 22 )} -wvSelectSignal -win $_nWave2 {( "G2" 20 )} -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 wvScrollUp -win $_nWave2 1 wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvZoomOut -win $_nWave2 -wvSelectSignal -win $_nWave2 {( "G2" 8 )} -wvSelectSignal -win $_nWave2 {( "G2" 7 )} -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollUp -win $_nWave2 1 -wvScrollDown -win $_nWave2 0 -wvScrollDown -win $_nWave2 0 wvScrollDown -win $_nWave2 1 wvScrollDown -win $_nWave2 1 -wvScrollDown -win $_nWave2 1 -wvSelectSignal -win $_nWave2 {( "G2" 12 )} +wvScrollDown -win $_nWave2 0 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 4 +wvZoom -win $_nWave2 113681392.040072 142246005.776029 +wvZoom -win $_nWave2 132315671.960773 135449773.885291 +wvZoom -win $_nWave2 134317236.159363 134500385.824600 +wvScrollUp -win $_nWave2 6 +wvScrollUp -win $_nWave2 2 +wvSelectGroup -win $_nWave2 {LVDS} +wvCollapseGroup -win $_nWave2 "DAC" +wvSelectGroup -win $_nWave2 {LVDS} +wvSelectGroup -win $_nWave2 {DAC} +wvSelectGroup -win $_nWave2 {LVDS} +wvScrollUp -win $_nWave2 1 +wvSelectGroup -win $_nWave2 {SPI} +wvSelectGroup -win $_nWave2 {LVDS} wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 -wvZoomIn -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 157249641.273703 -snap {("LVDS" 2)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "LVDS" 2 )} +wvZoom -win $_nWave2 126953838.826476 143977194.487299 +wvZoom -win $_nWave2 132506477.792691 136120261.105305 +wvZoom -win $_nWave2 133933027.913620 134540712.406260 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSaveSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/my_signal.rc" debExit diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus.log b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus.log index 8e7c22f..f871c64 100644 --- a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus.log +++ b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus.log @@ -1,2 +1,2 @@ File Name Time -./verdplus_000.fsdb 0 to 479,076,480 +./verdplus_000.fsdb 0 to 509,079,552 diff --git a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb index d8a5882..1c20fc2 100644 Binary files a/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb and b/DA4008_V1.2/sim/chip_top/work_RTL/sine_1g/verdplus_000.fsdb differ diff --git a/DA4008_V1.2/sim/lvds/compile.log b/DA4008_V1.2/sim/lvds/compile.log new file mode 100644 index 0000000..f2908d6 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/compile.log @@ -0,0 +1,21 @@ +Command: vcs -full64 -j8 -sverilog +lint=TFIPC-L +v2k -debug_access+pp -lca -q -timescale=1ns/1ps \ ++nospecify -l compile.log -cm line+cond+fsm+tgl+branch -cm_dir ./coverage/simv.vdb \ +-f filelist_vlg.f +incdir+./../../rtl/define +incdir+./../../rtl/qubitmcu +incdir+./../../model \ + + +Warning-[LCA_FEATURES_ENABLED] Usage warning + LCA features enabled by '-lca' argument on the command line. For more + information regarding list of LCA features please refer to Chapter "LCA + features" in the VCS/VCS-MX Release Notes + +VCS Coverage Metrics Release O-2018.09-SP2_Full64 Copyright (c) 1991-2018 by Synopsys Inc. + +Note-[VCS_PARAL] Parallel code-gen enabled + VCS is running with parallel code generation(-j)... + +13 modules and 0 UDP read. +make[1]: Entering directory `/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/csrc' \ + +../simv up to date +make[1]: Leaving directory `/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/csrc' \ + diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.cmoptions b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.cmoptions new file mode 100644 index 0000000..aa3c928 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.cmoptions @@ -0,0 +1,16 @@ +Instrument +cond 3 +line 3 +fsm 65539 +tgl 8 +assign 0 +obc 0 +path 0 +branch 3 +Count 0 +Glitch -1 +cm_tglmda 0 +cm_tglstructarr 0 +cm_tglcount 0 +cm_hier 0 +cm_assert_hier 0 \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.mode64 b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.mode64 new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.vdb_version b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.vdb_version new file mode 100644 index 0000000..7239f16 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/.vdb_version @@ -0,0 +1 @@ +O-2018.09-SP2 \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml new file mode 100644 index 0000000..4a5cb04 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/dve_debug.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/verilog.instance_parameters.txt b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/verilog.instance_parameters.txt new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/verilog.sourceinfo.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/verilog.sourceinfo.xml new file mode 100644 index 0000000..2b074a4 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/auxiliary/verilog.sourceinfo.xml @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml new file mode 100644 index 0000000..d555666 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/design/verilog.design.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml new file mode 100644 index 0000000..e4daf9a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/branch.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.exclude.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.exclude.xml new file mode 100644 index 0000000..871fb0a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.exclude.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml new file mode 100644 index 0000000..4419c10 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/cond.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.exclude.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.exclude.xml new file mode 100644 index 0000000..871fb0a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.exclude.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt new file mode 100644 index 0000000..0f7f407 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.generated_config.txt @@ -0,0 +1,103 @@ +// Synopsys, Inc. +// User: shbyang +// Date: Fri Mar 13 18:07:26 2026 + +// ================================================================================================== +// This config file prototype is produced from the last run using the complete list of extracted fsms. +// Please note that by providing your own description of the module you are enforcing what will be +// extracted for that module. +// Copy this file to your source directory and edit it as described below, +// then pass the file to VCS using the -cm_fsmcfg command line option. +// FSMs will be extracted normally for any module not mentioned in this file +// ================================================================================================== +// 1. For every module that you want to specify yourself, use: +// MODULE==name +// ----------------------------------------------------- +// The following options are defining the behavior on the module level. +// ----------------------------------------------------- +// 1.1 You can control what fsms should be used within this module: +// FSMS=AUTO +// this means that you want VCS to automatically extract all +// detectable FSMs from this module. +// ----------------------------------------------------- +// FSMS=EXCLUDE +// this means that you want all fsms except the ones from the list that follows +// if the list is empty, all fsms will be extracted for this module +// ----------------------------------------------------- +// FSMS=RESTRICT +// this means that you want only the fsms from the list that follows +// if the list is empty, no fsms will be extracted for this module +// ----------------------------------------------------- +// If none of these options are specified, the program will assume FSMS=RESTRICT +// ----------------------------------------------------- +// 1.2 You can specify that the state with the minimal value should be used as a +// start state for all sequences in every fsm in the module. +// FSMS=START_STATE_DFLT +// For any particular fsm you can overwrite this behavior inside its description. +// ----------------------------------------------------- +// 2. Each fsm description in the list of fsms should be specified as follows: +// 2.1 provide the current state variable declaration: +// CURRENT= name of the current state variable +// ----------------------------------------------------- +// 2.2 if next state variable is different from the current state provide: +// NEXT= next state variable +// if you don't use NEXT=, the program will assume that CURRENT and NEXT are the same +// ----------------------------------------------------- +// 2.3 if you want to provide the restrictive the list of states, provide: +// STATES= s0,s1 etc. where s0 is either a name or a value of the state +// if you don't use STATES=, the program will assume that you want to use all states +// ----------------------------------------------------- +// 2.4 if you want to ignore some states, specify them in the following list: +// STATES_X= s0,s1, etc. +// ----------------------------------------------------- +// 2.5 if you want to mark, that some states should never be reached, specify them as a list: +// STATES_NEVER= s0,s1, etc. +// ----------------------------------------------------- +// 2.6 similar to the STATES, if you want to provide the restrictive the list of transitions, specify: +// TRANSITIONS= s0->s1,s1->s2, etc. +// ----------------------------------------------------- +// 2.7 similar to the STATES_X, if you want to ignore some transitions, specify them in the following list: +// TRANSITIONS_X= s0->s1,s1->s2, etc. +// ----------------------------------------------------- +// 2.8 similar to the STATES_NEVER,if you want to mark, that some transitions should never occur, +// specify them as a list: +// TRANSITIONS_NEVER= s0->s1,s1->s2, etc. +// ----------------------------------------------------- +// 2.9 if you want to specify the start state use: +// START_STATE= s0 +// ----------------------------------------------------- +// Please note: +// - that a state in every list can be specified either by name or by value. +// - in specifying the transitions you can use * in order to refer to 'any' state. +// ================================================================================================== +// Uncomment and modify the following 2 line to override default FSM sequence limits for all FSMs in the design. +//SEQ_NUMBER_MAX=10000 +//SEQ_LENGTH_MAX=32 + +MODULE=ulink_rx_train +CURRENT=state_c +NEXT=qout +STATES=SM_DOWN,SM_EXIT,SM_MATCH,SM_READY +TRANSITIONS=SM_DOWN->SM_MATCH, +SM_EXIT->SM_DOWN, +SM_EXIT->SM_READY, +SM_MATCH->SM_DOWN, +SM_MATCH->SM_EXIT, +SM_READY->SM_DOWN +MODULE=ulink_frame_receiver +CURRENT=word_state_c +NEXT=qout +STATES=S_IDLE,S_WORD0,S_WORD1,S_WORD2,S_WORD3 +TRANSITIONS=S_IDLE->S_WORD0, +S_WORD0->S_WORD1, +S_WORD1->S_WORD2, +S_WORD2->S_WORD3, +S_WORD3->S_IDLE +MODULE=ulink_frame_receiver +CURRENT=state_c +NEXT=qout +STATES=ST_CRC,ST_DATA,ST_HEAD,ST_IDLE +TRANSITIONS=ST_CRC->ST_IDLE, +ST_DATA->ST_CRC, +ST_HEAD->ST_DATA, +ST_IDLE->ST_HEAD diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.shape.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.shape.xml new file mode 100644 index 0000000..163cce5 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/fsm.verilog.shape.xml @@ -0,0 +1,66 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.exclude.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.exclude.xml new file mode 100644 index 0000000..871fb0a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.exclude.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml new file mode 100644 index 0000000..123f298 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/line.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml new file mode 100644 index 0000000..9b204f3 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/coverage/simv.vdb/snps/coverage/db/shape/tgl.verilog.shape.xml differ diff --git a/DA4008_V1.2/sim/lvds/csrc/Makefile b/DA4008_V1.2/sim/lvds/csrc/Makefile new file mode 100644 index 0000000..9f5afa1 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/Makefile @@ -0,0 +1,116 @@ +# Makefile generated by VCS to build your model +# This file may be modified; VCS will not overwrite it unless -Mupdate is used + +# define default verilog source directory +VSRC=.. + +# Override TARGET_ARCH +TARGET_ARCH= + +# Choose name of executable +PRODUCTBASE=$(VSRC)/simv + +PRODUCT=$(PRODUCTBASE) + +# Product timestamp file. If product is newer than this one, +# we will also re-link the product. +PRODUCT_TIMESTAMP=product_timestamp + +# Path to runtime library +DEPLIBS= +VCSUCLI=-lvcsucli +RUNTIME=-lvcsnew -lsimprofile -lreader_common /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libBA.a -luclinative /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_tls.o $(DEPLIBS) + +VCS_SAVE_RESTORE_OBJ=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_save_restore_new.o + +# Select your favorite compiler + +# Linux: +VCS_CC=gcc + +# Internal CC for gen_c flow: +CC_CG=gcc +# User overrode default CC: +VCS_CC=gcc +# Loader +LD=g++ + +# Strip Flags for target product +STRIPFLAGS= + +PRE_LDFLAGS= # Loader Flags +LDFLAGS= -rdynamic -Wl,-rpath=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib -L/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib +# Picarchive Flags +PICLDFLAGS=-Wl,-rpath-link=./ -Wl,-rpath='$$ORIGIN'/simv.daidir/ -Wl,-rpath=./simv.daidir/ -Wl,-rpath='$$ORIGIN'/simv.daidir//scsim.db.dir + +# C run time startup +CRT0= +# C run time startup +CRTN= +# Machine specific libraries +SYSLIBS=/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/pli.a -ldl -lc -lm -lpthread -ldl + +# Default defines +SHELL=/bin/sh + +VCSTMPSPECARG= +VCSTMPSPECENV= +# NOTE: if you have little space in $TMPDIR, but plenty in /foo, +#and you are using gcc, uncomment the next line +#VCSTMPSPECENV=SNPS_VCS_TMPDIR=/foo + +TMPSPECARG=$(VCSTMPSPECARG) +TMPSPECENV=$(VCSTMPSPECENV) +CC=$(TMPSPECENV) $(VCS_CC) $(TMPSPECARG) + +# C flags for compilation +CFLAGS=-w -pipe -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include + +CFLAGS_O0=-w -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include -O0 -fno-strict-aliasing + +CFLAGS_CG=-w -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include -O -fno-strict-aliasing + +LD_PARTIAL_LOADER=ld +# Partial linking +LD_PARTIAL=$(LD_PARTIAL_LOADER) -r -o +ASFLAGS= +LIBS=-lzerosoft_rt_stubs -lvirsim -lerrorinf -lsnpsmalloc -lvfs +# Note: if make gives you errors about include, either get gmake, or +# replace the following line with the contents of the file filelist, +# EACH TIME IT CHANGES +# included file defines OBJS, and is automatically generated by vcs +include filelist + +OBJS=$(VLOG_OBJS) $(SYSC_OBJS) $(VHDL_OBJS) + +product : $(PRODUCT_TIMESTAMP) + @echo $(PRODUCT) up to date + +objects : $(OBJS) $(DPI_STUB_OBJS) $(PLI_STUB_OBJS) + +clean : + rm -f $(VCS_OBJS) $(CU_OBJS) + +clobber : clean + rm -f $(PRODUCT) $(PRODUCT_TIMESTAMP) + +picclean : + @rm -f _csrc*.so pre_vcsobj_*.so share_vcsobj_*.so + @rm -f $(PRODUCT).daidir/_[0-9]*_archive_*.so 2>/dev/null + +product_clean_order : + @$(MAKE) -f Makefile --no-print-directory picclean + @$(MAKE) -f Makefile --no-print-directory product_order + +product_order : $(PRODUCT) + +$(PRODUCT_TIMESTAMP) : product_clean_order + @-if [ -x $(PRODUCT) ]; then chmod -x $(PRODUCT); fi + @$(LD) $(CRT0) -o $(PRODUCT) $(PRE_LDFLAGS) $(STRIPFLAGS) $(PCLDFLAGS) $(PICLDFLAGS) $(LDFLAGS) $(OBJS) $(LIBS) $(RUNTIME) -Wl,-whole-archive $(VCSUCLI) -Wl,-no-whole-archive $(LINK_TB) $(DPI_STUB_OBJS) $(PLI_STUB_OBJS) $(VCS_SAVE_RESTORE_OBJ) $(SYSLIBS) $(CRTN) + @rm -f csrc[0-9]*.o + @touch $(PRODUCT_TIMESTAMP) + @-if [ -d ./objs ]; then find ./objs -type d -empty -delete; fi + +$(PRODUCT) : $(LD_VERSION_CHECK) $(OBJS) $(DOTLIBS) $(DPI_STUB_OBJS) $(PLI_STUB_OBJS) $(CMODLIB) /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvcsnew.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsimprofile.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libreader_common.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libBA.a /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libuclinative.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_tls.o /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvcsucli.so $(VCS_SAVE_RESTORE_OBJ) + @touch $(PRODUCT) + diff --git a/DA4008_V1.2/sim/lvds/csrc/Makefile.hsopt b/DA4008_V1.2/sim/lvds/csrc/Makefile.hsopt new file mode 100644 index 0000000..dcb7127 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/Makefile.hsopt @@ -0,0 +1,47 @@ +# Makefile generated by VCS to build rmapats.so for your model +VSRC=.. + +# Override TARGET_ARCH +TARGET_ARCH= + +# Select your favorite compiler + +# Linux: +VCS_CC=gcc + +# Internal CC for gen_c flow: +CC_CG=gcc + +# User overrode default CC: +VCS_CC=gcc +# Loader +LD=g++ +# Loader Flags +LDFLAGS= + +# Default defines +SHELL=/bin/sh + +VCSTMPSPECARG= +VCSTMPSPECENV= +# NOTE: if you have little space in $TMPDIR, but plenty in /foo, +#and you are using gcc, uncomment the next line +#VCSTMPSPECENV=SNPS_VCS_TMPDIR=/foo + +TMPSPECARG=$(VCSTMPSPECARG) +TMPSPECENV=$(VCSTMPSPECENV) +CC=$(TMPSPECENV) $(VCS_CC) $(TMPSPECARG) + +# C flags for compilation +CFLAGS=-w -pipe -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include + +CFLAGS_CG=-w -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include -O -fno-strict-aliasing + +ASFLAGS= +LIBS= + +include filelist.hsopt + + +rmapats.so: $(HSOPT_OBJS) + @$(VCS_CC) $(LDFLAGS) $(LIBS) -shared -o ./../simv.daidir/rmapats.so $(HSOPT_OBJS) diff --git a/DA4008_V1.2/sim/lvds/csrc/SIM_l.o b/DA4008_V1.2/sim/lvds/csrc/SIM_l.o new file mode 100644 index 0000000..8fd683e Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/SIM_l.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/_117681_archive_1.so b/DA4008_V1.2/sim/lvds/csrc/_117681_archive_1.so new file mode 120000 index 0000000..41df482 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/_117681_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_117681_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/csrc/_117699_archive_1.so b/DA4008_V1.2/sim/lvds/csrc/_117699_archive_1.so new file mode 120000 index 0000000..a113674 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/_117699_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_117699_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/csrc/_117700_archive_1.so b/DA4008_V1.2/sim/lvds/csrc/_117700_archive_1.so new file mode 120000 index 0000000..05f8372 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/_117700_archive_1.so @@ -0,0 +1 @@ +.//../simv.daidir//_117700_archive_1.so \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.c b/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.c new file mode 100644 index 0000000..e4d8eaa --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.c @@ -0,0 +1,964 @@ +#ifndef _GNU_SOURCE +#define _GNU_SOURCE +#endif +#include +#include + +#ifdef __cplusplus +extern "C" { +#endif + +extern void* VCS_dlsymLookup(const char *); +extern void vcsMsgReportNoSource1(const char *, const char*); + +/* PLI routine: $fsdbDumpvars:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpvars +#define __VCS_PLI_STUB_novas_call_fsdbDumpvars +extern void novas_call_fsdbDumpvars(int data, int reason); +#pragma weak novas_call_fsdbDumpvars +void novas_call_fsdbDumpvars(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpvars"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpvars"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpvars"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpvars)(int data, int reason) = novas_call_fsdbDumpvars; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpvars */ + +/* PLI routine: $fsdbDumpvars:misc */ +#ifndef __VCS_PLI_STUB_novas_misc +#define __VCS_PLI_STUB_novas_misc +extern void novas_misc(int data, int reason, int iparam ); +#pragma weak novas_misc +void novas_misc(int data, int reason, int iparam ) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason, int iparam ) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason, int iparam )) dlsym(RTLD_NEXT, "novas_misc"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason, int iparam )) VCS_dlsymLookup("novas_misc"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason, iparam ); + } +} +void (*__vcs_pli_dummy_reference_novas_misc)(int data, int reason, int iparam ) = novas_misc; +#endif /* __VCS_PLI_STUB_novas_misc */ + +/* PLI routine: $fsdbDumpvarsByFile:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpvarsByFile +#define __VCS_PLI_STUB_novas_call_fsdbDumpvarsByFile +extern void novas_call_fsdbDumpvarsByFile(int data, int reason); +#pragma weak novas_call_fsdbDumpvarsByFile +void novas_call_fsdbDumpvarsByFile(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpvarsByFile"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpvarsByFile"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpvarsByFile"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpvarsByFile)(int data, int reason) = novas_call_fsdbDumpvarsByFile; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpvarsByFile */ + +/* PLI routine: $fsdbAddRuntimeSignal:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbAddRuntimeSignal +#define __VCS_PLI_STUB_novas_call_fsdbAddRuntimeSignal +extern void novas_call_fsdbAddRuntimeSignal(int data, int reason); +#pragma weak novas_call_fsdbAddRuntimeSignal +void novas_call_fsdbAddRuntimeSignal(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbAddRuntimeSignal"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbAddRuntimeSignal"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbAddRuntimeSignal"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbAddRuntimeSignal)(int data, int reason) = novas_call_fsdbAddRuntimeSignal; +#endif /* __VCS_PLI_STUB_novas_call_fsdbAddRuntimeSignal */ + +/* PLI routine: $sps_create_transaction_stream:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_create_transaction_stream +#define __VCS_PLI_STUB_novas_call_sps_create_transaction_stream +extern void novas_call_sps_create_transaction_stream(int data, int reason); +#pragma weak novas_call_sps_create_transaction_stream +void novas_call_sps_create_transaction_stream(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_create_transaction_stream"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_create_transaction_stream"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_create_transaction_stream"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_create_transaction_stream)(int data, int reason) = novas_call_sps_create_transaction_stream; +#endif /* __VCS_PLI_STUB_novas_call_sps_create_transaction_stream */ + +/* PLI routine: $sps_begin_transaction:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_begin_transaction +#define __VCS_PLI_STUB_novas_call_sps_begin_transaction +extern void novas_call_sps_begin_transaction(int data, int reason); +#pragma weak novas_call_sps_begin_transaction +void novas_call_sps_begin_transaction(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_begin_transaction"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_begin_transaction"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_begin_transaction"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_begin_transaction)(int data, int reason) = novas_call_sps_begin_transaction; +#endif /* __VCS_PLI_STUB_novas_call_sps_begin_transaction */ + +/* PLI routine: $sps_end_transaction:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_end_transaction +#define __VCS_PLI_STUB_novas_call_sps_end_transaction +extern void novas_call_sps_end_transaction(int data, int reason); +#pragma weak novas_call_sps_end_transaction +void novas_call_sps_end_transaction(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_end_transaction"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_end_transaction"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_end_transaction"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_end_transaction)(int data, int reason) = novas_call_sps_end_transaction; +#endif /* __VCS_PLI_STUB_novas_call_sps_end_transaction */ + +/* PLI routine: $sps_free_transaction:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_free_transaction +#define __VCS_PLI_STUB_novas_call_sps_free_transaction +extern void novas_call_sps_free_transaction(int data, int reason); +#pragma weak novas_call_sps_free_transaction +void novas_call_sps_free_transaction(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_free_transaction"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_free_transaction"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_free_transaction"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_free_transaction)(int data, int reason) = novas_call_sps_free_transaction; +#endif /* __VCS_PLI_STUB_novas_call_sps_free_transaction */ + +/* PLI routine: $sps_add_attribute:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_add_attribute +#define __VCS_PLI_STUB_novas_call_sps_add_attribute +extern void novas_call_sps_add_attribute(int data, int reason); +#pragma weak novas_call_sps_add_attribute +void novas_call_sps_add_attribute(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_add_attribute"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_add_attribute"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_add_attribute"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_add_attribute)(int data, int reason) = novas_call_sps_add_attribute; +#endif /* __VCS_PLI_STUB_novas_call_sps_add_attribute */ + +/* PLI routine: $sps_update_label:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_update_label +#define __VCS_PLI_STUB_novas_call_sps_update_label +extern void novas_call_sps_update_label(int data, int reason); +#pragma weak novas_call_sps_update_label +void novas_call_sps_update_label(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_update_label"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_update_label"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_update_label"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_update_label)(int data, int reason) = novas_call_sps_update_label; +#endif /* __VCS_PLI_STUB_novas_call_sps_update_label */ + +/* PLI routine: $sps_add_relation:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_add_relation +#define __VCS_PLI_STUB_novas_call_sps_add_relation +extern void novas_call_sps_add_relation(int data, int reason); +#pragma weak novas_call_sps_add_relation +void novas_call_sps_add_relation(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_add_relation"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_add_relation"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_add_relation"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_add_relation)(int data, int reason) = novas_call_sps_add_relation; +#endif /* __VCS_PLI_STUB_novas_call_sps_add_relation */ + +/* PLI routine: $fsdbWhatif:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbWhatif +#define __VCS_PLI_STUB_novas_call_fsdbWhatif +extern void novas_call_fsdbWhatif(int data, int reason); +#pragma weak novas_call_fsdbWhatif +void novas_call_fsdbWhatif(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbWhatif"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbWhatif"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbWhatif"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbWhatif)(int data, int reason) = novas_call_fsdbWhatif; +#endif /* __VCS_PLI_STUB_novas_call_fsdbWhatif */ + +/* PLI routine: $paa_init:call */ +#ifndef __VCS_PLI_STUB_novas_call_paa_init +#define __VCS_PLI_STUB_novas_call_paa_init +extern void novas_call_paa_init(int data, int reason); +#pragma weak novas_call_paa_init +void novas_call_paa_init(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_paa_init"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_paa_init"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_paa_init"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_paa_init)(int data, int reason) = novas_call_paa_init; +#endif /* __VCS_PLI_STUB_novas_call_paa_init */ + +/* PLI routine: $paa_sync:call */ +#ifndef __VCS_PLI_STUB_novas_call_paa_sync +#define __VCS_PLI_STUB_novas_call_paa_sync +extern void novas_call_paa_sync(int data, int reason); +#pragma weak novas_call_paa_sync +void novas_call_paa_sync(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_paa_sync"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_paa_sync"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_paa_sync"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_paa_sync)(int data, int reason) = novas_call_paa_sync; +#endif /* __VCS_PLI_STUB_novas_call_paa_sync */ + +/* PLI routine: $fsdbDumpClassMethod:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpClassMethod +#define __VCS_PLI_STUB_novas_call_fsdbDumpClassMethod +extern void novas_call_fsdbDumpClassMethod(int data, int reason); +#pragma weak novas_call_fsdbDumpClassMethod +void novas_call_fsdbDumpClassMethod(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpClassMethod"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpClassMethod"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpClassMethod"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpClassMethod)(int data, int reason) = novas_call_fsdbDumpClassMethod; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpClassMethod */ + +/* PLI routine: $fsdbSuppressClassMethod:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbSuppressClassMethod +#define __VCS_PLI_STUB_novas_call_fsdbSuppressClassMethod +extern void novas_call_fsdbSuppressClassMethod(int data, int reason); +#pragma weak novas_call_fsdbSuppressClassMethod +void novas_call_fsdbSuppressClassMethod(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbSuppressClassMethod"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbSuppressClassMethod"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbSuppressClassMethod"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbSuppressClassMethod)(int data, int reason) = novas_call_fsdbSuppressClassMethod; +#endif /* __VCS_PLI_STUB_novas_call_fsdbSuppressClassMethod */ + +/* PLI routine: $fsdbSuppressClassProp:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbSuppressClassProp +#define __VCS_PLI_STUB_novas_call_fsdbSuppressClassProp +extern void novas_call_fsdbSuppressClassProp(int data, int reason); +#pragma weak novas_call_fsdbSuppressClassProp +void novas_call_fsdbSuppressClassProp(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbSuppressClassProp"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbSuppressClassProp"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbSuppressClassProp"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbSuppressClassProp)(int data, int reason) = novas_call_fsdbSuppressClassProp; +#endif /* __VCS_PLI_STUB_novas_call_fsdbSuppressClassProp */ + +/* PLI routine: $fsdbDumpMDAByFile:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpMDAByFile +#define __VCS_PLI_STUB_novas_call_fsdbDumpMDAByFile +extern void novas_call_fsdbDumpMDAByFile(int data, int reason); +#pragma weak novas_call_fsdbDumpMDAByFile +void novas_call_fsdbDumpMDAByFile(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpMDAByFile"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpMDAByFile"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpMDAByFile"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpMDAByFile)(int data, int reason) = novas_call_fsdbDumpMDAByFile; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpMDAByFile */ + +/* PLI routine: $fsdbTrans_create_stream_begin:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_begin +#define __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_begin +extern void novas_call_fsdbEvent_create_stream_begin(int data, int reason); +#pragma weak novas_call_fsdbEvent_create_stream_begin +void novas_call_fsdbEvent_create_stream_begin(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_create_stream_begin"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_create_stream_begin"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_create_stream_begin"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_create_stream_begin)(int data, int reason) = novas_call_fsdbEvent_create_stream_begin; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_begin */ + +/* PLI routine: $fsdbTrans_define_attribute:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_add_stream_attribute +#define __VCS_PLI_STUB_novas_call_fsdbEvent_add_stream_attribute +extern void novas_call_fsdbEvent_add_stream_attribute(int data, int reason); +#pragma weak novas_call_fsdbEvent_add_stream_attribute +void novas_call_fsdbEvent_add_stream_attribute(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_add_stream_attribute"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_add_stream_attribute"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_add_stream_attribute"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_add_stream_attribute)(int data, int reason) = novas_call_fsdbEvent_add_stream_attribute; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_add_stream_attribute */ + +/* PLI routine: $fsdbTrans_create_stream_end:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_end +#define __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_end +extern void novas_call_fsdbEvent_create_stream_end(int data, int reason); +#pragma weak novas_call_fsdbEvent_create_stream_end +void novas_call_fsdbEvent_create_stream_end(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_create_stream_end"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_create_stream_end"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_create_stream_end"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_create_stream_end)(int data, int reason) = novas_call_fsdbEvent_create_stream_end; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_create_stream_end */ + +/* PLI routine: $fsdbTrans_begin:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_begin +#define __VCS_PLI_STUB_novas_call_fsdbEvent_begin +extern void novas_call_fsdbEvent_begin(int data, int reason); +#pragma weak novas_call_fsdbEvent_begin +void novas_call_fsdbEvent_begin(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_begin"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_begin"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_begin"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_begin)(int data, int reason) = novas_call_fsdbEvent_begin; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_begin */ + +/* PLI routine: $fsdbTrans_set_label:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_set_label +#define __VCS_PLI_STUB_novas_call_fsdbEvent_set_label +extern void novas_call_fsdbEvent_set_label(int data, int reason); +#pragma weak novas_call_fsdbEvent_set_label +void novas_call_fsdbEvent_set_label(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_set_label"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_set_label"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_set_label"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_set_label)(int data, int reason) = novas_call_fsdbEvent_set_label; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_set_label */ + +/* PLI routine: $fsdbTrans_add_attribute:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_add_attribute +#define __VCS_PLI_STUB_novas_call_fsdbEvent_add_attribute +extern void novas_call_fsdbEvent_add_attribute(int data, int reason); +#pragma weak novas_call_fsdbEvent_add_attribute +void novas_call_fsdbEvent_add_attribute(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_add_attribute"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_add_attribute"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_add_attribute"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_add_attribute)(int data, int reason) = novas_call_fsdbEvent_add_attribute; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_add_attribute */ + +/* PLI routine: $fsdbTrans_add_tag:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_add_tag +#define __VCS_PLI_STUB_novas_call_fsdbEvent_add_tag +extern void novas_call_fsdbEvent_add_tag(int data, int reason); +#pragma weak novas_call_fsdbEvent_add_tag +void novas_call_fsdbEvent_add_tag(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_add_tag"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_add_tag"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_add_tag"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_add_tag)(int data, int reason) = novas_call_fsdbEvent_add_tag; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_add_tag */ + +/* PLI routine: $fsdbTrans_end:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_end +#define __VCS_PLI_STUB_novas_call_fsdbEvent_end +extern void novas_call_fsdbEvent_end(int data, int reason); +#pragma weak novas_call_fsdbEvent_end +void novas_call_fsdbEvent_end(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_end"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_end"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_end"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_end)(int data, int reason) = novas_call_fsdbEvent_end; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_end */ + +/* PLI routine: $fsdbTrans_add_relation:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_add_relation +#define __VCS_PLI_STUB_novas_call_fsdbEvent_add_relation +extern void novas_call_fsdbEvent_add_relation(int data, int reason); +#pragma weak novas_call_fsdbEvent_add_relation +void novas_call_fsdbEvent_add_relation(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_add_relation"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_add_relation"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_add_relation"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_add_relation)(int data, int reason) = novas_call_fsdbEvent_add_relation; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_add_relation */ + +/* PLI routine: $fsdbTrans_get_error_code:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbEvent_get_error_code +#define __VCS_PLI_STUB_novas_call_fsdbEvent_get_error_code +extern void novas_call_fsdbEvent_get_error_code(int data, int reason); +#pragma weak novas_call_fsdbEvent_get_error_code +void novas_call_fsdbEvent_get_error_code(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbEvent_get_error_code"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbEvent_get_error_code"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbEvent_get_error_code"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbEvent_get_error_code)(int data, int reason) = novas_call_fsdbEvent_get_error_code; +#endif /* __VCS_PLI_STUB_novas_call_fsdbEvent_get_error_code */ + +/* PLI routine: $fsdbTrans_add_stream_attribute:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbTrans_add_stream_attribute +#define __VCS_PLI_STUB_novas_call_fsdbTrans_add_stream_attribute +extern void novas_call_fsdbTrans_add_stream_attribute(int data, int reason); +#pragma weak novas_call_fsdbTrans_add_stream_attribute +void novas_call_fsdbTrans_add_stream_attribute(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbTrans_add_stream_attribute"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbTrans_add_stream_attribute"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbTrans_add_stream_attribute"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbTrans_add_stream_attribute)(int data, int reason) = novas_call_fsdbTrans_add_stream_attribute; +#endif /* __VCS_PLI_STUB_novas_call_fsdbTrans_add_stream_attribute */ + +/* PLI routine: $fsdbTrans_add_scope_attribute:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbTrans_add_scope_attribute +#define __VCS_PLI_STUB_novas_call_fsdbTrans_add_scope_attribute +extern void novas_call_fsdbTrans_add_scope_attribute(int data, int reason); +#pragma weak novas_call_fsdbTrans_add_scope_attribute +void novas_call_fsdbTrans_add_scope_attribute(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbTrans_add_scope_attribute"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbTrans_add_scope_attribute"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbTrans_add_scope_attribute"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbTrans_add_scope_attribute)(int data, int reason) = novas_call_fsdbTrans_add_scope_attribute; +#endif /* __VCS_PLI_STUB_novas_call_fsdbTrans_add_scope_attribute */ + +/* PLI routine: $sps_interactive:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_interactive +#define __VCS_PLI_STUB_novas_call_sps_interactive +extern void novas_call_sps_interactive(int data, int reason); +#pragma weak novas_call_sps_interactive +void novas_call_sps_interactive(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_interactive"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_interactive"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_interactive"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_interactive)(int data, int reason) = novas_call_sps_interactive; +#endif /* __VCS_PLI_STUB_novas_call_sps_interactive */ + +/* PLI routine: $sps_test:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_test +#define __VCS_PLI_STUB_novas_call_sps_test +extern void novas_call_sps_test(int data, int reason); +#pragma weak novas_call_sps_test +void novas_call_sps_test(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_test"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_test"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_test"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_test)(int data, int reason) = novas_call_sps_test; +#endif /* __VCS_PLI_STUB_novas_call_sps_test */ + +/* PLI routine: $fsdbDumpClassObject:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpClassObject +#define __VCS_PLI_STUB_novas_call_fsdbDumpClassObject +extern void novas_call_fsdbDumpClassObject(int data, int reason); +#pragma weak novas_call_fsdbDumpClassObject +void novas_call_fsdbDumpClassObject(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpClassObject"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpClassObject"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpClassObject"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpClassObject)(int data, int reason) = novas_call_fsdbDumpClassObject; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpClassObject */ + +/* PLI routine: $fsdbDumpClassObjectByFile:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpClassObjectByFile +#define __VCS_PLI_STUB_novas_call_fsdbDumpClassObjectByFile +extern void novas_call_fsdbDumpClassObjectByFile(int data, int reason); +#pragma weak novas_call_fsdbDumpClassObjectByFile +void novas_call_fsdbDumpClassObjectByFile(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpClassObjectByFile"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpClassObjectByFile"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpClassObjectByFile"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpClassObjectByFile)(int data, int reason) = novas_call_fsdbDumpClassObjectByFile; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpClassObjectByFile */ + +/* PLI routine: $ridbDump:call */ +#ifndef __VCS_PLI_STUB_novas_call_ridbDump +#define __VCS_PLI_STUB_novas_call_ridbDump +extern void novas_call_ridbDump(int data, int reason); +#pragma weak novas_call_ridbDump +void novas_call_ridbDump(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_ridbDump"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_ridbDump"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_ridbDump"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_ridbDump)(int data, int reason) = novas_call_ridbDump; +#endif /* __VCS_PLI_STUB_novas_call_ridbDump */ + +/* PLI routine: $sps_flush_file:call */ +#ifndef __VCS_PLI_STUB_novas_call_sps_flush_file +#define __VCS_PLI_STUB_novas_call_sps_flush_file +extern void novas_call_sps_flush_file(int data, int reason); +#pragma weak novas_call_sps_flush_file +void novas_call_sps_flush_file(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_sps_flush_file"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_sps_flush_file"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_sps_flush_file"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_sps_flush_file)(int data, int reason) = novas_call_sps_flush_file; +#endif /* __VCS_PLI_STUB_novas_call_sps_flush_file */ + +/* PLI routine: $fsdbDumpSingle:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpSingle +#define __VCS_PLI_STUB_novas_call_fsdbDumpSingle +extern void novas_call_fsdbDumpSingle(int data, int reason); +#pragma weak novas_call_fsdbDumpSingle +void novas_call_fsdbDumpSingle(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpSingle"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpSingle"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpSingle"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpSingle)(int data, int reason) = novas_call_fsdbDumpSingle; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpSingle */ + +/* PLI routine: $fsdbDumpIO:call */ +#ifndef __VCS_PLI_STUB_novas_call_fsdbDumpIO +#define __VCS_PLI_STUB_novas_call_fsdbDumpIO +extern void novas_call_fsdbDumpIO(int data, int reason); +#pragma weak novas_call_fsdbDumpIO +void novas_call_fsdbDumpIO(int data, int reason) +{ + static int _vcs_pli_stub_initialized_ = 0; + static void (*_vcs_pli_fp_)(int data, int reason) = NULL; + if (!_vcs_pli_stub_initialized_) { + _vcs_pli_stub_initialized_ = 1; + _vcs_pli_fp_ = (void (*)(int data, int reason)) dlsym(RTLD_NEXT, "novas_call_fsdbDumpIO"); + if (_vcs_pli_fp_ == NULL) { + _vcs_pli_fp_ = (void (*)(int data, int reason)) VCS_dlsymLookup("novas_call_fsdbDumpIO"); + } + } + if (_vcs_pli_fp_) { + _vcs_pli_fp_(data, reason); + } else { + vcsMsgReportNoSource1("PLI-DIFNF", "novas_call_fsdbDumpIO"); + } +} +void (*__vcs_pli_dummy_reference_novas_call_fsdbDumpIO)(int data, int reason) = novas_call_fsdbDumpIO; +#endif /* __VCS_PLI_STUB_novas_call_fsdbDumpIO */ + +#ifdef __cplusplus +} +#endif diff --git a/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.o b/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.o new file mode 100644 index 0000000..7927935 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/_vcs_pli_stub_.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/archive.0/_117681_archive_1.a b/DA4008_V1.2/sim/lvds/csrc/archive.0/_117681_archive_1.a new file mode 100644 index 0000000..a2ae8df Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/archive.0/_117681_archive_1.a differ diff --git a/DA4008_V1.2/sim/lvds/csrc/archive.0/_117681_archive_1.a.info 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b/DA4008_V1.2/sim/lvds/csrc/checksum differ diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist b/DA4008_V1.2/sim/lvds/csrc/filelist new file mode 100644 index 0000000..01ddcb8 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist @@ -0,0 +1,32 @@ + + +AR=ar +DOTLIBS=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libzerosoft_rt_stubs.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvirsim.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/liberrorinf.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so + +# This file is automatically generated by VCS. Any changes you make to it +# will be overwritten the next time VCS is run +VCS_LIBEXT= +XTRN_OBJS= + +DPI_WRAPPER_OBJS = +DPI_STUB_OBJS = +# filelist.dpi will populate DPI_WRAPPER_OBJS and DPI_STUB_OBJS +include filelist.dpi +PLI_STUB_OBJS = +include filelist.pli + +include filelist.hsopt + +include filelist.cu + +VCS_MISC_OBJS= +VCS_INCR_OBJS= + + +AUGDIR= +AUG_LDFLAGS= +SHARED_OBJ_SO= + + + +VLOG_OBJS= $(VCS_OBJS) $(CU_OBJS) $(VCS_ARC0) $(XTRN_OBJS) $(DPI_WRAPPER_OBJS) $(VCS_INCR_OBJS) $(SHARED_OBJ_SO) $(HSOPT_OBJS) diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.cu b/DA4008_V1.2/sim/lvds/csrc/filelist.cu new file mode 100644 index 0000000..95fc3e0 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist.cu @@ -0,0 +1,49 @@ +PIC_LD=ld + +ARCHIVE_OBJS= +ARCHIVE_OBJS += _117681_archive_1.so +_117681_archive_1.so : archive.0/_117681_archive_1.a + @$(AR) -s $< + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_117681_archive_1.so --whole-archive $< --no-whole-archive + @rm -f $@ + @ln -sf .//../simv.daidir//_117681_archive_1.so $@ + + +ARCHIVE_OBJS += _117699_archive_1.so +_117699_archive_1.so : archive.0/_117699_archive_1.a + @$(AR) -s $< + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_117699_archive_1.so --whole-archive $< --no-whole-archive + @rm -f $@ + @ln -sf .//../simv.daidir//_117699_archive_1.so $@ + + +ARCHIVE_OBJS += _117700_archive_1.so +_117700_archive_1.so : archive.0/_117700_archive_1.a + @$(AR) -s $< + @$(PIC_LD) -shared -Bsymbolic -o .//../simv.daidir//_117700_archive_1.so --whole-archive $< --no-whole-archive + @rm -f $@ + @ln -sf .//../simv.daidir//_117700_archive_1.so $@ + + + + + +O0_OBJS = + +$(O0_OBJS) : %.o: %.c + $(CC_CG) $(CFLAGS_O0) -c -o $@ $< + + +%.o: %.c + $(CC_CG) $(CFLAGS_CG) -c -o $@ $< +CU_UDP_OBJS = \ + + +CU_LVL_OBJS = \ +SIM_l.o + +MAIN_OBJS = \ +objs/amcQw_d.o + +CU_OBJS = $(MAIN_OBJS) $(ARCHIVE_OBJS) $(CU_UDP_OBJS) $(CU_LVL_OBJS) + diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.dpi b/DA4008_V1.2/sim/lvds/csrc/filelist.dpi new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt new file mode 100644 index 0000000..468b268 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt @@ -0,0 +1,13 @@ +rmapats_mop.o: rmapats.m + @/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/cgmop1 -tls_initexe -pic -gen_obj rmapats.m rmapats_mop.o; rm -f rmapats.m; touch rmapats.m; touch rmapats_mop.o + +rmapats.o: rmapats.c + @$(CC_CG) $(CFLAGS_CG) -c -fPIC -x c -o rmapats.o rmapats.c +rmapats%.o: rmapats%.c + @$(CC_CG) $(CFLAGS_CG) -c -fPIC -x c -o $@ $< +rmar.o: rmar.c + @$(CC_CG) $(CFLAGS_CG) -c -fPIC -x c -o rmar.o rmar.c +rmar%.o: rmar%.c + @$(CC_CG) $(CFLAGS_CG) -c -fPIC -x c -o $@ $< + +include filelist.hsopt.objs diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.llvm2_0.objs b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.llvm2_0.objs new file mode 100644 index 0000000..4c31419 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.llvm2_0.objs @@ -0,0 +1 @@ +LLVM_OBJS += rmar_llvm_0_1.o rmar_llvm_0_0.o diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.objs b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.objs new file mode 100644 index 0000000..f40e57c --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist.hsopt.objs @@ -0,0 +1,7 @@ +HSOPT_OBJS +=rmapats_mop.o \ + rmapats.o \ + rmar.o rmar_nd.o + +include filelist.hsopt.llvm2_0.objs +HSOPT_OBJS += $(LLVM_OBJS) + diff --git a/DA4008_V1.2/sim/lvds/csrc/filelist.pli b/DA4008_V1.2/sim/lvds/csrc/filelist.pli new file mode 100644 index 0000000..653944b --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/filelist.pli @@ -0,0 +1,4 @@ +PLI_STUB_OBJS += _vcs_pli_stub_.o +_vcs_pli_stub_.o: _vcs_pli_stub_.c + @$(CC) -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include -fPIC -c -o _vcs_pli_stub_.o _vcs_pli_stub_.c + @strip -g _vcs_pli_stub_.o diff --git a/DA4008_V1.2/sim/lvds/csrc/hsim/hsim.sdb b/DA4008_V1.2/sim/lvds/csrc/hsim/hsim.sdb new file mode 100644 index 0000000..ea153bd Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/hsim/hsim.sdb differ diff --git a/DA4008_V1.2/sim/lvds/csrc/import_dpic.h b/DA4008_V1.2/sim/lvds/csrc/import_dpic.h new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/csrc/objs/amcQw_d.o b/DA4008_V1.2/sim/lvds/csrc/objs/amcQw_d.o new file mode 100644 index 0000000..91d38e2 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/objs/amcQw_d.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/product_timestamp b/DA4008_V1.2/sim/lvds/csrc/product_timestamp new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/csrc/rmapats.c b/DA4008_V1.2/sim/lvds/csrc/rmapats.c new file mode 100644 index 0000000..0c43907 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/rmapats.c @@ -0,0 +1,43 @@ +// file = 0; split type = patterns; threshold = 100000; total count = 0. +#include +#include +#include +#include "rmapats.h" + +void hsG_0__0 (struct dummyq_struct * I1289, EBLK * I1283, U I685); +void hsG_0__0 (struct dummyq_struct * I1289, EBLK * I1283, U I685) +{ + U I1547; + U I1548; + U I1549; + struct futq * I1550; + struct dummyq_struct * pQ = I1289; + I1547 = ((U )vcs_clocks) + I685; + I1549 = I1547 & ((1 << fHashTableSize) - 1); + I1283->I727 = (EBLK *)(-1); + I1283->I731 = I1547; + if (I1547 < (U )vcs_clocks) { + I1548 = ((U *)&vcs_clocks)[1]; + sched_millenium(pQ, I1283, I1548 + 1, I1547); + } + else if ((peblkFutQ1Head != ((void *)0)) && (I685 == 1)) { + I1283->I733 = (struct eblk *)peblkFutQ1Tail; + peblkFutQ1Tail->I727 = I1283; + peblkFutQ1Tail = I1283; + } + else if ((I1550 = pQ->I1190[I1549].I745)) { + I1283->I733 = (struct eblk *)I1550->I744; + I1550->I744->I727 = (RP )I1283; + I1550->I744 = (RmaEblk *)I1283; + } + else { + sched_hsopt(pQ, I1283, I1547); + } +} +#ifdef __cplusplus +extern "C" { +#endif +void SinitHsimPats(void); +#ifdef __cplusplus +} +#endif diff --git a/DA4008_V1.2/sim/lvds/csrc/rmapats.h b/DA4008_V1.2/sim/lvds/csrc/rmapats.h new file mode 100644 index 0000000..fcea8b7 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/rmapats.h @@ -0,0 +1,2550 @@ +#ifndef __DO_RMAHDR_ +#define __DO_RMAHDR_ + +#ifdef __cplusplus + extern "C" { +#endif + +#define VCS_RTLIB_TLS_MODEL __attribute__((tls_model("initial-exec"))) + +typedef unsigned long UP; +typedef unsigned U; +typedef unsigned char UB; +typedef unsigned char scalar; +typedef struct vec32 vec32; +typedef unsigned short US; +typedef unsigned char SVAL; +typedef unsigned char TYPEB; +typedef struct qird QIRD; +typedef unsigned char UST_e; +typedef unsigned uscope_t; +typedef U NumLibs_t; +struct vec32 { + U I1; + U I2; +}; +typedef unsigned long RP; +typedef unsigned long RO; +typedef unsigned long long ULL; +typedef U GateCount; +typedef U NodeCount; +typedef unsigned short HsimEdge; +typedef unsigned char HsimExprChar; +typedef struct { + U I706; + RP I707; +} RmaReceiveClock1; +typedef NodeCount FlatNodeNum; +typedef U InstNum; +typedef unsigned ProcessNum; +typedef unsigned long long TimeStamp64; +typedef unsigned long long TimeStamp; +typedef enum { + PD_SING = 0, + PD_RF = 1, + PD_PLSE = 2, + PD_PLSE_RF = 3, + PD_NULL = 4 +} PD_e; +typedef TimeStamp RmaTimeStamp; +typedef TimeStamp64 RmaTimeStamp64; +typedef struct { + int * I708; + int * I709; + int I710; + union { + long long enumDesc; + long long classId; + } I711; +} TypeData; +struct etype { + U I586 :8; + U I587; + U I588; + U I589 :1; + U I590 :1; + U I591 :1; + U I592 :1; + U I593 :1; + U I594 :1; + U I595 :1; + U I596 :1; + U I597 :1; + U I598 :4; + U I599 :1; + U I600 :1; + U I601 :1; + U I602 :1; + U I603 :1; + U I604 :1; + U I605 :1; + U I606 :1; + U I607 :2; + U I608 :1; + U I609 :2; + U I610 :1; + U I611 :1; + U I612 :1; + U I613 :1; + U I614 :1; + U I615 :1; + TypeData * I616; + U I617; + U I618; + U I619 :1; + U I620 :1; + U I621 :1; + U I622 :1; + U I623 :2; + U I624 :2; + U I625 :1; + U I626 :1; + U I627 :1; + U I628 :1; + U I629 :1; + U I630 :1; + U I631 :1; + U I632 :1; + U I633 :1; + U I634 :1; + U I635 :1; + U I636 :13; +}; +typedef union { + double I718; + unsigned long long I719; + unsigned I720[2]; +} rma_clock_struct; +typedef struct eblk EBLK; +typedef int (* E_fn)(void); +typedef struct eblk { + struct eblk * I727; + E_fn I728; + struct iptmpl * I729; + unsigned I731; + unsigned I732; + struct eblk * I733; +} eblk_struct; +typedef struct { + RP I727; + RP I728; + RP I729; + unsigned I731; + unsigned I732; + RP I733; +} RmaEblk; +typedef struct { + RP I727; + RP I728; + RP I729; + unsigned I731; + unsigned I732; + RP I733; + unsigned val; +} RmaEblklq; +typedef union { + double I718; + unsigned long long I719; + unsigned I720[2]; +} clock_struct; +typedef clock_struct RmaClockStruct; +typedef struct RmaRetain_t RmaRetain; +struct RmaRetain_t { + RP I769; + RmaEblk I726; + U I771; + US I772 :1; + US I773 :4; + US I181 :2; + US state :2; + US I775 :1; + US I776 :2; + US I777 :2; + US fHsim :1; + US I569 :1; + scalar newval; + scalar I780; + RP I781; +}; +struct retain_t { + struct retain_t * I769; + EBLK I726; + U I771; + US I772 :1; + US I773 :4; + US I181 :2; + US state :2; + US I775 :1; + US I776 :2; + US I777 :2; + US fHsim :1; + US I778 :1; + scalar newval; + scalar I780; + void * I781; +}; +typedef struct MPSched MPS; +typedef struct RmaMPSched RmaMps; +struct MPSched { + MPS * I760; + scalar I761; + scalar I762; + scalar I763; + scalar fHsim :1; + scalar I181 :6; + U I765; + EBLK I766; + void * I767; + UP I768[1]; +}; +struct RmaMPSched { + RP I760; + scalar I761; + scalar I762; + scalar I763; + scalar fHsim :1; + scalar I181 :6; + U I765; + RmaEblk I766; + RP I767; + RP I768[1]; +}; +typedef struct RmaMPSchedPulse RmaMpsp; +struct RmaMPSchedPulse { + RP I760; + scalar I761; + scalar I762; + scalar I763; + scalar I181; + U I765; + RmaEblk I766; + scalar I777; + scalar I786; + scalar I787; + scalar I788; + U I789; + RmaClockStruct I790; + RmaClockStruct I791; + U state; + U I792; + RP I729; + RP I793; + RP I794; + RP I768[1]; +}; +typedef struct MPItem MPI; +struct MPItem { + U * I796; + void * I797; +}; +typedef struct { + RmaEblk I726; + RP I798; + scalar I799; + scalar I777; + scalar I800; +} RmaTransEventHdr; +typedef struct RmaMPSchedPulseNewCsdf RmaMpspNewCsdf; +struct RmaMPSchedPulseNewCsdf { + RP I760; + scalar I761; + scalar I762; + scalar I763; + scalar fHsim :1; + scalar I181 :6; + U I765; + RmaEblk I766; + scalar I777; + scalar I786; + scalar I787; + scalar I788; + U state :4; + U I802 :28; + RmaClockStruct I790; + RmaClockStruct I791; + RP I803; + RP I729; + RP I804; + RP I768[1]; +}; +typedef struct red_t { + U I805; + U I806; + U I685; +} RED; +typedef struct predd { + PD_e I181; + RED I807[0]; +} PREDD; +union rhs_value { + vec32 I808; + scalar I799; + vec32 * I777; + double I809; + U I810; +}; +typedef struct nbs_t { + struct nbs_t * I811; + struct nbs_t * I813; + void (* I814)(struct nbs_t * I781); + U I815 :1; + U I816 :1; + U I817 :1; + U I818 :1; + U I819 :1; + U I820 :1; + U I821 :26; + U I822; + void * I823; + union rhs_value I824; + vec32 I718; + union { + struct nbs_t * first; + struct nbs_t * last; + } I826; +} NBS; +typedef struct { + RP I827; + RP I793; + RP I729; + RP I794; + RmaEblk I726; + RmaEblk I828; + RP I829; + scalar I799; + scalar I777; + char state; + uscope_t I830; + U I831; + RP I832; + scalar I786; + scalar I787; + scalar I788; + RmaClockStruct I790; + RmaClockStruct I791; + RP I767; +} RmaPulse; +typedef enum { + QIRDModuleC = 1, + QIRDSVPackageC = 2, + QIRDSpiceModuleC = 3 +} QIRDModuleType; +typedef struct { + U I836 :1; + U I837 :1; + U I838 :1; + U I839 :1; + U I840 :1; + U I841 :1; + U I842 :1; + U I843 :1; + U I844 :1; + U I845 :1; + U I846 :1; + U I847 :1; + U I848 :1; + U I849 :1; + U I850 :1; + U I851 :1; + U I852 :1; + U I853 :1; + QIRDModuleType I854 :2; + U I855 :1; + U I856 :1; + U I857 :1; + U I858 :1; + U I859 :1; + U I860 :1; + U I861 :1; + U I862 :1; + U I863 :1; + U I864 :1; + U I865 :1; + U I866 :1; + U I867 :1; + U I868 :1; + U I869 :1; + U I870 :1; + U I871 :1; + U I872 :1; + U I873 :1; + U I874 :1; +} BitFlags; +struct qird { + US I4; + US I5; + U I6; + U I7; + char * I8; + char * I9; + U * I10; + char * I11; + char * I12; + U I13; + U I14; + struct vcd_rt * I15; + U I17; + struct _vcdOffset_rt * I18; + U I20; + U I21; + U * I22; + U * I23; + void * I24; + void * I25; + U I26; + int I27; + UP I28; + U I29; + U I30; + U I31; + UP I32; + U * I33; + UP I34; + U I35; + BitFlags I36; + U I37; + U I38; + U I39; + U I40; + U I41; + U * I42; + U I43; + U * I44; + U I45; + U I46; + U I47; + U I48; + U I49; + U I50; + U I51; + U * I52; + U * I53; + U I54; + U I55; + U * I56; + U I57; + U * I58; + U I59; + U I60; + U I61; + U I62; + U * I63; + U I64; + U * I65; + U I66; + U I67; + U I68; + U I69; + U I70; + U I71; + U * I72; + char * I73; + U I74; + U I75; + U I76; + U I77; + U I78; + U * I79; + U I80; + U I81; + U I82; + UP * I83; + U I84; + U I85; + U I86; + U I87; + U I88; + U I89; + U * I90; + U I91; + U I92; + U * I93; + U * I94; + U * I95; + U * I96; + U * I97; + U I98; + U I99; + struct taskInfo * I100; + U I102; + U I103; + U I104; + int * I105; + U * I106; + UP * I107; + U * I108; + U I109; + U I110; + U I111; + U I112; + U I113; + struct qrefer * I114; + U * I116; + unsigned * I117; + void * I118; + U I119; + U I120; + struct classStaticReferData * I121; + U I123; + U * I124; + U I125; + U * I126; + U I127; + struct wakeupInfoStruct * I128; + U I130; + U I131; + U I132; + U * I133; + U I134; + U * I135; + U I136; + U I137; + U I138; + U * I139; + U I140; + U * I141; + U I142; + U I143; + U * I144; + U I145; + U I146; + U * I147; + U * I148; + U * I149; + U I150; + U I151; + U I152; + U I153; + U I154; + struct qrefee * I155; + U * I157; + U I158; + struct qdefrefee * I159; + U * I161; + int (* I162)(void); + char * I163; + U I164; + U I165; + void * I166; + void * I167; + NumLibs_t I168; + char * I169; + U * I170; + U I171; + U I172; + U I173; + U I174; + U I175; + U * I176; + U * I177; + int I178; + struct clock_load * I179; + int I194; + struct clock_data * I195; + int I211; + struct clock_hiconn * I212; + U I216; + U I217; + U I218; + U I219; + U * I220; + U * I221; + U I222; + void * I223; + U I224; + U I225; + UP * I226; + void * I227; + U I228; + UP * I229; + U * I230; + int (* I231)(void); + U * I232; + UP * I233; + U * I234; + U I235 :1; + U I236 :31; + U I237; + U I238; + UP * I239; + U * I240; + U I241 :1; + U I242 :1; + U I243 :1; + U I244 :1; + U I245 :28; + U I246; + U I247; + U I248; + U I249 :31; + U I250 :1; + UP * I251; + UP * I252; + U * I253; + U * I254; + U * I255; + U * I256; + UP * I257; + UP * I258; + UP * I259; + U * I260; + UP * I261; + UP * I262; + UP * I263; + UP * I264; + char * I265; + U I266; + U I267; + U I268; + UP * I269; + U I270; + UP * I271; + UP * I272; + UP * I273; + UP * I274; + UP * I275; + UP * I276; + UP * I277; + UP * I278; + UP * I279; + UP * I280; + UP * I281; + UP * I282; + UP * I283; + UP * I284; + U * I285; + U * I286; + UP * I287; + U I288; + U I289; + U I290; + U I291; + U I292; + U I293; + U I294; + U I295; + char * I296; + U * I297; + U I298; + U I299; + U I300; + U I301; + U I302; + UP * I303; + UP * I304; + UP * I305; + UP * I306; + struct daidirInfo * I307; + struct vcs_tftable * I309; + U I311; + UP * I312; + UP * I313; + U I314; + U I315; + U I316; + UP * I317; + U * I318; + UP * I319; + UP * I320; + struct qird_hil_data * I321; + UP (* I323)(void); + UP (* I324)(void); + UP (* I325)(void); + UP (* I326)(void); + UP (* I327)(void); + int * I328; + int (* I329)(void); + char * I330; + UP * I331; + UP * I332; + UP (* I333)(void); + int (* I334)(void); + int * I335; + int (* I336)(void); + int * I337; + char * I338; + U * I339; + U * I340; + U * I341; + U * I342; + void * I343; + U I344; + void * I345; + U I346; + U I347; + U I348; + U I349; + U I350; + U I351; + char * I352; + UP * I353; + U * I354; + U * I355; + U I356 :15; + U I357 :14; + U I358 :1; + U I359 :1; + U I360 :1; + U I361 :3; + U I362 :1; + U I363 :1; + U I364 :17; + U I365 :3; + U I366 :5; + U I367 :1; + U I368 :1; + U I369; + U I370; + struct scope * I371; + U I373; + U I374; + U I375; + U * I376; + U * I377; + U * I378; + U I379; + U I380; + U I381; + struct pcbt * I382; + U I392; + U I393; + U I394; + U I395; + void * I396; + void * I397; + void * I398; + int I399; + U * I400; + U I401; + U I402; + U I403; + U I404; + U I405; + U I406; + U I407; + void * I408; + UP * I409; + U I410; + U I411; + void * I412; + U I413; + void * I414; + U I415; + void * I416; + U I417; + int (* I418)(void); + int (* I419)(void); + void * I420; + void * I421; + void * I422; + U I423; + U I424; + U I425; + U I426; + U I427; + U I428; + char * I429; + U I430; + U * I431; + U I432; + U * I433; + U I434; + U I435; + U I436; + U I437; + U I438; + U I439; + U * I440; + U I441; + U I442; + U * I443; + U I444; + U I445; + U I446; + U * I447; + char * I448; + U I449; + U I450; + U I451; + U I452; + U * I453; + U * I454; + U I455; + U * I456; + U * I457; + U I458; + U I459; + U I460; + UP * I461; + U I462; + U I463; + U I464; + struct cosim_info * I465; + U I467; + U * I468; + U I469; + void * I470; + U I471; + U * I472; + U I473; + struct hybridSimReferrerData * I474; + U I476; + U * I477; + U I478; + U I479; + U * I480; + U I481; + U * I482; + U I483; + U * I484; + U I485; + U I486; + U I487; + U I488; + U I489; + U I490; + U I491; + U I492; + U I493; + U * I494; + U * I495; + void (* I496)(void); + U * I497; + UP * I498; + struct mhdl_outInfo * I499; + UP * I501; + U I502; + UP * I503; + U I504; + void * I505; + U * I506; + void * I507; + char * I508; + int (* I509)(void); + U * I510; + char * I511; + char * I512; + U I513; + U * I514; + char * I515; + U I516; + struct regInitInfo * I517; + UP * I519; + U * I520; + char * I521; + U I522; + U I523; + U I524; + U I525; + U I526; + U I527; + U I528; + U I529; + UP * I530; + U I531; + U I532; + U I533; + U I534; + UP * I535; + U I536; + UP * I537; + U I538; + U I539; + U I540; + U * I541; + U I542; + U I543; + U I544; + U * I545; + U * I546; + UP * I547; + UP * I548; + void * I549; + UP I550; + void * I551; + void * I552; + void * I553; + void * I554; + void * I555; + UP I556; + U * I557; + U * I558; + void * I559; + U I560 :1; + U I561 :31; + U I562; + U I563; + U I564; + int I565; + U I566 :1; + U I567 :1; + U I568 :1; + U I569 :29; + void * I570; + void * I571; + void * I572; + void * I573; + void * I574; + UP * I575; + U * I576; + U I577; + char * I578; + U * I579; + U * I580; + char * I581; + int * I582; + UP * I583; + struct etype * I584; + U I637; + U I638; + U * I639; + struct etype * I640; + U I641; + U I642; + U I643; + U * I644; + void * I645; + U I646; + U I647; + void * I648; + U I649; + U I650; + U * I651; + U * I652; + char * I653; + U I654; + struct covreg_rt * I655; + U I657; + U I658; + U * I659; + U I660; + U * I661; + U I662; + U I663; + U * I664; +}; +typedef struct pcbt { + U * I384; + UP I385; + U I386; + U I387; + U I388; + U I389; + U I390; + U I391; +} PCBT; +struct iptmpl { + QIRD * I734; + struct vcs_globals_t * I735; + void * I737; + UP I738; + UP I739; + struct iptmpl * I729[2]; +}; +typedef unsigned long long FileOffset; +typedef struct _RmaMultiInputTable { + U I881 :1; + U I882 :1; + U I672 :2; + U I673 :4; + U I674 :5; + U I883 :1; + U I884 :1; + U I885 :1; + U I886 :1; + U I887 :1; + U I888 :1; + U I889; + U I890; + U I203; + U I891; + U I892 :1; + U I893 :31; + union { + U utable; + U edgeInputNum; + } I699; + U I894 :4; + U I895 :4; + U I896 :4; + U I897 :4; + U I898 :4; + U I899 :4; + U I900 :1; + U I901 :1; + U I902 :1; + U I903 :1; + U I904 :5; + HsimExprChar * I905; + UB * I906; + UB * I907; + struct _RmaMultiInputTable * I880; + struct _RmaMultiInputTable * I909; +} RmaMultiInputTable; +typedef struct _HsCgPeriod { + U I955; + U I956; +} HsCgPeriod; +typedef struct { + U I957[2]; + U I958 :1; + U I959 :1; + U I960 :8; + U I961 :8; + U I962 :8; + U I963 :4; + U I964 :1; + U I965 :1; + unsigned long long I966; + unsigned long long I967; + unsigned long long I968; + unsigned long long I969; + unsigned long long I956; + U I955; + U I970; + U I971; + U I972; + U I973; + U I974; + HsCgPeriod * I975[10]; +} HsimSignalMonitor; +typedef struct { + FlatNodeNum I976; + InstNum I977; + U I915; + scalar I978; + UB I979; + UB I980; + UB I981; + UB I982; + UB I983; + UB I984; + U I985; + U I986; + U I987; + U I988; + U I989; + U I990; + U I991; + U I992; + U I993; + HsimSignalMonitor * I994; + RP I995; + RmaTimeStamp64 I996; + U I997; + RmaTimeStamp64 I998; + U I999; + UB I1000; +} HsimNodeRecord; +typedef RP RCICODE; +typedef struct { + RP I1005; + RP I729; +} RmaIbfIp; +typedef struct { + RP I1005; + RP pcode; +} RmaIbfPcode; +typedef struct { + RmaEblk I726; +} RmaEvTriggeredOrSyncLoadCg; +typedef struct { + RO I877; + RP pcode; +} SchedGateFanout; +typedef struct { + RO I877; + RP pcode; + U I936[4]; +} SchedSelectGateFanout; +typedef struct { + RP pcode; + RmaEblklq I726; +} SchedGateEblk; +typedef struct { + RP pcode; + RmaEblklq I726; + UB * I1006; +} SchedSelectGateEblk; +typedef struct { + RP I1007; + RP pfn; + RP pcode; +} RmaSeqPrimOutputEblkData; +typedef struct { + RmaEblk I726; + RP I1008; +} RmaAnySchedSampleSCg; +typedef struct { + RmaEblk I726; + RP I1006; + RP I1008; + vec32 I1009; +} RmaAnySchedVCg; +typedef struct { + RmaEblk I726; + RP I1006; + RP I1008; + vec32 I776[1]; +} RmaAnySchedWCg; +typedef struct { + RmaEblk I726; + RP I1006; + RP I1008; + scalar I1010[1]; +} RmaAnySchedECg; +typedef struct { + U I1011; + U I714; + U I915; + U I1012; + RmaIbfIp * I1013; + EBLK I726; + void * val; +} RmaThreadSchedCompiledLoads; +typedef struct { + U I714; + U I722; + RmaThreadSchedCompiledLoads * I1014; +} RmaSchedCompileLoadsCg; +typedef struct { + RP I1015; +} RmaRootCbkCg; +typedef struct { + RP I1016; +} RmaRootForceCbkCg; +typedef struct { + RmaEblk I726; + RP I1017; +} RmaForceCbkJmpCg; +typedef struct { + U I5; + U I722 :31; + U I1018 :1; + vec32 I808; + U I1019; + RP I1020; + RP I1021; +} RmaForceSelectorV; +typedef struct { + U I5; + RmaIbfPcode I1027; +} RmaNetTypeDriverGate; +typedef struct { + U I5; + U I668; + RmaIbfPcode I1027[1]; +} RmaNetTypeScatterGate; +typedef struct { + U I5; + RmaIbfPcode I1027; +} RmaNetTypeGatherGate; +typedef struct { + RmaIbfPcode I1028; + U I1029 :3; + U I1030 :1; + U I1031 :1; + U I890 :16; +} RmaNbaGateOfn; +typedef struct { + U I5; + NBS I1032; + RmaIbfPcode I1028; +} RmaNbaGate1; +typedef struct { + RP ptable; + RP pfn; + RP pcode; +} Rma1InputGateFaninCgS; +typedef struct RmaSeqPrimOutputS_ RmaSeqPrimOutputOnClkS; +struct RmaSeqPrimOutputS_ { + RP pfn; + RP I1035; + U state; + U I1036; + RP I1037; + U I706; + scalar val; +}; +typedef struct { + U I5; + U iinput; + UB I1039; + RP I1040; +} RmaCondOptLoad; +typedef struct { + U I5; + U iinput; + UB I1039; + RP I1040; +} RmaMacroStateUpdate; +typedef struct { + U I5; + U state; + U I1041; + UB I1039; + U * I1042; +} RmaMacroState; +typedef struct { + U iinput; + RP I1043; +} RmaMultiInputLogicGateCg; +typedef struct { + U iinput; + RP ptable; + RP I1043; +} RmaSeqPrimEdgeInputCg; +typedef struct { + RmaEblk I726; + RP pcode; +} RmaSched0GateCg; +typedef struct { + RmaEblk I726; + RP pcode; + RP pfn; +} RmaUdpDeltaGateCg; +typedef struct { + RmaEblk I726; + RP pcode; + RP pfn; + scalar I1044; +} RmaSchedDeltaGateCg; +typedef struct { + UB I1045; + RP I1046; + RP I1047; +} RmaPropNodeSeqLhsSCg; +typedef struct { + RmaEblk I726; + RP pcode; + U I915; + U I715[1]; +} RmaBitEdgeEblk; +typedef struct { + U I5; + RP I807; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaGateDelay; +typedef struct { + U I5; + RP I807; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaGateBehavioralDelay; +typedef struct { + U I5; + union { + RP I1290; + RP I1578; + RP I1592; + } I781; + RmaIbfPcode I1028; +} RmaMPDelay; +typedef struct { + U I5; + RmaPulse I1048; + RmaIbfPcode I1028; +} RmaMPPulseHybridDelay; +typedef struct { + U I5; + RmaIbfPcode I1028; + RmaMps I1049; +} RmaMPHybridDelay; +typedef struct { + U I5; + U I1050; + RmaIbfPcode I1028; + RmaEblk I766; +} RmaMPHybridDelayPacked; +typedef struct { + U I5; + RmaIbfPcode I1028; + RmaMpspNewCsdf I1051; +} RmaMPPulseDelay; +typedef struct { + U I5; + RmaMpsp I1051; + RmaIbfPcode I1028; +} RmaMPPulseOptHybridDelay; +typedef struct _RmaBehavioralTransportDelay { + U I5; + RP I685; + RmaTransEventHdr I921; + RP I804; + RmaIbfPcode I1028; +} RmaBehavioralTransportDelayS; +typedef struct { + U I5; + U I685; + RmaTransEventHdr I921; + RP I804; + RmaIbfPcode I1028; +} RmaNtcTransDelay; +typedef struct { + U I5; + U I685; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaNtcTransMpwOptDelay; +typedef struct { + U I5; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaNtcTransZeroDelay; +typedef struct { + U I5; + U I1052; + U I1053; + RmaTransEventHdr I921; + RP I804; + RmaIbfPcode I1028; +} RmaNtcTransDelayRF; +typedef struct { + U I5; + U I1052; + U I1053; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaNtcTransMpwOptDelayRF; +typedef struct { + U I5; + RP I1054; + RmaTransEventHdr I921; + RP I804; + RmaIbfPcode I1028; +} RmaICTransDelay; +typedef struct { + U I5; + RP I1054; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaICTransMpwOptDelay; +typedef struct { + U I5; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaICTransZeroDelay; +typedef struct { + U I5; + RP I807; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaICSimpleDelay; +typedef struct { + U I5; + union { + RP psimple; + RP I1578; + RP I1592; + } I781; + RmaIbfPcode I1028; +} RmaICDelay; +typedef struct { + U I5; + RP I807; + RmaEblk I726; + RmaIbfPcode I1028; +} RmaPortDelay; +typedef struct { + U I890; + RP I1058; +} RmaRtlXEdgesLoad; +typedef struct { + U I5; + RmaRtlXEdgesLoad I1058[(5)]; +} RmaRtlXEdgesHdr; +typedef struct { + U I5; + US I1059; + US I1060 :1; + US I904 :15; + RP I1061; + RP I1062; + RP I1063; +} RmaRtlEdgeBlockHdr; +typedef struct { + RP I1064; + RP I1065; +} RemoteDbsedLoad; +typedef struct { + RmaEblk I726; + RP I1066; + RP I1067; + U I1068 :16; + U I1069 :2; + U I1070 :2; + U I1071 :1; + U I1072 :8; + U I904 :3; + U I471; + RP I1073; + RP I811[(5)]; + RP I813[(5)]; + US I1074; + US I1075; + RemoteDbsedLoad I1076[1]; +} RmaRtlEdgeBlock; +typedef struct TableAssign_ { + struct TableAssign_ * I880; + struct TableAssign_ * I798; + U I5; + U I1078 :1; + U I1079 :1; + U I1080 :2; + U I1081 :1; + U I706 :8; + U I1082 :1; + U I1083 :1; + U I1084 :1; + U I1085 :1; + U I1086 :1; + U I1087 :1; + U I904 :13; + RP ptable; + RP I1043; +} TableAssign; +typedef struct TableAssignLayoutOnClk_ { + struct TableAssignLayoutOnClk_ * I880; + struct TableAssignLayoutOnClk_ * I798; + U I5; + U I1078 :1; + U I1079 :1; + U I1080 :2; + U I1081 :1; + U I706 :8; + U I1082 :1; + U I1083 :1; + U I1084 :1; + U I1085 :1; + U I1086 :1; + U I1087 :1; + U I904 :13; + RP ptable; + RmaSeqPrimOutputOnClkS I1089; + RmaEblk I726; +} TableAssignLayoutOnClk; +typedef struct { + U state; + U I1090; +} RmaSeqPrimOutputOnClkOpt; +typedef struct TableAssignLayoutOnClkOpt_ { + struct TableAssignLayoutOnClkOpt_ * I880; + struct TableAssignLayoutOnClkOpt_ * I798; + U I1092; + U I1078 :1; + U I1079 :1; + U I1080 :2; + U I1081 :1; + U I706 :8; + U I1082 :1; + U I1083 :1; + U I1084 :1; + U I1085 :1; + U I1086 :1; + U I1087 :1; + U I904 :13; + RmaSeqPrimOutputOnClkOpt I1089; + RmaSeqPrimOutputEblkData I1093; +} TableAssignLayoutOnClkOpt; +typedef struct { + U I5; + RP I798; + RP I1094; +} RmaTableAssignList; +typedef struct { + U I5; + RP I798; + RP I1094; + RP I1095; + RP I1037; + US I706; + UB I978; + UB I1096; + UB I1097; + UB I772; + RP I1098[0]; +} RmaThreadTableAssignList; +typedef struct { + RP I1095; + RP I1037; + US I706; + UB I978; + UB I1096; + UB I1097; + UB I772; +} RmaThreadTableHeader; +typedef struct { + RP I1064; +} RmaWakeupListCg; +typedef struct { + RP I1064; +} RmaWakeupArrayCg; +typedef struct { + RP I1064; + RP I1099; +} RmaPreCheckWakeupListCg; +typedef struct { + RP I1064; + RP I1099; +} RmaPreCheckWakeupArrayCg; +typedef struct { + U I1100; + U I706; + RmaTimeStamp I1101[1]; +} RmaTsArray; +typedef struct { + U iinput; + RP I1102; +} RmaConditionsMdb; +typedef struct { + RP I1103; + RP I1104; + U I1105; +} RmaTcListHeader; +typedef struct { + RP I880; + RP I1106; + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; +} RmaTcCoreSimple; +typedef struct { + RP I880; + RP I1106; + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1117; +} RmaTcCoreConditional; +typedef struct { + RP I880; + RP I1106; + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1117; + RP I1118; +} RmaTcCoreConditionalOpt; +typedef struct { + RP I880; + RP I1106; + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1118; + RP I1119; + U I1120; + RmaConditionsMdb arr[1]; +} RmaTcCoreConditionalMtc; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; +} RmaTcCoreSimpleNoList; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1035; +} RmaTcCoreSimpleNoListMdb; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1117; +} RmaTcCoreConditionalNoList; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1117; + RP I1118; +} RmaTcCoreConditionalOptNoList; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1118; + RP I1119; + U I1120; + RmaConditionsMdb arr[1]; +} RmaTcCoreConditionalMtcNoList; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1118; + RP I1119; + RP I1035; + U I1120; + RmaConditionsMdb arr[1]; +} RmaTcCoreConditionalMtcNoListMdb; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + RP I1117; + RP I1035; +} RmaTcCoreConditionalNoListMdb; +typedef struct { + RP I1107; + RP I721; + U I1108; + scalar I890; + scalar I1109; + US I1110 :1; + US I1111 :1; + US I1112 :1; + US I1113 :1; + US I1114 :1; + US I1115 :1; + US I1116 :5; + U I1122; + RP I1123; + RP I1124; + RP I1117; + RP I1125; + RP I1126; + RmaTimeStamp I1127; +} RmaTcCoreNochange; +typedef struct { + RP I1128; + RP I880; +} RmaTcCoreNochangeList; +typedef struct { + RP I1102; + RmaTimeStamp I1129; + scalar I1130; +} RmaConditionalTSLoadNoList; +typedef struct { + RP I880; + RP I1102; + RmaTimeStamp I1129; + scalar I1130; +} RmaConditionalTSLoad; +typedef struct { + RmaTimeStamp I1129; + scalar I1130; + US I890; + RP I1118; +} RmaConditionalTSLoadOptNoList; +typedef struct { + RP I880; + RmaTimeStamp I1129; + scalar I1130; + US I890; + RP I1118; +} RmaConditionalTSLoadOpt; +typedef struct { + RP I1118; + RP I1131; + U I1120; + RmaConditionsMdb arr[1]; +} RmaConditionalTSLoadMtcNoList; +typedef struct { + RP I1035; + RP I1118; + RP I1131; + U I1120; + RmaConditionsMdb arr[1]; +} RmaConditionalTSLoadMtcNoListMdb; +typedef struct { + RP I880; + RP I1118; + RP I1131; + U I1120; + RmaConditionsMdb arr[1]; +} RmaConditionalTSLoadMtc; +typedef struct { + U I1132; + U I1133; + FlatNodeNum I1004; + U I915; + U I1134; + U I1135; + RmaIbfPcode I1028; + union { + scalar I1136; + vec32 I1137; + scalar * I1138; + vec32 * I1139; + } val; +} RmaScanSwitchData; +typedef struct { + RP I880; + RP I798; + RP I1140; +} RmaDoublyLinkedListElem; +typedef struct { + RP I1141; + U I1142 :1; + U I1143 :1; + U I1144 :1; + U I1145 :4; + U I904 :25; + U I1146; +} RmaSwitchGateInCbkListInfo; +typedef struct { + union { + RmaDoublyLinkedListElem I1640; + RmaSwitchGateInCbkListInfo I2; + } I699; + RmaIbfPcode I1028; +} RmaSwitchGate; +typedef struct RmaNonEdgeLoadData1_ { + US I1147; + scalar val; + scalar I1148 :1; + scalar I1149 :1; + scalar I1150 :1; + scalar I1151 :1; + scalar I1152 :1; + U I1153; + RP I811; + RP I1154; + RP I1004; + RP I1155; + RP I1156; +} RmaNonEdgeLoadData1; +typedef struct RmaNonEdgeLoadHdr1_ { + UB I1148; + UB I1157; + UB I978; + RmaNonEdgeLoadData1 * I1058; + RmaNonEdgeLoadData1 * I798; + void * I1158; +} RmaNonEdgeLoadHdr1; +typedef struct RmaNonEdgeLoadHdrPrl1_ { + U I1159; + RP I721; +} RmaNonEdgeLoadHdrPrl1; +typedef struct RmaChildClockProp_ { + RP I811; + RP I1160; + RP I1004; + RP pcode; + scalar val; +} RmaChildClockProp; +typedef struct RmaChildClockPropList1_ { + RmaChildClockProp * I1058; + RmaChildClockProp * I798; +} RmaChildClockPropList1; +typedef struct { + U I5; + U I1161; +} RmaHDLCosimDUTGate; +typedef struct { + UB I1162; + UB I1163 :1; + UB I1164 :1; + UB I1165 :1; + UB I1166 :1; + UB I904 :4; + US cedges; +} RmaMasterXpropLoadHdr; +typedef struct { + UB I1167; + UB I1168; + UB I1169; + UB I1170; + U cedges :30; + U I1164 :1; + U I1171 :1; + U I1172; + U I1173; + RP I1174; + RP I1175; + RmaRtlEdgeBlockHdr * I1176; +} RmaChildXpropLoadHdr; +struct clock_load { + U I181 :5; + U I182 :12; + U I183 :1; + U I184 :2; + U I185 :1; + U I186 :1; + U I187 :1; + U I188 :9; + U I189; + U I190; + void (* pfn)(void * I192, char val); +}; +typedef struct clock_data { + U I197 :1; + U I198 :1; + U I199 :1; + U I200 :1; + U I181 :5; + U I182 :12; + U I201 :6; + U I202 :1; + U I184 :2; + U I185 :1; + U I188 :1; + U I203; + U I204; + U I205; + U I189; + U I206; + U I207; + U I208; + U I209; + U I210; +} HdbsClockData; +struct clock_hiconn { + U I214; + U I215; + U I189; + U I184; +}; +typedef struct _RmaDaiCg { + RP I1177; + RP I1178; + U I1179; +} RmaDaiCg; +typedef union _RmaCbkMemOptUnion { + RP I1177; + RP I1180; + RP I1181; +} RmaCbkMemOptUnion; +typedef struct _RmaDaiOptCg { + RmaCbkMemOptUnion I1182; +} RmaDaiOptCg; +struct futq_slot2 { + U I758; + U I759[32]; +}; +struct futq_slot1 { + U I755; + struct futq_slot2 I756[32]; +}; +struct futq_info { + scalar * I750; + U I751; + U I752; + struct futq_slot1 I753[32]; +}; +struct futq { + struct futq * I740; + struct futq * I742; + RmaEblk * I743; + RmaEblk * I744; + U I731; + U I1; +}; +struct sched_table { + struct futq * I745; + struct futq I746; + struct hash_bucket * I747; + struct hash_bucket * I749; +}; +struct dummyq_struct { + clock_struct I1183; + EBLK * I1184; + EBLK * I1185; + EBLK * I1186; + struct futq * I1187; + struct futq * I1188; + struct futq * I1189; + struct sched_table * I1190; + struct futq_info * I1192; + struct futq_info * I1194; + U I1195; + U I1196; + U I1197; + U I1198; + U I1199; + U I1200; + U I1201; + struct millenium * I1202; + EBLK * I1204; + EBLK * I1205; + EBLK * I1206; + EBLK * I1207; + EBLK * I1208; + EBLK * I1209; + EBLK * I1210; + EBLK * I1211; + EBLK * I1212; + EBLK * I1213; + EBLK * I1214; + EBLK * I1215; + EBLK * I1216; + EBLK * I1217; + EBLK * I1218; + EBLK * I1219; + EBLK * I1220; + EBLK * I1221; + MPS * I1222; + struct retain_t * I1223; + EBLK * I1224; + EBLK * I1225; + EBLK * I1226; + EBLK * I1227; + EBLK * I1228; + EBLK * I1229; + EBLK * I1230; + EBLK * I1231; + EBLK * I1232; + EBLK * I1233; + EBLK * I1234; + EBLK * I1235; + EBLK * I1236; + EBLK * I1237; + EBLK * I1238; + EBLK * I1239; + EBLK * I1240; + EBLK * I1241; + EBLK * I1242; + EBLK * I1243; + EBLK * I1244; + EBLK * I1245; + EBLK * I1246; + EBLK * I1247; + EBLK * I1248; + EBLK * I1249; + EBLK I1250; + EBLK * I1251; + EBLK * I1252; + EBLK * I1253; + EBLK * I1254; + int I1255; + int I1256; + struct vcs_globals_t * I1257; + clock_struct I1258; + unsigned long long I1259; + EBLK * I1260; + EBLK * I1261; + void * I1262; +}; +typedef void (* FP)(void * , scalar ); +typedef void (* FP1)(void * ); +typedef void (* FPRAP)(void * , vec32 * , U ); +typedef U (* FPU1)(void * ); +typedef void (* FPV)(void * , UB * ); +typedef void (* FPVU)(void * , UB * , U ); +typedef void (* FPLSEL)(void * , scalar , U ); +typedef void (* FPLSELV)(void * , vec32 * , U , U ); +typedef void (* FPFPV)(UB * , UB * , U , U , U , U , U , UB * , U ); +typedef void (* FPFA)(UB * , UB * , U , U , U , U , U , U , UB * , U ); +typedef void (* FPRPV)(UB * , U , U , U ); +typedef void (* FPEVCDLSEL)(void * , scalar , U , UB * ); +typedef void (* FPEVCDLSELV)(void * , vec32 * , U , U , UB * ); +typedef void (* FPNTYPE_L)(void * , void * , U , U , UB * , UB * , UB * , UB * , UB * , UB * , UB * , U ); +typedef void (* FPNTYPE_H)(void * , void * , U , U , UB * , UB * , UB * , UB * , U ); +typedef void (* FPNTYPE_LPAP)(void * , void * , void * , U , U , UB * , UB * , U ); +typedef void (* FPNTYPE_HPAP)(void * , void * , void * , U , U , UB * , UB * , UB * , UB * , U ); +typedef struct _lqueue { + EBLK * I727; + EBLK * I1263; + int I1264; + struct _lqueue * I769; +} Queue; +typedef struct { + void * I1266; + void * I1267; + void * I1268[2]; + void * I1269; +} ClkLevel; +typedef struct { + unsigned long long I1270; + EBLK I1171; + U I1271; + U I1272; + union { + void * pHeap; + Queue * pList; + } I699; + unsigned long long I1273; + ClkLevel I1274; + Queue I1275[1]; +} Qhdr; +extern UB Xvalchg[]; +extern UB X4val[]; +extern UB X3val[]; +extern UB X2val[]; +extern UB XcvtstrTR[]; +extern UB Xcvtstr[]; +extern UB Xbuf[]; +extern UB Xbitnot[]; +extern UB Xwor[]; +extern UB Xwand[]; +extern U Xbitnot4val[]; +extern UB globalTable1Input[]; +extern __thread unsigned long long vcs_clocks; +extern UB Xunion[]; +extern U fRTFrcRelCbk; +extern FP txpFnPtr; +extern FP rmaFunctionArray[]; +extern UP rmaFunctionRtlArray[]; +extern FP rmaFunctionLRArray[]; +extern U rmaFunctionCount; +extern U rmaFunctionLRCount; +extern U rmaFunctionLRDummyCount; +extern UP rmaFunctionDummyEndPtr; +extern FP rmaFunctionFanoutArray[]; +extern __thread UB dummyScalar; +extern __thread UB fScalarIsForced; +extern __thread UB fScalarIsReleased; +extern U fNotimingchecks; +extern U fFsdbDumpOn; +extern RP * iparr; +extern FP1 * rmaPostAnySchedFnPtr; +extern FP1 * rmaPostAnySchedFnSamplePtr; +extern FP1 * rmaPostAnySchedVFnPtr; +extern FP1 * rmaPostAnySchedWFnPtr; +extern FP1 * rmaPostAnySchedEFnPtr; +extern FP1 * rmaPostSchedUpdateClockStatusFnPtr; +extern FP1 * rmaPostSchedUpdateClockStatusNonCongruentFnPtr; +extern FP1 * rmaPostSchedUpdateEvTrigFnPtr; +extern FP1 * rmaSched0UpdateEvTrigFnPtr; +extern FP1 * rmaPostSchedRecoveryResetDbsFnPtr; +extern U fGblDataOrTime0Prop; +extern UB rmaEdgeStatusValArr[]; +extern FP1 * propForceCbkSPostSchedCgFnPtr; +extern FP1 * propForceCbkMemoptSPostSchedCgFnPtr; +extern UB * ptableGbl; +extern U * vcs_ptableOffsetsGbl; +extern UB * expandedClkValues; +extern __thread Qhdr * lvlQueue; +extern __thread unsigned threadIndex; +extern int cPeblkThreads; +extern US xedges[]; +extern U mhdl_delta_count; +extern U ignoreSchedForScanOpt; +extern U fignoreSchedForDeadComboCloud; +extern int fZeroUser; +extern U fEveBusPullVal; +extern U fEveBusPullFlag; +extern U fFutEventPRL; +extern U fParallelEBLK; +extern U fBufferingEvent; +extern __thread UB fNettypeIsForced; +extern __thread UB fNettypeIsReleased; +extern EBLK * peblkFutQ1Head; +extern EBLK * peblkFutQ1Tail; +extern US * edgeActionT; +extern unsigned long long * derivedClk; +extern U fHashTableSize; +extern U fSkipStrChangeOnDelay; +extern U fHsimTcheckOpt; +extern scalar edgeChangeLookUp[4][4]; +extern U fDoingTime0Prop; +extern U fLoopDetectMode; +extern int gFLoopDectCodeEna; +extern U fLoopReportRT; + + +extern void *mempcpy(void* s1, void* s2, unsigned n); +extern UB* rmaEvalDelays(UB* pcode, scalar val); +extern UB* rmaEvalDelaysV(UB* pcode, vec32* pval); +extern void rmaPopTransEvent(UB* pcode); +extern void rmaSetupFuncArray(UP* ra, U c, U w); +extern void rmaSetupRTLoopReportPtrs(UP* funcs, UP* rtlFuncs, U cnt, U cntDummy, UP end); +extern void SinitHsimPats(void); +extern void VVrpDaicb(void* ip, U nIndex); +extern int SDaicb(void *ip, U nIndex); +extern void SDaicbForHsimNoFlagScalar(void* pDaiCb, unsigned char value); +extern void SDaicbForHsimNoFlagStrengthScalar(void* pDaiCb, unsigned char value); +extern void SDaicbForHsimNoFlag(void* pRmaDaiCg, unsigned char value); +extern void SDaicbForHsimNoFlag2(void* pRmaDaiCg, unsigned char value); +extern void SDaicbForHsimWithFlag(void* pRmaDaiCg, unsigned char value); +extern void SDaicbForHsimNoFlagFrcRel(void* pRmaDaiCg, unsigned char reason, int msb, int lsb, int ndx); +extern void SDaicbForHsimNoFlagFrcRel2(void* pRmaDaiCg, unsigned char reason, int msb, int lsb, int ndx); +extern void VcsHsimValueChangeCB(void* pRmaDaiCg, void* pValue, unsigned int valueFormat); +extern U isNonDesignNodeCallbackList(void* pRmaDaiCg); +extern void SDaicbForHsimCbkMemOptNoFlagScalar(void* pDaiCb, unsigned char value, unsigned char isStrength); +extern void SDaicbForHsimCbkMemOptWithFlagScalar(void* pDaiCb, unsigned char value, unsigned char isStrength); +extern void SDaicbForHsimCbkMemOptNoFlagScalar(void* pDaiCb, unsigned char value, unsigned char isStrength); +extern void SDaicbForHsimCbkMemOptWithFlagScalar(void* pDaiCb, unsigned char value, unsigned char isStrength); +extern void VVrpNonEventNonRegdScalarForHsimOptCbkMemopt(void* ip, U nIndex); +extern void SDaicbForHsimCbkMemOptNoFlagDynElabScalar(U* mem, unsigned char value, unsigned char isStrength); +extern void SDaicbForHsimCbkMemOptWithFlagDynElabScalar(U* mem, unsigned char value, unsigned char isStrength); +extern void SDaicbForHsimCbkMemOptNoFlagDynElabFrcRel(U* mem, unsigned char reason, int msb, int lsb, int ndx); +extern void SDaicbForHsimCbkMemOptNoFlagFrcRel(void* pDaiCb, unsigned char reason, int msb, int lsb, int ndx); +extern void hsimDispatchCbkMemOptForVcd(RP p, U val); +extern void* hsimGetCbkMemOptCallback(RP p); +extern void hsimDispatchCbkMemOptNoDynElabS(RP* p, U val, U isStrength); +extern void* hsimGetCbkPtrNoDynElab(RP p); +extern void hsimDispatchCbkMemOptDynElabS(U** pvcdarr, U** pcbkarr, U val, U isScalForced, U isScalReleased, U isStrength); +extern void hsimDispatchCbkMemOptNoDynElabVector(RP* /*RmaDaiOptCg* */p, void* pval, U /*RmaValueType*/ vt, U cbits); +extern void copyAndPropRootCbkCgS(RmaRootCbkCg* pRootCbk, scalar val); +extern void copyAndPropRootCbkCgV(RmaRootCbkCg* rootCbk, vec32* pval); +extern void copyAndPropRootCbkCgW(RmaRootCbkCg* rootCbk, vec32* pval); +extern void copyAndPropRootCbkCgE(RmaRootCbkCg* rootCbk, scalar* pval); +extern void Wsvvar_callback_non_dynamic1(RP* ptr, int); +extern void rmaExecEvSyncList(RP plist); +extern void Wsvvar_callback_virt_intf(RP* ptr); +extern void Wsvvar_callback_hsim_var(RP* ptr); +extern void checkAndConvertVec32To2State(vec32* value, vec32* svalue, U cbits, U* pforcedBits); +extern unsigned int fGblDataOrTime0Prop; +extern void SchedSemiLerMP1(UB* pmps, U partId); +extern void SchedSemiLerMPO(UB* pmpso, U partId); +extern void rmaDummyPropagate(void); +extern RP rmaTestCg(RP pcode, U vt, UB* value); +extern void hsUpdateModpathTimeStamp(UB* pmps); +extern void doMpd32One(UB* pmps); +extern void doMpdCommon(MPS* pmps); +extern TimeStamp GET_DIFF_DELAY_FUNC(TimeStamp ts); +extern void SchedSemiLerMP(UB* ppulse, U partId); +extern EBLK *peblkFutQ1Head; +extern EBLK *peblkFutQ1Tail; +extern void scheduleuna(UB *e, U t); +extern void scheduleuna_mp(EBLK *e, unsigned t); +extern void schedule(UB *e, U t); +extern void sched_hsopt(struct dummyq_struct * pQ, EBLK *e, U t); +extern void sched_millenium(struct dummyq_struct * pQ, void *e, U thigh, U t); +extern void schedule_1(EBLK *e); +extern void sched0(UB *e); +extern void sched0Raptor(UB *e); +extern void sched0lq(EBLK *e); +extern void sched0lqnc(EBLK *e); +extern void sched0una(UB *e); +extern void sched0una_th(struct dummyq_struct *pq, UB *e); +extern void hsopt_sched0u_th(struct dummyq_struct *pq, UB *e); +extern void scheduleuna_mp_th(struct dummyq_struct *pq, EBLK *e, unsigned t); +extern void schedal(UB *e); +extern void sched0_th(struct dummyq_struct * pQ, EBLK *e); +extern void sched0u(UB *e); +extern void sched0u_th(struct dummyq_struct *pq, UB *e); +extern void sched0_hsim_front_th(struct dummyq_struct * pQ, UB *e); +extern void sched0_hsim_frontlq_th(struct dummyq_struct * pQ, UB *e); +extern void sched0lq_th(struct dummyq_struct * pQ, UB *e); +extern void schedal_th(struct dummyq_struct * pQ, UB *e); +extern void scheduleuna_th(struct dummyq_struct * pQ, void *e, U t); +extern void schedule_th(struct dummyq_struct * pQ, UB *e, U t); +extern void schedule_1_th(struct dummyq_struct * pQ, EBLK *peblk); +extern void SetupLER_th(struct dummyq_struct * pQ, EBLK *e); +extern void FsdbReportClkGlitch(UB*,U); +extern void AddToClkGLitchArray(EBLK*); +extern void SchedSemiLer_th(struct dummyq_struct * pQ, EBLK *e); +extern void SchedSemiLerTXP_th(struct dummyq_struct * pQ, EBLK *e); +extern void SchedSemiLerTXPFreeVar_th(struct dummyq_struct * pQ, EBLK *e); +extern U getVcdFlags(UB *ip); +extern void VVrpNonEventNonRegdScalarForHsimOpt(void* ip, U nIndex); +extern void VVrpNonEventNonRegdScalarForHsimOpt2(void* ip, U nIndex); +extern void SchedSemiLerTBReactiveRegion(struct eblk* peblk); +extern void SchedSemiLerTBReactiveRegion_th(struct eblk* peblk, U partId); +extern void SchedSemiLerTr(UB* peblk, U partId); +extern void SchedSemiLerNBA(UB* peblk, U partId); +extern void NBA_Semiler(void *ip, void *pNBS); +extern void sched0sd_hsim(UB* peblk); +extern void vcs_sched0sd_hsim_udpclk(UB* peblk); +extern void vcs_sched0sd_hsim_udpclkopt(UB* peblk); +extern void sched0sd_hsim_PRL(UB* peblk); +extern void sched0lq_parallel_clk(EBLK* peblk); +extern U isRtlClockScheduled(EBLK* peblk); +extern void doFgpRaceCheck(UB* pcode, UB* p, U flag); +extern void doSanityLvlCheck(); +extern void sched0lq_parallel_ova(EBLK* peblk); +extern void sched0lq_parallel_ova_precheck(EBLK* peblk); +extern void rmaDlpEvalSeqPrim(UB* peblk, UB val, UB preval); +extern void appendNtcEvent(UB* phdr, scalar s, U schedDelta); +extern void appendTransEventS(RmaTransEventHdr* phdr, scalar s, U schedDelta); +extern void schedRetainHsim(MPS* pMPS, scalar sv, scalar pv); +extern void updateRetainHsim(MPS* pMPS,scalar sv, scalar pv); +extern void hsimCountXEdges(void* record, scalar s); +extern void hsimRegisterEdge(void* sm, scalar s); +extern U pvcsGetPartId(); +extern void HsimPVCSPartIdCheck(U instNo); +extern void debug_func(U partId, struct dummyq_struct* pQ, EBLK* EblkLastEventx); +extern struct dummyq_struct* pvcsGetQ(U thid); +extern EBLK* pvcsGetLastEventEblk(U thid); +extern void insertTransEvent(RmaTransEventHdr* phdr, scalar s, scalar pv, scalar resval, U schedDelta, int re, UB* predd, U fpdd); +extern void insertNtcEventRF(RmaTransEventHdr* phdr, scalar s, scalar pv, scalar resval, U schedDelta, U* delays); +extern U doTimingViolation(RmaTimeStamp ts,RP* pdata, U fskew, U limit, U floaded, U fcondopt, RmaTimeStamp tsNochange); +extern void sched_gate_hsim(EBLK* peblk, unsigned t, RP* offset, U gd_info, U encodeInPcode, void* propValue); +extern int getCurSchedRegion(); +extern FP getRoutPtr(RP, U); +extern U rmaChangeCheckAndUpdateE(scalar* pvalDst, scalar* pvalSrc, U cbits); +extern void rmaUpdateE(scalar* pvalDst, scalar* pvalSrc, U cbits); +extern U rmaChangeCheckAndUpdateEFromW(scalar* pvalDst, vec32* pvalSrc, U cbits); +extern void rmaLhsPartSelUpdateE(scalar* pvalDst, scalar* pvalSrc, U index, U width); +extern void rmaUpdateWithForceSelectorE(scalar* pvalDst, scalar* pvalSrc, U cbits, U* pforceSelector); +extern void rmaUpdateWFromE(vec32* pvalDst, scalar* pvalSrc, U cbits); +extern U rmaLhsPartSelWithChangeCheckE(scalar* pvalDst, scalar* pvalSrc, U index, U width); +extern void rmaLhsPartSelWFromE(vec32* pvalDst, scalar* pvalSrc, U index,U width); +extern U rmaChangeCheckAndUpdateW(vec32* pvalDst, vec32* pvalSrc, U cbits); +extern void rmaUpdateW(vec32* pvalDst, vec32* pvalSrc, U cbits); +extern void rmaUpdateEFromW(scalar* pvalDst, vec32* pvalSrc, U cbits); +extern void *VCSCalloc(size_t size, size_t count); +extern void *VCSMalloc(size_t size); +extern void VCSFree(void *ptr); +extern U rmaLhsPartSelWithChangeCheckW(vec32* pvalDst, vec32* pvalSrc, U index,U width); +extern void rmaLhsPartSelEFromW(scalar* pvalDst, vec32* pvalSrc, U index,U width); +extern U rmaLhsPartSelWithChangeCheckEFromW(scalar* pvalDst, vec32* pvalSrc, U index,U width); +extern void rmaLhsPartSelUpdateW(vec32* pvalDst, vec32* pvalSrc, U index, U width); +extern void rmaEvalWunionW(vec32* dst, vec32* src, U cbits, U count); +extern void rmaEvalWorW(vec32* dst, vec32* src, U cbits, U count); +extern void rmaEvalWandW(vec32* dst, vec32* src, U cbits, U count); +extern void rmaEvalUnionE(scalar* dst, scalar* src, U cbits, U count, RP ptable); +typedef U RmaCgFunctionType; +extern RmaIbfPcode* rmaEvalPartSelectsW(vec32* pvec32, U startIndex, U onWidth, U offWidth, U count, RmaIbfPcode* pibfPcode, U fnonRootForce, UB* pevcdStatus); +extern RmaIbfPcode* rmaEvalPartSelectsWLe32(vec32* pvec32, U startIndex, U onWidth, U offWidth, U count, RmaIbfPcode* pibfPcode, U fnonRootForce, UB* pevcdStatus); +extern RmaIbfPcode* rmaEvalPartSelectsWToE(vec32* pvec32, U startIndex, U onWidth, U offWidth, U count, RmaIbfPcode* pibfPcode, U fnonRootForce); +extern RmaIbfPcode* rmaEvalPartSelectsEToE(scalar* pv, U startIndex, U onWidth, U offWidth, U count, RmaIbfPcode* pibfPcode, U fnonRootForce, UB* pevcdStatus); +extern RmaIbfPcode* rmaEvalPartSelectsEToW(scalar* pv, U startIndex, U onWidth, U offWidth, U count, RmaIbfPcode* pibfPcode, U fnonRootForce); +extern U rmaEvalBitPosEdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitNegEdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitChangeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U VcsForceVecVCg(UB* pcode, UB* pval, UB* pvDst, UB* pvCur, U fullcbits, U ibeginSrc, U ibeginDst, U width, U/*RmaValueConvType*/ convtype, U/*RmaForceType*/ frcType, UB* prhs, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsReleaseVecVCg(UB* pcode, UB* pvDst, U fullcbits, U ibeginDst, U width, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsForceVecWCg(UB* pcode, UB* pval, UB* pvDst, UB* pvCur, U fullcbits, U ibeginSrc, U ibeginDst, U width, U/*RmaValueConvType*/ convtype, U /*RmaForceType*/ frcType, UB* prhs, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsReleaseVecWCg(UB* pcode, UB* pvDst, U fullcbits, U ibeginDst, U width, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsForceVecECg(UB* pcode, UB* pval, UB* pvDst, UB* pvCur, U fullcbits, U ibeginSrc, U ibeginDst, U width, U /*RmaValueConvType*/ convtype, U /*RmaForceType*/ frcType,UB* prhs, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsForceVecACg(UB* pcode, UB* pval, UB* pvDst, UB* pvCur, U fullcbits, U ibeginSrc, U ibeginDst, U width, U /*RmaValueConvType*/ convtype, U /*RmaForceType*/ frcType,UB* prhs, UB* prhsDst, U frhs, U* pforcedbits, U fisRoot); +extern U VcsReleaseVecCg(UB* pcode, UB* pvDst, U ibeginDst, U width, U /*RmaValueType*/ type,U fisRoot, UB* prhsDst, U frhs, U* pforcedbits); +extern U VcsDriveBitsAndDoChangeCheckV(vec32* pvSel, vec32* pvCur, U fullcbits, U* pforcedbits, U isRoot); +extern U VcsDriveBitsAndDoChangeCheckW(vec32* pvSel, vec32* pvCur, U fullcbits, U* pforcedbits, U isRoot); +extern U VcsDriveBitsAndDoChangeCheckE(scalar* pvSel, scalar* pvCur, U fullcbits, U* pforcedbits, U isRoot); +extern void cgvecDebug_Eblk(UB* pcode); +extern U rmaCmpW(vec32* pvalDst, vec32* pvalSrc, U index, U width); +extern void copyVec32ArrMask(vec32* pv1, vec32* pv2, U len, U* mask); +extern void* memcpy(void*, const void*, size_t); +extern int memcmp(const void*, const void*, size_t); +extern void propagateScanOptPathVal(EBLK *peblk); +extern UB* rmaProcessScanSwitches(UB* pcode, scalar val); +extern UB* rmaProcessScanSwitchesV(UB* pcode, vec32 *pval); +extern UB* rmaProcessScanoptDump(UB* pcode, scalar val); +extern UB* rmaProcessScanoptDumpV(UB* pcode, vec32 *pval); +extern UB* rmaProcessScanChainOptSeqPrims(UB* pcode, scalar val); +extern void rmaProcessPvcsCcn(UB* pcode, scalar val); +extern void rmaProcessPvcsCcnE(UB* pcode, scalar* val); +extern void rmaProcessPvcsCcnW(UB* pcode, vec32* val); +extern void rmaProcessPvcsCcnV(UB* pcode, vec32* val); +extern void rmaProcessPvcsCcnCompiledS(UB* pcode, U offset, scalar ibnval); +extern void rmaProcessPvcsCcnCompiledV(UB* pcode, U offset, vec32* pval); +extern void schedResetRecoveryDbs(U cedges, EBLK* peblkFirst); +extern UB* rmaEvalUnaryOpV(UB* pcode, vec32* pval); +extern UB* rmaEvalBinaryOpV(UB* pcode, vec32* pval); +extern UB* rmaEvalBinaryOpVOneFanoutCount(UB* pcode, vec32* pval); +extern UB* rmaEvalBinaryOpVLargeFanoutCount(UB* pcode, vec32* pval); +extern UB* rmaEvalAndOpVOneFanoutCount(UB* pcode, vec32* value); +extern UB* rmaEvalAndOpVLargeFanoutCount(UB* pcode, vec32* value); +extern UB* rmaEvalAndOpV(UB* pcode, vec32* value); +extern UB* rmaEvalOrOpVOneFanoutCount(UB* pcode, vec32* value); +extern UB* rmaEvalOrOpVLargeFanoutCount(UB* pcode, vec32* value); +extern UB* rmaEvalOrOpV(UB* pcode, vec32* value); +extern UB* rmaEvalTernaryOpV(UB* pcode, vec32* pval); +extern UB* rmaEvalUnaryOpW(UB* pcode, vec32* pval); +extern UB* rmaEvalBinaryOpW(UB* pcode, vec32* pval); +extern UB* rmaEvalTernaryOpW(UB* pcode, vec32* pval); +extern UB* rmaEvalUnaryOpE(UB* pcode, scalar* pv); +extern UB* rmaEvalBinaryOpE(UB* pcode, scalar* pv); +extern UB* rmaEvalTernaryOpE(UB* pcode, scalar* pv); +extern UB* rmaEvalTernaryOpS(UB* pcode, scalar val); +extern scalar rmaGetScalarFromWCg(vec32* pval, U index); +extern void rmaSetScalarInWCg(vec32* pval, U index, scalar s); +extern void rmaSetWInW(vec32* dst, vec32* src, U index, U indexSrc, U width); +extern void rmaCountRaptorBits(void* pval, void* pvalPrev, U cbits, U vt); +extern void setHsimFunc(void* ip); +extern void unsetHsimFunc(void* ip); +extern UB* getEvcdStatusByFlagsE(scalar* pscalar, UB* pevcdTBDriverFlags, U cdrivers, UB* table, U cbits); +extern UB* getEvcdStatusByFlagsV(vec32* pvec32, UB* pevcdTBDriverFlags, U cdrivers, UB* table, U cbits); +extern UB* getEvcdStatusByFlagsW(vec32* pvec32, UB* pevcdTBDriverFlags, U cdrivers, UB* table, U cbits); +extern UB* getEvcdStatusByFlagsS(scalar* pscalar, UB* pevcdTBDriverFlags, U cdrivers, UB* table); +extern UB* getSingleDrvEvcdStatusS(UB value, U fTBDriver); +extern UB* getSingleDrvEvcdStatusE(scalar* pscalars, U fTBDriver, U cbits); +extern UB* getSingleDrvEvcdStatusV(scalar* pscalars, U fTBDriver, U cbits); +extern UB* getSingleDrvEvcdStatusW(scalar* pscalars, U fTBDriver, U cbits); +extern UB* getEvcdStatusByDrvEvcdStatus(UB* pdrvevcdStatus, U cdrivers, UB* table, U cbits); +extern void evcdCallback(UP pcode, U cbits); +extern UB* getSavedEvcdStatus(void); +extern void saveEvcdStatus(UB*); +extern void mhdlMarkExport(void*, U); +extern void levelInsertQueue(int); +extern void VcsRciRtl(RP pcode); +extern U fLoopDetectMode; +extern int gFLoopDectCodeEna; +extern U fLoopReportRT; +extern void rtSched0LoopDectDumpProcess(void* e, void* rtn, void* PQ); +extern void pushHsimRtnCtxt(void* pcode); +extern void popHsimRtnCtxt(); +extern EBLK* loopReportInlinedSched0Wrapper(EBLK *peblk); +extern void loopReportSched0Wrapper(EBLK *peblk, unsigned int sfType, unsigned int fTH, struct dummyq_struct* pq); +extern void loopReportSchedSemiLerWrapper(EBLK *peblk, int sfType); +extern void CallGraphPushNodeAndAddToGraph(UP flatNode, UP instNum, U dummy); +extern void CallGraphPopNode(void); +extern RP elabGetIpTpl(U in); +extern U rmaEvalBitBothEdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitEdgeQ1W(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitEdgeQXW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitEdgeQ0W(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEval01EdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEval0XEdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEval10EdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEval1XEdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalX1EdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalX0EdgeW(vec32* pvalCurr, vec32* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitPosEdgeE(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitNegEdgeE(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitBothEdgeE(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitEdgeQ1E(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitEdgeQ0E(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern U rmaEvalBitChangeE(scalar* pvalCurr, scalar* pvalPrev, U cbits, U* pedges); +extern void rmaScheduleNbaGate(RP pcode, scalar val); +extern void rmaEvalRtlEdgeLoads(RmaRtlEdgeBlockHdr *phdr, US clkEdge, scalar clkVal, scalar prevClkVal, scalar val4, scalar prevval4, scalar master4val); +extern void rmaEvaluateDynamicGateLoadsCg(RP p, scalar s); +extern void rmaEvaluateFusedWithDynamicGateLoadsCg(RP p, scalar s); +extern void rmaScheduleGatedClockEdgeLoadNew(UB* p, US* ea, U flags, UB* plist, UB* pprevlist, scalar v); +extern void rmaScheduleGatedClockEdgeLoad(UB* p, US* ea, U flags, UB* plist, UB* pprevlist, scalar v); +extern void rmaRemoveNonEdgeLoads(UB* pcode); +extern void rmaRecordEvents(HsimNodeRecord *pnr); +extern void handlePCBs(UB* p, U i); +extern void markMasterClkOvaLists(U fdbs, RP p); +extern void rmaChildClockPropAfterWrite(UB* p); +extern void rmaSchedChildClockPropAfterWrite(UB* p, UB* pmasterList, UB val); +extern void HDLCosimProcessDUTInputChange(U inputId, void* val); +extern void rmaChangeListForMovedGates(UB clkVal, UB f10Edge, UB* subMasterVal, UB* plist, RP* p, U count); +extern void rmaEvalSeqPrimLoadsByteArray(UB* pcode, UB val, UB prevval4); +extern void rmaEvalSeqPrimLoadsByteArrayX(UB* pcode, UB val, UB prevval4); +extern void vcsRmaEvalSeqPrimLoadsByteArraySCT(UB* pcode, UB val, UB prevval4, U c); +extern void vcsAbortForBadEBlk(void); +extern scalar edgeChangeLookUp[4][4]; +extern void Wsvvar_sched_virt_intf_eval(RP* ptr); +extern void vcs_hwcosim_drive_dut_scalar(uint id, char val); +extern void vcs_hwcosim_drive_dut_vector_4state(uint id, vec32* val); +extern U vcs_rmaGetClkValForSeqUdpLayoutOnClkOpt(UB* poutput); +extern U rmaIsS2State(scalar s); +extern U rmaIsV2State(vec32* pval, U cbits); +extern U rmaIsW2State(vec32* pval, U cbits); +extern U rmaIsE2State(scalar* pval, U cbits); +extern void rmaUpdateRecordFor2State(HsimNodeRecord* record, U f2state); +typedef void (*FuncPtr)(); +static inline U asm_bsf (U in) +{ +#if defined(linux) + U out; +#if !defined(__aarch64__) + asm ("movl %1, %%eax; bsf %%eax, %%eax; movl %%eax, %0;" + :"=r"(out) + :"r"(in) + :"%eax" + ); +#else + out = ffs(in) - 1; +#endif + return out; +#else + return 0; +#endif +} + + +#ifdef __cplusplus +extern "C" { +#endif +void hs_0_M_0_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_0_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_1_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_1_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_2_21__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_2_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_2_5__simv_daidir (UB * pcode, U I915); +void hs_0_M_3_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_3_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_4_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_4_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_5_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_5_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_6_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_6_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_7_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_7_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_8_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_9_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_9_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_10_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_10_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_11_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_11_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_11_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_12_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_12_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_12_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_13_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_13_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_13_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_14_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_14_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_14_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_15_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_16_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_17_21__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_17_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_17_5__simv_daidir (UB * pcode, U I915); +void hs_0_M_18_21__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_18_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_18_6__simv_daidir (UB * pcode, scalar val, U I890); +void hs_0_M_18_7__simv_daidir (UB * pcode, vec32 * I1363, U I890, U I1373); +void hs_0_M_18_10__simv_daidir (UB * pcode, vec32 * I1006); +void hs_0_M_19_21__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_19_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_19_6__simv_daidir (UB * pcode, scalar val, U I890); +void hs_0_M_19_7__simv_daidir (UB * pcode, vec32 * I1363, U I890, U I1373); +void hs_0_M_19_10__simv_daidir (UB * pcode, vec32 * I1006); +void hs_0_M_20_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_21_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_22_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_23_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_24_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_25_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_26_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_27_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_28_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_29_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_30_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_31_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_32_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_33_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_34_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_35_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_35_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_35_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_36_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_37_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_38_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_39_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_40_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_41_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_41_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_41_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_42_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_42_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_42_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_43_21__simv_daidir (UB * pcode, scalar val); +void hs_0_M_43_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_43_11__simv_daidir (UB * pcode, scalar val); +void hs_0_M_44_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_45_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_46_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_47_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_48_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_49_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_50_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_51_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_52_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_53_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_54_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_55_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_55_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_56_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_56_5__simv_daidir (UB * pcode, UB val); +void hs_0_M_57_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_58_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_59_0__simv_daidir (UB * pcode, scalar val); +void hs_0_M_60_21__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_60_0__simv_daidir (UB * pcode, vec32 * I1006, U I915); +void hs_0_M_60_6__simv_daidir (UB * pcode, scalar val, U I890); +void hs_0_M_60_7__simv_daidir (UB * pcode, vec32 * I1363, U I890, U I1373); +void hs_0_M_60_10__simv_daidir (UB * pcode, vec32 * I1006); +void hsG_0__0 (struct dummyq_struct * I1289, EBLK * I1283, U I685); +#ifdef __cplusplus +} +#endif + +#ifdef __cplusplus + } +#endif +#endif /*__DO_RMAHDR_*/ + diff --git a/DA4008_V1.2/sim/lvds/csrc/rmapats.m b/DA4008_V1.2/sim/lvds/csrc/rmapats.m new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/csrc/rmapats.o b/DA4008_V1.2/sim/lvds/csrc/rmapats.o new file mode 100644 index 0000000..d0c32e0 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmapats.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/rmapats_mop.o b/DA4008_V1.2/sim/lvds/csrc/rmapats_mop.o new file mode 100644 index 0000000..a48b8cb Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmapats_mop.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar.c b/DA4008_V1.2/sim/lvds/csrc/rmar.c new file mode 100644 index 0000000..21b81fa --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/rmar.c @@ -0,0 +1,13 @@ +#include +#include +#include "rmar0.h" + +// stubs for Hil functions +#ifdef __cplusplus +extern "C" { +#endif +void __Hil__Static_Init_Func__(void) {} +#ifdef __cplusplus +} +#endif + diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar.h b/DA4008_V1.2/sim/lvds/csrc/rmar.h new file mode 100644 index 0000000..77865aa --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/rmar.h @@ -0,0 +1,18 @@ +#ifndef _RMAR1_H_ +#define _RMAR1_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef __DO_RMAHDR_ +#include "rmar0.h" +#endif /*__DO_RMAHDR_*/ + +extern UP rmaFunctionRtlArray[]; + +#ifdef __cplusplus +} +#endif +#endif + diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar.o b/DA4008_V1.2/sim/lvds/csrc/rmar.o new file mode 100644 index 0000000..1989370 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmar.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar0.h b/DA4008_V1.2/sim/lvds/csrc/rmar0.h new file mode 100644 index 0000000..48e8516 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/csrc/rmar0.h @@ -0,0 +1,13 @@ +#ifndef _RMAR0_H_ +#define _RMAR0_H_ + +#ifdef __cplusplus +extern "C" { +#endif + + +#ifdef __cplusplus +} +#endif +#endif + diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_0.o b/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_0.o new file mode 100644 index 0000000..3663b36 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_0.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_1.o b/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_1.o new file mode 100644 index 0000000..0119f49 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmar_llvm_0_1.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/rmar_nd.o b/DA4008_V1.2/sim/lvds/csrc/rmar_nd.o new file mode 100644 index 0000000..99927ba Binary files /dev/null and b/DA4008_V1.2/sim/lvds/csrc/rmar_nd.o differ diff --git a/DA4008_V1.2/sim/lvds/csrc/vcspieces.incr b/DA4008_V1.2/sim/lvds/csrc/vcspieces.incr new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/dprof.dir/t0.conf b/DA4008_V1.2/sim/lvds/dprof.dir/t0.conf new file mode 100644 index 0000000..b787c00 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/dprof.dir/t0.conf @@ -0,0 +1,126 @@ +#dump IP Tree for debugging +dumpIPTree : 0 + +#grouping delta cycles with same q-type +groupDeltaCycles : 1 + +#overrite dprof report (without _ suffix +overriteReport : 0 + +#not creating profiling directory +noDir : 0 + +#dump internal configs in timeline report +dumpConfig : 0 + +#enable diagnostics for dynamic interval changings +diagDynInterval : 0 + +#not generate file report (directy output instead) +noFileReport : 0 + +#plot execution completion graph +plotECG : 0 + +#show fgp master simulation time +fgpDesignCheck : 0 + +#show just exclusive event execution time +showOldExclEvtTime : 0 + +#trace events scheduling +trace.eventSched : 0 + +#trace event cost in each sim-time +trace.eachSimTime : 0 + +#trace event cost in all sim-time +trace.allSimTime : 0 + +#trace data cost in events +trace.dataCost : 0 + +#trace vpd changes for in events +trace.vpd : 0 + +#number of cycles to be skipped before tracking most active simulation cycles +numSkipCycles : 0 + +#simluation time when to start profiling +startSimTime : 0 + +#directory of control file +ctrlFileDir : ./ + +#help in tuning busy-wait time profiling +minBusyWaitCnt : 128 + +#minimum micro-seconds for simulation time range (default:500000) +minRangeSize : 500000 + +#minimum cost (in percentage) for event cost reporting (default:0.5%%) +minEventCostReport : 0.1 + +#number of high fan-out events reported (default:1024) +numHighFanOutEvents : 1024 + +#try to merge events before simluation finishes, so to improve reporting performance +mergeEvents : 1 + +#test the consitency of events counter between light-dprof and dprof +testLight : 0 + +#count the events have been elaborated in simulation time +countElabEBlks : 0 + +#don't wrap PEBLKs (for testing only) +noWrapPEBlks : 0 + +#report event cost +reportEventCost : 0 + +#debug mode for eblk thunk +debugEBlkThunk : 0 + +#max number of events in report +maxNumEventsInReport : 50 + +#start time to trace event +traceEventStart : -1 + +#number of cycles to trace event (default:1024) +traceEventCycles : 1024 + +#report exclusive clk-load +exclReportClkLoad : 1 + +#debug execlusive events report +debugExclEvts : 0 + +#use cpu cycles in exclusive report (for debug only) +useCpuCyclesinExclReport : 0 + +#max detla cycles allowed (profiling will be shut down if exceeded) +maxDeltaNum : 1000000 + +#show dummy exclusive events +showDummyExclEvts : 0 + +#report global locks +reportGlobalLocks : 0 + +#report only exclusive events (for debug) +reportOnlyExclEvts : 0 + +#give warning message if having uknown events (for test only) +warnOnUnknownEvts : 0 + +#report UVM time profile +uvmtpc : 0 + +#report UVM time profile tb reactive as boundary +uvmtpc_tbr : 0 + +#report UVM time profile ler as boundary +uvmtpc_ler : 0 + diff --git a/DA4008_V1.2/sim/lvds/dprof.dir/timeline.txt b/DA4008_V1.2/sim/lvds/dprof.dir/timeline.txt new file mode 100644 index 0000000..b778cfc --- /dev/null +++ b/DA4008_V1.2/sim/lvds/dprof.dir/timeline.txt @@ -0,0 +1,54 @@ +# time : 2026-03-13:18:07:28 +# tag : shbyang_cryo1_t1773396448_p117831_pp117830 +# time_precision : 1 ps +# legends : epc - average events executed per simulation cycle +# : cycles - number of simulation cycles +# : sim-time - actual simulation timestamp +# : total - total thousand events executed in the simulation time range +# : cpu-time - actual cpu time used (in milli-seconds) +# : %cpu - cpu utilization ratio (cpu-time/real-time) +####################################### +# DProf Simulation Timeline Report # +####################################### +# epc cycles sim-time-range total cpu-time + 493 1 [0,0] 0.49 63.56 + 4 1024 [5000,3425200] 5.11 1.52 + 4 1024 [3430000,6840000] 4.78 1.31 + 4 1024 [6845000,10255000] 4.78 1.30 + 4 1024 [10255200,13665200] 4.78 1.31 + 4 1024 [13670000,17080000] 4.78 1.29 + 4 1024 [17085000,20495000] 4.78 1.35 + 4 1024 [20495200,23905200] 4.78 0.49 + 4 1024 [23910000,27320000] 4.78 0.40 + 4 1024 [27325000,30735000] 4.78 0.42 + 4 1024 [30735200,34145200] 4.78 0.39 + 4 1024 [34150000,37560000] 4.78 0.41 + 4 1024 [37565000,40975000] 4.78 0.40 + 4 1024 [40975200,44385200] 4.78 0.40 + 4 1024 [44390000,47800000] 4.78 0.41 + 4 1024 [47805000,51215000] 4.78 0.41 + 4 1024 [51215200,54625200] 4.78 0.54 + 4 1024 [54630000,58040000] 4.78 0.61 + 4 1024 [58045000,61455000] 4.78 0.53 + 4 1024 [61455200,64865200] 4.78 0.40 + 4 1024 [64870000,68280000] 4.78 0.41 + 4 1024 [68285000,71695000] 4.78 0.40 + 4 1024 [71695200,75105200] 4.78 0.41 + 4 1024 [75110000,78520000] 4.78 0.40 + 4 1024 [78525000,81935000] 4.78 0.40 + 4 1024 [81935200,85345200] 4.78 0.41 + 4 1024 [85350000,88760000] 4.78 0.42 + 4 1024 [88765000,92175000] 4.78 0.41 + 4 1024 [92175200,95585200] 4.78 0.40 + 4 1024 [95590000,99000000] 4.78 0.40 + 8 1024 [99005000,102095100] 8.80 0.73 + 15 1024 [102095200,104655100] 16.10 1.01 + 16 1024 [104655200,107425200] 17.22 1.49 + 17 1024 [107430000,110080000] 17.51 1.27 + 15 1024 [110085000,112640000] 16.02 1.01 + 17 1024 [112645000,115215000] 17.84 1.20 + 6 1024 [115215200,118095000] 6.55 0.55 + 10 1024 [118095200,121080000] 10.25 0.70 + 15 1024 [121085000,123645100] 15.84 1.02 + 11 1024 [123645200,126735000] 12.04 0.89 + 4 114 [126735200,127115000] 0.56 0.17 diff --git a/DA4008_V1.2/sim/lvds/dprof.txt b/DA4008_V1.2/sim/lvds/dprof.txt new file mode 100644 index 0000000..5a8e97d --- /dev/null +++ b/DA4008_V1.2/sim/lvds/dprof.txt @@ -0,0 +1,28 @@ +# DProf Simulation Summary Report +# vcs-version: O-2018.09-SP2_Full64 +# build-date: Feb 28 2019 22:34:30 +# file-generation-time: Fri Mar 13 18:07:28 2026 +# tag: shbyang_cryo1_t1773396448_p117831_pp117830 +----------------------------------- +end-sim-time: 127115000 ps +total-cycles: 40,051 +elapsed-time(s): 0.11 // since simulation time 0 +cpu-time(s): 0.09 +cpu-perf(eps): 3038K // average events executed per second in cpu time (higher is better) +----------------------------------- +total-events: 278,146 +events-per-cycle: 6 +events-per-second: 3038K +events-cpu-time(s): 0.09 +----------------------------------- +========= Events Per Cycle ======== +----------------------------------- + Events Events% Time(s) Time% SimCycles AvgTimePerCycle(micro-seconds) +EPC>=100K: 0 0.0% 0.00 0.0% 0 0.00 +EPC[10K,100K): 0 0.0% 0.00 0.0% 0 0.00 +EPC[1K,10K): 0 0.0% 0.00 0.0% 0 0.00 +EPC[100,1K): 2,435 0.9% 0.00 1.7% 20 21.83 +EPC[10,100): 116,831 42.1% 0.01 28.2% 3,835 1.93 +EPC<10: 158,387 57.0% 0.02 70.2% 36,195 0.51 +Time-0: 493 NA 0.05 NA 1 46414.47 + diff --git a/DA4008_V1.2/sim/lvds/my_signal.rc b/DA4008_V1.2/sim/lvds/my_signal.rc new file mode 100644 index 0000000..f2d7ded --- /dev/null +++ b/DA4008_V1.2/sim/lvds/my_signal.rc @@ -0,0 +1,69 @@ +Magic 271485 +Revision Verdi_O-2018.09-SP2 + +; Window Layout +viewPort 0 27 1920 392 229 65 + +; File list: +; openDirFile [-d delimiter] [-s time_offset] [-rf auto_bus_rule_file] path_name file_name +openDirFile -d / "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb" + +; file time scale: +; fileTimeScale ### s|ms|us|ns|ps + +; signal spacing: +signalSpacing 5 + +; windowTimeUnit is used for zoom, cursor & marker +; waveform viewport range +zoom 96583796.885331 119223090.909886 +cursor 106045200.000000 +marker 0.000000 + +; user define markers +; userMarker time_pos marker_name color linestyle +; visible top row signal index +top 4 +; marker line index +markerPos 15 + +; event list +; addEvent event_name event_expression +; curEvent event_name + + + +COMPLEX_EVENT_BEGIN + + +COMPLEX_EVENT_END + + + +; toolbar current search type +; curSTATUS search_type +curSTATUS ByChange + + +addGroup "Basic" +activeDirFile "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb" +addSignal -h 15 /TB/clk +addSignal -h 15 -holdScope rst_n +addSignal -h 15 -UNSIGNED -HEX -holdScope serial_in[3:0] +addSignal -h 15 -holdScope train_ready +addSignal -h 15 -holdScope link_down +addGroup "SRAM" +addSignal -h 15 /TB/wr_addr[12:0] +addSignal -h 15 -holdScope wr_data[511:0] +addSignal -h 15 -holdScope wr_en +addSignal -h 15 -holdScope byte_mask[63:0] +addGroup "STATUS" +addSignal -h 15 /TB/crc_error +addSignal -h 15 -holdScope train_status[31:0] +addSignal -h 15 -holdScope frame_status[31:0] +addSignal -h 15 -holdScope always_on +addGroup "G4" + +; getSignalForm Scope Hierarchy Status +; active file of getSignalForm + diff --git a/DA4008_V1.2/sim/lvds/novas.conf b/DA4008_V1.2/sim/lvds/novas.conf new file mode 100644 index 0000000..cd315f9 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/novas.conf @@ -0,0 +1,453 @@ +[qBaseWindowStateGroup] +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qDockerWindow_restoreNewChildState=true +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\qBaseWindowBeMax=0 +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\qBaseWindowBeFix=0 +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qBaseDockWidgetGroup\widgetDock_%3CInst._Tree%3E\dockIsFloating=false +Verdi_1\qBaseWindowRestoreStateGroup\qDockerWindow_defaultLayout\qBaseDockWidgetGroup\widgetDock_%3CMessage%3E\isVisible=true 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+Verdi_1\width=1017 +Verdi_1\height=794 diff --git a/DA4008_V1.2/sim/lvds/novas.rc b/DA4008_V1.2/sim/lvds/novas.rc new file mode 100644 index 0000000..37e34aa --- /dev/null +++ b/DA4008_V1.2/sim/lvds/novas.rc @@ -0,0 +1,1315 @@ +@verdi rc file Version 1.0 +[Library] +work = ./work +[Annotation] +3D_Active_Annotation = FALSE +[CommandSyntax.finsim] +InvokeCommand = +FullFileName = TRUE +Separator = . +SimPromptSign = ">" +HierNameLevel = 1 +RunContinue = "continue" +Finish = "quit" +UseAbsTime = FALSE +NextTime = "run 1" +NextNTime = "run ${SimBPTime}" +NextEvent = "run 1" +Reset = +ObjPosBreak = "break posedge ${SimBPObj}" +ObjNegBreak = "break negedge ${SimBPObj}" +ObjAnyBreak = "break change ${SimBPObj}" +ObjLevelBreak = +LineBreak = "breakline ${SimBPFile} ${SimBPLine}" +AbsTimeBreak = "break abstimeaf ${SimBPTime}" +RelTimeBreak = "break reltimeaf ${SimBPTime}" +EnableBP = "breakon ${SimBPId}" +DisableBP = "breakoff ${SimBPId}" +DeleteBP = "breakclr ${SimBPId}" +DeleteAllBP = "breakclr" +SimSetScope = "cd ${SimDmpObj}" +[CommandSyntax.ikos] +InvokeCommand = "setvar debussy true;elaborate -p ${SimTop} -s ${SimArch}; run until 0;fsdbInteractive; " +FullFileName = TRUE +NeedTimeUnit = TRUE +NormalizeTimeUnit = TRUE +Separator = / +HierNameLevel = 2 +RunContinue = "run" +Finish = "exit" +NextTime = "run ${SimBPTime} ${SimTimeUnit}" +NextNTime = "run for ${SimBPTime} ${SimTimeUnit}" +NextEvent = "step 1" +Reset = "reset" +ObjPosBreak = "stop if ${SimBPObj} = \"'1'\"" +ObjNegBreak = "stop if ${SimBPObj} = \"'0'\"" +ObjAnyBreak = +ObjLevelBreak = "stop if ${SimBPObj} = ${SimBPValue}" +LineBreak = "stop at ${SimBPFile}:${SimBPLine}" +AbsTimeBreak = +RelTimeBreak = +EnableBP = "enable ${SimBPId}" +DisableBP = "disable ${SimBPId}" +DeleteBP = "delete ${SimBPId}" +DeleteAllBP = "delete *" +[CommandSyntax.verisity] +InvokeCommand = +FullFileName = FALSE +Separator = . +SimPromptSign = "> " +HierNameLevel = 1 +RunContinue = "." +Finish = "$finish;" +NextTime = "$db_steptime(1);" +NextNTime = "$db_steptime(${SimBPTime});" +NextEvent = "$db_step;" +SimSetScope = "$scope(${SimDmpObj});" +Reset = "$reset;" +ObjPosBreak = "$db_breakonposedge(${SimBPObj});" +ObjNegBreak = "$db_breakonnegedge(${SimBPObj});" +ObjAnyBreak = "$db_breakwhen(${SimBPObj});" +ObjLevelBreak = "$db_breakwhen(${SimBPObj}, ${SimBPValue});" +LineBreak = "$db_breakatline(${SimBPLine}, ${SimBPScope}, \"${SimBPFile}\");" +AbsTimeBreak = "$db_breakbeforetime(${SimBPTime});" +RelTimeBreak = "$db_breakbeforetime(${SimBPTime});" +EnableBP = "$db_enablebreak(${SimBPId});" +DisableBP = "$db_disablebreak(${SimBPId});" +DeleteBP = "$db_deletebreak(${SimBPId});" +DeleteAllBP = "$db_deletebreak;" +FSDBInit = "$novasInteractive;" +FSDBDumpvars = "$novasDumpvars(0, ${SimDmpObj});" +FSDBDumpsingle = "$novasDumpsingle(${SimDmpObj});" +FSDBDumpvarsInFile = "$novasDumpvarsToFile(\"${SimDmpFile}\");" +FSDBDumpMem = "$novasDumpMemNow(${SimDmpObj}, ${SimDmpBegin}, ${SimDmpSize});" +[CoverageDetail] +cross_filter_limit = 1000 +branch_limit_vector_display = 50 +showgrid = TRUE +reuseFirst = TRUE +justify = TRUE +scrollbar_mode = per pane +test_combo_left_truncate = TRUE +instance_combo_left_truncate = TRUE +loop_navigation = TRUE +condSubExpr = 20 +tglMda = 1000 +linecoverable = 100000 +lineuncovered = 50000 +tglcoverable = 30000 +tgluncovered = 30000 +pendingMax = 1000 +show_full_more = FALSE +[CoverageHier] +showgrid = FALSE +[CoverageWeight] +Assert = 1 +Covergroup = 1 +Line = 1 +Condition = 1 +Toggle = 1 +FSM = 1 +Branch = 1 +[DesignTree] +IfShowModule = {TRUE, FALSE} +[DisabledMessages] +version = Verdi_O-2018.09-SP2 +[Editor] +editorName = TurboEditor +[Emacs] +EmacsFont = "Clean 14" +EmacsBG = white +EmacsFG = black +[Exclusion] +enableAsDefault = TRUE +saveAsDefault = TRUE +saveManually = TRUE +illegalBehavior = FALSE +DisplayExcludedItem = FALSE +adaptiveExclusion = TRUE +warningExcludeInstance = TRUE +favorite_exclude_annotation = "" +[FSM] +viewport = 65 336 387 479 +WndBk-FillColor = Gray3 +Background-FillColor = gray5 +prefKey_Link-FillColor = yellow4 +prefKey_Link-TextColor = black +Trap = red3 +Hilight = blue4 +Window = Gray3 +Selected = white +Trans. = green2 +State = black +Init. = black +SmartTips = TRUE +VectorFont = FALSE +StopAskBkgndColor = FALSE +ShowStateAction = FALSE +ShowTransAction = FALSE +ShowTransCond = FALSE +StateLable = NAME +StateValueRadix = ORIG +State-LineColor = ID_BLACK +State-LineWidth = 1 +State-FillColor = ID_BLUE2 +State-TextColor = ID_WHITE +Init_State-LineColor = ID_BLACK +Init_State-LineWidth = 2 +Init_State-FillColor = ID_YELLOW2 +Init_State-TextColor = ID_BLACK +Reset_State-LineColor = ID_BLACK +Reset_State-LineWidth = 2 +Reset_State-FillColor = ID_YELLOW7 +Reset_State-TextColor = ID_BLACK +Trap_State-LineColor = ID_RED2 +Trap_State-LineWidth = 2 +Trap_State-FillColor = ID_CYAN5 +Trap_State-TextColor = ID_RED2 +State_Action-LineColor = ID_BLACK +State_Action-LineWidth = 1 +State_Action-FillColor = ID_WHITE +State_Action-TextColor = ID_BLACK +Junction-LineColor = ID_BLACK +Junction-LineWidth = 1 +Junction-FillColor = ID_GREEN2 +Junction-TextColor = ID_BLACK +Connection-LineColor = ID_BLACK +Connection-LineWidth = 1 +Connection-FillColor = ID_GRAY5 +Connection-TextColor = ID_BLACK +prefKey_Port-LineColor = ID_BLACK +prefKey_Port-LineWidth = 1 +prefKey_Port-FillColor = ID_ORANGE6 +prefKey_Port-TextColor = ID_YELLOW2 +Transition-LineColor = ID_BLACK +Transition-LineWidth = 1 +Transition-FillColor = ID_WHITE +Transition-TextColor = ID_BLACK +Trans_Condition-LineColor = ID_BLACK +Trans_Condition-LineWidth = 1 +Trans_Condition-FillColor = ID_WHITE +Trans_Condition-TextColor = ID_ORANGE2 +Trans_Action-LineColor = ID_BLACK +Trans_Action-LineWidth = 1 +Trans_Action-FillColor = ID_WHITE +Trans_Action-TextColor = ID_GREEN2 +SelectedSet-LineColor = ID_RED2 +SelectedSet-LineWidth = 1 +SelectedSet-FillColor = ID_RED2 +SelectedSet-TextColor = ID_WHITE +StickSet-LineColor = ID_ORANGE5 +StickSet-LineWidth = 1 +StickSet-FillColor = ID_PURPLE6 +StickSet-TextColor = ID_BLACK +HilightSet-LineColor = ID_RED5 +HilightSet-LineWidth = 1 +HilightSet-FillColor = ID_RED7 +HilightSet-TextColor = ID_BLUE5 +ControlPoint-LineColor = ID_BLACK +ControlPoint-LineWidth = 1 +ControlPoint-FillColor = ID_WHITE +Bundle-LineColor = ID_BLACK +Bundle-LineWidth = 1 +Bundle-FillColor = ID_WHITE +Bundle-TextColor = ID_BLUE4 +QtBackground-FillColor = ID_GRAY6 +prefKey_Link-LineColor = ID_ORANGE2 +prefKey_Link-LineWidth = 1 +Selection-LineColor = ID_BLUE2 +Selection-LineWidth = 1 +[FSM_Dlg-Print] +Orientation = Landscape +[FileBrowser] +nWaveRestoreRCDirHistory = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc\"" +[Form] +version = Verdi_O-2018.09-SP2 +[General] +autoSaveSession = FALSE +TclAutoSource = +cmd_enter_form = FALSE +SyncBrowserDir = TRUE +version = Verdi_O-2018.09-SP2 +SignalCaseInSensitive = FALSE +ShowWndCtntDuringResizing = FALSE +[GlobalProp] +ErrWindow_Font = Helvetica_M_R_12 +[Globals] +app_default_font = Bitstream Vera Sans,10,-1,5,50,0,0,0,0,0 +app_fixed_width_font = Courier,10,-1,5,50,0,0,0,0,0 +text_encoding = Unicode(utf8) +smart_resize = TRUE +smart_resize_child_limit = 2000 +tooltip_max_width = 200 +tooltip_max_height = 20 +tooltip_viewer_key = F3 +tooltip_display_time = 1000 +bookmark_name_length_limit = 12 +disable_tooltip = FALSE +auto_load_source = TRUE +max_array_size = 4096 +filter_when_typing = TRUE +filter_keep_children = TRUE +filter_syntax = Wildcards +filter_keystroke_interval = 800 +filter_case_sensitive = FALSE +filter_full_path = FALSE +load_detail_for_funcov = FALSE +sort_limit = 100000 +ignoreDBVersionChecking = FALSE +[HB] +ViewSchematic = FALSE +windowLayout = 0 0 804 500 182 214 804 148 +import_filter = *.v; *.vc; *.f +designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +import_filter_vhdl = *.vhd; *.vhdl; *.f +import_default_language = Verilog +import_filter_verilog = *.v; *.vc; *.f +simulation_file_type = *.fsdb;*.fsdb.gz;*.fsdb.bz2;*.ff;*.dump +PrefetchViewableAnnot = TRUE +[Hier] +filterTimeout = 1500 +[ImportLiberty] +SearchPriority = .lib++ +bSkipStateCell = False +bImportPowerInfo = False +bSkipFFCell = False +bScpecifyCellNameCase = False +bSpecifyPinNameCase = False +CellNameToCase = +PinNameToCase = +[Language] +EditWindow_Font = COURIER12 +Background = ID_WHITE +Comment = ID_GRAY4 +Keyword = ID_BLUE5 +UserKeyword = ID_GREEN2 +Text = ID_BLACK +SelText = ID_WHITE +SelBackground = ID_BLUE2 +[Library.Ikos] +pack = ./work.lib++ +vital = ./work.lib++ +work = ./work.lib++ +std = ${dls_std}.lib++ +ieee = ${dls_ieee}.lib++ +synopsys = ${dls_synopsys}.lib++ +silc = ${dls_silc}.lib++ +ikos = ${dls_ikos}.lib++ +novas = ${VOYAGER_LIB_VHDL}/${VOYAGER_MACHINE}/novas.lib++ +[MDT] +ART_RF_SP = spr[0-9]*bx[0-9]* +ART_RF_2P = dpr[0-9]*bx[0-9]* +ART_SRAM_SP = spm[0-9]*bx[0-9]* +ART_SRAM_DP = dpm[0-9]*bx[0-9]* +VIR_SRAM_SP = hdsd1_[0-9]*x[0-9]*cm4sw1 +VIR_SRAM_DP = hdsd2_[0-9]*x[0-9]*cm4sw1 +VIR_RF_SP = rfsd1_[0-9]*x[0-9]*cm2sw0 +VIR_RF_DP = rfsd2_[0-9]*x[0-9]*cm2sw1 +VIR_STAR_SRAM_SP = shsd1_[0-9]*x[0-9]*cm4sw0 +[NPExpanding] +functiongroups = FALSE +modules = FALSE +[NPFilter] +showAssertion = TRUE +showCoverGroup = TRUE +showProperty = TRUE +showSequence = TRUE +showDollarUnit = TRUE +[OldFontRC] +Wave_legend_window_font = -f COURIER12 -c ID_CYAN5 +Wave_value_window_font = -f COURIER12 -c ID_CYAN5 +Wave_curve_window_font = -f COURIER12 -c ID_CYAN5 +Wave_group_name_font = -f COURIER12 -c ID_GREEN5 +Wave_ruler_value_font = -f COURIER12 -c ID_CYAN5 +Wave_analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +Wave_comment_string_font = -f COURIER12 -c ID_RED5 +HB_designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +Text_font = COURIER12 +nMemory_font = Fixed 14 +Wave_getsignal_form_font = -f COURIER12 +Text_annotFont = Helvetica_M_R_10 +[OtherEditor] +cmd1 = "xterm -font 9x15 -fg black -bg gray -e" +name = "vi" +options = "+${CurLine} ${CurFullFileName}" +[Power] +PowerDownInstance = ID_GRAY1 +RetentionSignal = ID_YELLOW2 +IsolationSignal = ID_RED6 +LevelShiftedSignal = ID_GREEN6 +PowerSwitchObject = ID_ORANGE5 +AlwaysOnObject = ID_GREEN5 +PowerNet = ID_RED2 +GroundNet = ID_RED2 +SimulationOnly = ID_CYAN3 +SRSN/SPA = ID_CYAN3 +CNSSignal = ID_CYAN3 +RPTRSignal = ID_CYAN3 +AcknowledgeSignal = ID_CYAN3 +BoundaryPort = ID_CYAN3 +DisplayInstrumentedCell = TRUE +ShowCmdByFile = FALSE +ShowPstAnnot = FALSE +ShowIsoSymbol = TRUE +ExtractIsoSameNets = FALSE +AnnotateSignal = TRUE +HighlightPowerObject = TRUE +HighlightPowerDomain = TRUE +TraceThroughInstruLowPower = FALSE +BrightenPowerColorInSchematicWindow = FALSE +ShowAlias = FALSE +ShowVoltage = TRUE +MatchTreeNodesCaseInsensitive = FALSE +SearchHBNodeDynamically = FALSE +ContinueTracingSupplyOrLogicNet = FALSE +[Print] +PrinterName = lp +FileName = test.ps +PaperSize = A4 - 210x297 (mm) +ColorPrint = FALSE +[PropertyTools] +saveWaveformStat = TRUE +savePropStat = FALSE +savePropDtl = TRUE +[QtDialog] +openFileDlg = 649,304,602,483 +restoreSigDlg = 233,171,551,438 +saveSigDlg = 674,352,551,386 +QwUserAskDlg = 958,672,324,134 +[Relationship] +hideRecursiceNode = FALSE +[Session Cache] +3 = string (session file name) +4 = string (session file name) +5 = string (session file name) +1 = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses +2 = /home/shbyang/verdiLog/novas_autosave.ses +[Simulation] +scsPath = scsim +scsOption = +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +osciPath = gdb +osciOption = +vcsPath = simv +vcsOption = +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +speedsimPath = +speedsimOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +interactiveDebugging = {True, False} +KeepBreakPoints = False +ScsDebugAll = False +simType = {vcssv, xl, nc, vcs, mti, mti_vlog, vhnc, scs, mixnc} +thirdpartyIdx = -1 +iscCmdSep = FALSE +NoAppendOption = False +[SimulationPlus] +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +vcsPath = simv +vcsOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +speedsimPath = verilog +speedsimOption = +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +scsPath = scsim +scsOption = +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +vcs_svPath = simv +vcs_svOption = +simType = vcssv +thirdpartyIdx = -1 +interactiveDebugging = FALSE +KeepBreakPoints = FALSE +iscCmdSep = FALSE +ScsDebugAll = FALSE +NoAppendOption = FALSE +invokeSimPath = work +[SimulationPlus2] +eventDumpUnfinish = FALSE +[Source] +wordWrapOn = TRUE +viewReuse = TRUE +lineNumberOn = TRUE +warnOutdatedDlg = TRUE +showEncrypt = FALSE +loadInclude = FALSE +showColorForActive = FALSE +tabWidth = 8 +editor = vi +reload = Never +sync_active_to_source = TRUE +navigateAsColored = FALSE +navigateCovered = FALSE +navigateUncovered = TRUE +navigateExcluded = FALSE +not_ask_for_source_path = FALSE +expandMacroOn = TRUE +expandMacroInstancesThreshold = 10000 +[SourceVHDL] +vhSimType = ModelSim +ohSimType = VCS +[TclShell] +nLineSize = 1024 +[Test] +verbose_progress = FALSE +[TestBenchBrowser] +-showUVMDynamicHierTreeWin = FALSE +[Text] +hdlTypeName = blue4 +hdlLibrary = blue4 +viewport = 396 392 445 487 +hdlOther = ID_BLACK +hdlComment = ID_GRAY1 +hdlKeyword = ID_BLUE5 +hdlEntity = ID_BLACK +hdlEntityInst = ID_BLACK +hdlSignal = ID_RED2 +hdlInSignal = ID_RED2 +hdlOutSignal = ID_RED2 +hdlInOutSignal = ID_RED2 +hdlOperator = ID_BLACK +hdlMinus = ID_BLACK +hdlSymbol = ID_BLACK +hdlString = ID_BLACK +hdlNumberBase = ID_BLACK +hdlNumber = ID_BLACK +hdlLiteral = ID_BLACK +hdlIdentifier = ID_BLACK +hdlSystemTask = ID_BLACK +hdlParameter = ID_BLACK +hdlIncFile = ID_BLACK +hdlDataFile = ID_BLACK +hdlCDSkipIf = ID_GRAY1 +hdlMacro = ID_BLACK +hdlMacroValue = ID_BLACK +hdlPlainText = ID_BLACK +hdlOvaId = ID_PURPLE2 +hdlPslId = ID_PURPLE2 +HvlEId = ID_BLACK +HvlVERAId = ID_BLACK +hdlEscSignal = ID_BLACK +hdlEscInSignal = ID_BLACK +hdlEscOutSignal = ID_BLACK +hdlEscInOutSignal = ID_BLACK +textBackgroundColor = ID_GRAY6 +textHiliteBK = ID_BLUE5 +textHiliteText = ID_WHITE +textTracedMark = ID_GREEN2 +textLineNo = ID_BLACK +textFoldedLineNo = ID_RED5 +textUserKeyword = ID_GREEN2 +textParaAnnotText = ID_BLACK +textFuncAnnotText = ID_BLUE2 +textAnnotText = ID_BLACK +textUserDefAnnotText = ID_BLACK +ComputedSignal = ID_PURPLE5 +textAnnotTextShadow = ID_WHITE +parenthesisBGColor = ID_YELLOW5 +codeInParenthesis = ID_CYAN5 +text3DLight = ID_WHITE +text3DShadow = ID_BLACK +textHvlDriver = ID_GREEN3 +textHvlLoad = ID_YELLOW3 +textHvlDriverLoad = ID_BLUE3 +irOutline = ID_RED2 +irDriver = ID_YELLOW5 +irLoad = ID_BLACK +irBookMark = ID_YELLOW2 +irIndicator = ID_WHITE +irBreakpoint = ID_GREEN5 +irCurLine = ID_BLUE5 +hdlVhEntity = ID_BLACK +hdlArchitecture = ID_BLACK +hdlPackage = ID_BLUE5 +hdlRefPackage = ID_BLUE5 +hdlAlias = ID_BLACK +hdlGeneric = ID_BLUE5 +specialAnnotShadow = ID_BLUE1 +hdlZeroInHead = ID_GREEN2 +hdlZeroInComment = ID_GREEN2 +hdlPslHead = ID_BLACK +hdlPslComment = ID_BLACK +hdlSynopsysHead = ID_GREEN2 +hdlSynopsysComment = ID_GREEN2 +pdmlIdentifier = ID_BLACK +pdmlCommand = ID_BLACK +pdmlMacro = ID_BLACK +font = COURIER12 +annotFont = Helvetica_M_R_10 +[Text.1] +viewport = 602 297 1017 794 45 +[TextPrinter] +Orientation = Landscape +Indicator = FALSE +LineNum = TRUE +FontSize = 7 +Column = 2 +Annotation = TRUE +[Texteditor] +TexteditorFont = "Clean 14" +TexteditorBG = white +TexteditorFG = black +[ThirdParty] +ThirdPartySimTool = verisity surefire ikos finsim +[TurboEditor] +autoBackup = TRUE +[UserButton.mixnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +Button8 = "FSDB Ver" "call fsdbVersion" +Button9 = "Dump On" "call fsdbDumpon" +Button10 = "Dump Off" "call fsdbDumpoff" +Button11 = "All Tasks" "call" +Button12 = "Dump Selected Instance" "call fsdbDumpvars 1 ${SelInst}" +[UserButton.mti] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.mti_vlog] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.nc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.scs] +Button1 = "Dump All Signals" "call fsdbDumpvars(0, \"${TopScope}\");\n" +Button2 = "Next 1000 Time" "run 1000 \n" +Button3 = "Next ? Time" "run ${Arg:Next Time} \n" +Button4 = "Run Step" "step\n" +Button5 = "Show Variables" "ls -v {${SelVars}}\n" +[UserButton.vhnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.xl] +Button13 = "Dump Off" "$fsdbDumpoff;\n" +Button12 = "Dump On" "$fsdbDumpon;\n" +Button11 = "Delete Focus" "$db_deletefocus(${treeSelScope});\n" +Button10 = "Set Focus" "$db_setfocus(${treeSelScope});\n" +Button9 = "Deposit Variable" "$deposit(${SelVar},${Arg:New Value});\n" +Button8 = "Release Variable" "release ${SelVar};\n" +Button7 = "Force Variable" "force ${SelVar} = ${Arg:New Value};\n" +Button6 = "Show Variables" "$showvars(${SelVars});\n" +Button5 = "Next ? Event" "$db_step(${Arg:Next Event});\n" +Button4 = "Next Event" "$db_step(1);\n" +Button3 = "Next ? Time" "#${Arg:Next Time} $stop;.\n" +Button2 = "Next 1000 Time" "#1000 $stop;.\n" +Button1 = "Dump All Signals" "$fsdbDumpvars;\n" +[VIA] +viaLogViewerDefaultRuleOneSearchForm = "share/VIA/Apps/PredefinedRules/Misc/Onesearch_rule.rc" +[VIA.oneSearch.preference] +DefaultDisplayTimeUnit = "1.000000ns" +DefaultLogTimeUnit = "1.000000ns" +[VIA.oneSearch.preference.vgifColumnSettingRC] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0] +parRuleSets = "" +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column0] +name = Severity +width = 60 +visualIndex = 1 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] +name = Code +width = 60 +visualIndex = 2 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] +name = Type +width = 60 +visualIndex = 3 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +name = Time +width = 60 +visualIndex = 0 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +name = Message +width = 2000 +visualIndex = 4 +isHidden = FALSE +isUserChangeColumnVisible = FALSE +[Vi] +ViFont = "Clean 14" +ViBG = white +ViFG = black +[Wave] +ovaEventSuccessColor = -c ID_CYAN5 +ovaEventFailureColor = -c ID_RED5 +ovaBooleanSuccessColor = -c ID_CYAN5 +ovaBooleanFailureColor = -c ID_RED5 +ovaAssertSuccessColor = -c ID_GREEN5 +ovaAssertFailureColor = -c ID_RED5 +ovaForbidSuccessColor = -c ID_GREEN5 +SigGroupRuleFile = +DisplayFileName = FALSE +waveform_vertical_scroll_bar = TRUE +scope_to_save_with_macro +open_file_dir +open_rc_file_dir +getSignalForm = 0 0 800 479 100 30 100 30 +viewPort = 0 27 1017 301 229 65 +signalSpacing = 5 +digitalSignalHeight = 15 +analogSignalHeight = 98 +commentSignalHeight = 98 +transactionSignalHeight = 98 +messageSignalHeight = 98 +minCompErrWidth = 4 +DragZoomTolerance = 4 +maxTransExpandedLayer = 10 +WaveMaxPoint = 512 +legendBackground = -c ID_BLACK +valueBackground = -c ID_BLACK +curveBackground = -c ID_BLACK +getSignalSignalList_BackgroundColor = -c ID_GRAY6 +glitchColor = -c ID_RED5 +cursor = -c ID_YELLOW5 -lw 1 -ls long_dashed +marker = -c ID_WHITE -lw 1 -ls dash_dot_l +usermarker = -c ID_GREEN5 -lw 1 -ls long_dashed +trace = -c ID_GRAY5 -lw 1 -ls long_dashed +grid = -c ID_WHITE -lw 1 -ls short_dashed +rulerBackground = -c ID_GRAY3 +rulerForeground = -c ID_YELLOW5 +busTextColor = -c ID_ORANGE8 +legendForeground = -c ID_CYAN5 +valueForeground = -c ID_CYAN5 +curveForeground = -c ID_CYAN5 +groupNameColor = -c ID_GREEN5 +commentStringColor = -c ID_RED5 +region(Active)Background = -c ID_YELLOW1 +region(NBA)Background = -c ID_RED1 +region(Re-Active)Background = -c ID_YELLOW3 +region(Re-NBA)Background = -c ID_RED3 +region(VHDL-Delta)Background = -c ID_ORANGE3 +region(Dump-Off)Background = -c ID_GRAY4 +High_Light = -c ID_GRAY2 +Input_Signal = -c ID_RED5 +Output_Signal = -c ID_GREEN5 +InOut_Signal = -c ID_BLUE5 +Net_Signal = -c ID_YELLOW5 +Register_Signal = -c ID_PURPLE5 +Verilog_Signal = -c ID_CYAN5 +VHDL_Signal = -c ID_ORANGE5 +SystemC_Signal = -c ID_BLUE7 +Dump_Off_Color = -c ID_BLUE2 +Compress_Bar_Color = -c ID_YELLOW4 +Vector_Dense_Block_Color = -c ID_ORANGE8 +Scalar_Dense_Block_Color = -c ID_GREEN6 +Analog_Dense_Block_Color = -c ID_PURPLE2 +Composite_Dense_Block_Color = -c ID_ORANGE5 +RPTR_Power_Off_Layer = -c ID_CYAN3 -stipple dots +DB_Power_Off_Layer = -c ID_BLUE4 -stipple dots +SPA_Driver_Power_Off_Layer = -c ID_ORANGE4 -stipple dots +SPA_Receiver_Power_Off_Layer = -c ID_GREEN5 -stipple dots +SRSN_Power_Off_Layer = -c ID_GREEN4 -stipple dots +Isolation_Power_Off_Layer = -c ID_RED4 -stipple dots +PD_Power_Off_Layer = -c ID_GRAY4 -stipple dots +Isolation_Layer = -c ID_RED4 -stipple vLine +Retention_Level_Trigger_Layer = -c ID_ORANGE1 -stipple fill_solid +Retention_Edge_Trigger_Layer = -c ID_YELLOW6 -stipple fill_solid +Driving_Power_Off_Layer = -c ID_YELLOW2 -stipple x +Toggle_Layer = -c ID_YELLOW4 -stipple slash +analogRealStyle = pwl +analogVoltageStyle = pwl +analogCurrentStyle = pwl +analogOthersStyle = pwl +busSignalLayer = -c ID_ORANGE8 +busXLayer = -c ID_RED5 +busZLayer = -c ID_ORANGE6 +busMixedLayer = -c ID_GREEN5 +busNotComputedLayer = -c ID_GRAY1 +busNoValueLayer = -c ID_BLUE2 +signalGridLayer = -c ID_WHITE +analogGridLayer = -c ID_GRAY6 +analogRulerLayer = -c ID_GRAY6 +keywordLayer = -c ID_RED5 +loadedLayer = -c ID_BLUE5 +loadingLayer = -c ID_BLACK +qdsCurMarkerLayer = -c ID_BLUE5 +qdsBrkMarkerLayer = -c ID_GREEN5 +qdsTrgMarkerLayer = -c ID_RED5 +arrowDefaultColor = -c ID_ORANGE6 +startNodeArrowColor = -c ID_WHITE +endNodeArrowColor = -c ID_YELLOW5 +propertyEventMatchColor = -c ID_GREEN5 +propertyEventNoMatchColor = -c ID_RED5 +propertyVacuousSuccessMatchColor = -c ID_YELLOW2 +propertyStatusBoundaryColor = -c ID_WHITE +propertyBooleanSuccessColor = -c ID_CYAN5 +propertyBooleanFailureColor = -c ID_RED5 +propertyAssertSuccessColor = -c ID_GREEN5 +propertyAssertFailureColor = -c ID_RED5 +propertyForbidSuccessColor = -c ID_GREEN5 +transactionForegroundColor = -c ID_YELLOW8 +transactionBackgroundColor = -c ID_BLACK +transactionHighLightColor = -c ID_CYAN6 +transactionRelationshipColor = -c ID_PURPLE6 +transactionErrorTypeColor = -c ID_RED5 +coverageFullyCoveredColor = -c ID_GREEN5 +coverageNoCoverageColor = -c ID_RED5 +coveragePartialCoverageColor = -c ID_YELLOW5 +coverageReferenceLineColor = -c ID_GRAY4 +messageForegroundColor = -c ID_YELLOW4 +messageBackgroundColor = -c ID_PURPLE1 +messageHighLightColor = -c ID_CYAN6 +messageInformationColor = -c ID_RED5 +ComputedAnnotColor = -c ID_PURPLE5 +fsvSecurityDataColor = -c ID_PURPLE3 +qdsAutoBusGroup = TRUE +qdsTimeStampMode = FALSE +qdsVbfBusOrderAscending = FALSE +openDumpFilter = *.fsdb;*.vf;*.jf +DumpFileFilter = *.vcd +RestoreSignalFilter = *.rc +SaveSignalFilter = *.rc +AddAliasFilter = *.alias;*.adb +CompareSignalFilter = *.err +ConvertFFFilter = *.vcd;*.out;*.tr0;*.xp;*.raw;*.wfm +Scroll_Ratio = 100 +Zoom_Ratio = 10 +EventSequence_SyncCursorTime = TRUE +EventSequence_Sorting = FALSE +EventSequence_RemoveGrid = FALSE +EventSequence_IsGridMode = FALSE +SetDefaultRadix_global = FALSE +DefaultRadix = Hex +SigSearchSignalMatchCase = FALSE +SigSearchSignalScopeOption = FALSE +SigSearchSignalSamenetInterface = FALSE +SigSearchSignalFullScope = FALSE +SigSearchSignalWithRegExp = FALSE +SigSearchDynamically = FALSE +SigDisplayBySelectionOrder = FALSE +SigDisplayRowMajor = FALSE +SigDragSelFollowColumn = FALSE +SigDisplayHierarchyBox = TRUE +SigDisplaySubscopeBox = TRUE +SigDisplayEmptyScope = TRUE +SigDisplaySignalNavigationBox = FALSE +SigDisplayFormBus = TRUE +SigShowSubProgram = TRUE +SigSearchScopeDynamically = TRUE +SigCollapseSubtreeNodes = FALSE +activeFileApplyToAnnotation = FALSE +GrpSelMode = TRUE +dispGridCount = FALSE +hierarchyName = FALSE +partial_level_name = FALSE +partial_level_head = 1 +partial_level_tail = 1 +displayMessageLabelOnly = TRUE +autoInsertDumpoffs = TRUE +displayMessageCallStack = FALSE +displayCallStackWithFullSections = TRUE +displayCallStackWithLastSection = FALSE +limitMessageMaxWidth = FALSE +messageMaxWidth = 50 +displayTransBySpecificColor = FALSE +fittedTransHeight = FALSE +snap = TRUE +gravitySnap = FALSE +displayLeadingZero = FALSE +displayGlitchs = FALSE +allfileTimeRange = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +restoreFromActiveFile = TRUE +restoreToEnd = FALSE +dispCompErr = TRUE +showMsgDes = TRUE +anaAutoFit = FALSE +anaAutoPattn = FALSE +anaAuto100VertFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE +denseBlockDrawing = TRUE +relativeFreqPrecision = 3 +showMarkerAbsolute = FALSE +showMarkerAdjacent = FALSE +showMarkerRelative = FALSE +showMarkerFrequency = FALSE +stickCursorMarkerOnWaveform = TRUE +keepMarkerAtEndTimeOfTransaction = FALSE +doubleClickToExpandTransaction = TRUE +expandTransactionAssociatedSignals = TRUE +expandTransactionAttributeSignals = FALSE +WaveExtendLastTick = TRUE +InOutSignal = FALSE +NetRegisterSignal = FALSE +VerilogVHDLSignal = FALSE +LabelMarker = TRUE +ResolveSymbolicLink = TRUE +signal_rc_abspath = TRUE +signal_rc_no_natural_bus_range = FALSE +save_scope_with_macro = FALSE +TipInSignalWin = FALSE +DisplayPackedSiganlInBitwiseManner = FALSE +DisplaySignalTypeAheadOfSignalName = TRUE ICON +TipInCurveWin = FALSE +MouseGesturesInCurveWin = TRUE +DisplayLSBsFirst = FALSE +PaintSpecificColorPattern = TRUE +ModuleName = TRUE +form_all_memory_signal = FALSE +formBusSignalFromPartSelects = FALSE +read_value_change_on_demand_for_drawing = FALSE +load_scopes_on_demand = on 5 +TransitionMode = TRUE +DisplayRadix = FALSE +SchemaX = FALSE +Hilight = TRUE +UseBeforeValue = FALSE +DisplayFileNameAheadOfSignalName = FALSE +DisplayFileNumberAheadOfSignalName = FALSE +DisplayValueSpace = TRUE +FitAnaByBusSize = FALSE +displayTransactionAttributeName = FALSE +expandOverlappedTrans = FALSE +dispSamplePointForAttrSig = TRUE +dispClassName = TRUE +ReloadActiveFileOnly = FALSE +NormalizeEVCD = FALSE +OverwriteAliasWithRC = TRUE +overlay_added_analog_signals = FALSE +case_insensitive = FALSE +vhdlVariableCalculate = TRUE +showError = TRUE +signal_vertical_scroll_bar = TRUE +showPortNameForDroppedInstance = FALSE +truncateFilePathInTitleBar = TRUE +filterPropVacuousSuccess = FALSE +includeLocalSignals = FALSE +encloseSignalsByGroup = TRUE +resaveSignals = TRUE +adjustBusPrefix = adjustBus_ +adjustBusBits = 1 +adjustBusSettings = 69889 +maskPowerOff = TRUE +maskIsolation = TRUE +maskRetention = TRUE +maskDrivingPowerOff = TRUE +maskToggle = TRUE +autoBackupSignals = off 5 "\"/home/shbyang/verdiLog\"" "\"novas_autosave_sig\"" +signal_rc_attribute = 65535 +signal_rc_alias_attribute = 0 +ConvertAttr1 = -inc FALSE +ConvertAttr2 = -hier FALSE +ConvertAttr3 = -ucase FALSE +ConvertAttr4 = -lcase FALSE +ConvertAttr5 = -org FALSE +ConvertAttr6 = -mem 24 +ConvertAttr7 = -deli . +ConvertAttr8 = -hier_scope FALSE +ConvertAttr9 = -inst_array FALSE +ConvertAttr10 = -vhdlnaming FALSE +ConvertAttr11 = -orgScope FALSE +analogFmtPrecision = Automatic 2 +confirmOverwrite = TRUE +confirmExit = TRUE +confirmGetAll = TRUE +printTimeRange = TRUE 0.000000 0.000000 0.000000 +printPageRange = TRUE 1 1 +printOption = 0 +printBasic = 1 0 0 FALSE FALSE +printDest = -printer {} +printSignature = {%f %h %t} {} +curveWindow_Drag&Drop_Mode = TRUE +hspiceIncOpenMode = TRUE +pcSelectMode = TRUE +hierarchyDelimiter = / +RecentFile1 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc\"" +RecentFile2 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb\"" +open_file_time_range = FALSE +value_window_aligment = Right +signal_window_alignment = Auto +ShowDeltaTime = TRUE +legend_window_font = -f COURIER12 -c ID_CYAN5 +value_window_font = -f COURIER12 -c ID_CYAN5 +curve_window_font = -f COURIER12 -c ID_CYAN5 +group_name_font = -f COURIER12 -c ID_GREEN5 +ruler_value_font = -f COURIER12 -c ID_CYAN5 +analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +comment_string_font = -f COURIER12 -c ID_RED5 +getsignal_form_font = -f COURIER12 +SigsCheckNum = on 1000 +filter_synthesized_net = off n +filterOutNet = on +filter_synthesized_instance = off +filterOutInstance = on +showGroupTree = TRUE +hierGroupDelim = / +MsgSeverityColor = {y \"Severity\"==\"1\" ID_RED5} {y \"Severity\"==\"2\" ID_RED6} {y \"Severity\"==\"3\" ID_RED7} {y \"Severity\"==\"4\" ID_RED8} {y \"Severity\"==\"5\" ID_ORANGE5} {y \"Severity\"==\"6\" ID_ORANGE6} {y \"Severity\"==\"7\" ID_ORANGE7} {y \"Severity\"==\"8\" \ +ID_GREEN7} {y \"Severity\"==\"9\" ID_GREEN6} {y \"Severity\"==\"10\" ID_GREEN5} +AutoApplySeverityColor = TRUE +AutoAdjustMsgWidthByLabel = off +verilogStrengthDispType = type1 +waveDblClkActiveTrace = on +autoConnectTBrowser = FALSE +connectTBrowserInContainer = TRUE +SEQShowComparisonIcon = TRUE +SEQAddDriverLoadInSameGroup = TRUE +autoSyncCursorMarker = FALSE +autoSyncHorizontalRange = FALSE +autoSyncVerticalScroll = FALSE +[cov_hier_name_column] +justify = TRUE +[coverageColors] +sou_uncov = TRUE +sou_pc = TRUE +sou_cov = TRUE +sou_exuncov = TRUE +sou_excov = TRUE +sou_unreach = TRUE +sou_unreachcon = TRUE +sou_fillColor_uncov = red +sou_fillColor_pc = yellow +sou_fillColor_cov = green3 +sou_fillColor_exuncov = grey +sou_fillColor_excov = #3C9371 +sou_fillColor_unreach = grey +sou_fillColor_unreachcon = orange +numberOfBins = 6 +rangeMin_0 = 0 +rangeMax_0 = 20 +fillColor_0 = #FF6464 +rangeMin_1 = 20 +rangeMax_1 = 40 +fillColor_1 = #FF9999 +rangeMin_2 = 40 +rangeMax_2 = 60 +fillColor_2 = #FF8040 +rangeMin_3 = 60 +rangeMax_3 = 80 +fillColor_3 = #FFFF99 +rangeMin_4 = 80 +rangeMax_4 = 100 +fillColor_4 = #99FF99 +rangeMin_5 = 100 +rangeMax_5 = 100 +fillColor_5 = #64FF64 +[coveragesetting] +assertTopoMode = FALSE +urgAppendOptions = +group_instance_new_format_name = TRUE +showvalue = FALSE +computeGroupsScoreByRatio = FALSE +computeGroupsScoreByInst = FALSE +showConditionId = FALSE +showfullhier = FALSE +nameLeftAlignment = TRUE +showAllInfoInTooltips = FALSE +copyItemHvpName = TRUE +ignoreGroupWeight = FALSE +absTestName = FALSE +HvpMergeTool = +ShowMergeMenuItem = FALSE +fsmScoreMode = transition +[eco] +NameRule = +IsFreezeSilicon = FALSE +cellQuantityManagement = FALSE +ManageMode = INSTANCE_NAME +SpareCellsPinsManagement = TRUE +LogCommitReport = FALSE +InputPinStatus = 1 +OutputPinStatus = 2 +RevisedComponentColor = ID_BLUE5 +SpareCellColor = ID_RED5 +UserName = shbyang +CommentFormat = Novas ECO updated by ${UserName} ${Date} ${Time} +PrefixN = eco_n +PrefixP = eco_p +PrefixI = eco_i +DefaultTieUpNet = 1'b1 +DefaultTieDownNet = 1'b0 +MultipleInstantiations = TRUE +KeepClockPinConnection = FALSE +KeepAsyncResetPinConnection = FALSE +ScriptFileModeType = 1 +MagmaScriptPower = VDD +MagmaScriptGround = GND +ShowModeMsg = TRUE +AstroScriptPower = VDD +AstroScriptGround = VSS +ClearFloatingPorts = FALSE +[eco_connection] +Port/NetIsUnique = TRUE +SerialNet = 0 +SerialPort = 0 +SerialInst = 0 +[finsim] +TPLanguage = Verilog +TPName = Super-FinSim +TPPath = TOP.sim +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[hvpsetting] +importExcelXMLOptions = +use_test_loca_as_source = FALSE +autoTurnOffHideMeetGoalInit = FALSE +autoTurnOffHideMeetGoal = TRUE +autoTurnOffModifierInit = FALSE +autoTurnOffModifier = TRUE +enableNumbering = TRUE +autoSaveCheck = TRUE +autoSaveTime = 5 +ShowMissingScore = TRUE +enableFeatureId = FALSE +enable_HVP_FEAT_ID = FALSE +enableMeasureConcealment = FALSE +HvpCloneHierShowMsgAgain = 1 +HvpCloneHierType = tree +HvpCloneHierMetrics = Line,Cond,FSM,Toggle,Branch,Assert +autoRecalPlanAfterLoadingCovDBUserDataPlan = false +warnMeAutoRecalPlanAfterLoadingCovDBUserDataPlan = true +autoRecalExclWithPlan = false +warnMeAutoRecalExclWithPlan = true +autoRecalPlanWithExcl = false +warnMeAutoRecalPlanWithExcl = true +warnPopupWarnWhenMultiFilters = true +warnPopupWarnIfHvpReadOnly = true +unmappedObjsReportLevel = def_var_inst +unmappedObjsReportInst = true +unmappedObjsNumOfObjs = High +[ikos] +TPLanguage = VHDL +TPName = Voyager +TPPath = vsh +TPOption = -X +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[imp] +options = NULL +libPath = NULL +libDir = NULL +[nCompare] +ErrorViewport = 80 180 800 550 +EditorViewport = 409 287 676 475 +EditorHeightWidth = 802 380 +WaveCommand = "novas" +WaveArgs = "-nWave" +[nCompare.Wnd0] +ViewByHier = FALSE +[nMemory] +dispMode = ADDR_HINT +addrColWidth = 120 +valueColWidth = 100 +showCellBitRangeWithAddr = TRUE +wordsShownInOneRow = 8 +syncCursorTime = FALSE +fixCellColumnWidth = FALSE +font = Courier 12 +[planColors] +plan_fillColor_inactive = lightGray +plan_fillColor_warning = orange +plan_fillColor_error = red +plan_fillColor_invalid = #F0DCDB +plan_fillColor_subplan = lightGray +[schematics] +viewport = 178 262 638 516 +schBackgroundColor = black lineSolid +schBackgroundColor_qt = #000000 qt_solidLine 1 +schBodyColor = orange6 lineSolid +schBodyColor_qt = #ffb973 qt_solidLine 1 +schAsmBodyColor = blue7 lineSolid +schAsmBodyColor_qt = #a5a5ff qt_solidLine 1 +schPortColor = orange6 lineSolid +schPortColor_qt = #ffb973 qt_solidLine 1 +schCellNameColor = Gray6 lineSolid +schCellNameColor_qt = #e0e0e0 qt_solidLine 1 +schCLKNetColor = red6 lineSolid +schCLKNetColor_qt = #ff7373 qt_solidLine 1 +schPWRNetColor = red4 lineSolid +schPWRNetColor_qt = #ff0101 qt_solidLine 1 +schGNDNetColor = cyan4 lineSolid +schGNDNetColor_qt = #01ffff qt_solidLine 1 +schSIGNetColor = green8 lineSolid +schSIGNetColor_qt = #cdffcd qt_solidLine 1 +schTraceColor = yellow4 lineSolid +schTraceColor_qt = #ffff01 qt_solidLine 2 +schBackAnnotateColor = white lineSolid +schBackAnnotateColor_qt = #ffffff qt_solidLine 1 +schValue0 = yellow4 lineSolid +schValue0_qt = #ffff01 qt_solidLine 1 +schValue1 = green3 lineSolid +schValue1_qt = #008000 qt_solidLine 1 +schValueX = red4 lineSolid +schValueX_qt = #ff0101 qt_solidLine 1 +schValueZ = purple7 lineSolid +schValueZ_qt = #ffcdff qt_solidLine 1 +dimColor = cyan2 lineSolid +dimColor_qt = #008080 qt_solidLine 1 +schPreSelColor = green4 lineDash +schPreSelColor_qt = #01ff01 qt_dashLine 2 +schSIGBusNetColor = green8 lineSolid +schSIGBusNetColor_qt = #cdffcd qt_solidLine +schGNDBusNetColor = cyan4 lineSolid +schGNDBusNetColor_qt = #01ffff qt_solidLine +schPWRBusNetColor = red4 lineSolid +schPWRBusNetColor_qt = #ff0101 qt_solidLine +schCLKBusNetColor = red6 lineSolid +schCLKBusNetColor_qt = #ff7373 qt_solidLine +schEdgeSensitiveColor = orange6 lineSolid +schEdgeSensitiveColor_qt = #ffb973 qt_solidLine +schAnnotColor = cyan4 lineSolid +schAnnotColor_qt = #01ffff qt_solidLine +schInstNameColor = orange6 lineSolid +schInstNameColor_qt = #ffb973 qt_solidLine +schPortNameColor = cyan4 lineSolid +schPortNameColor_qt = #01ffff qt_solidLine +schAsmLatchColor = cyan4 lineSolid +schAsmLatchColor_qt = #01ffff qt_solidLine +schAsmRegColor = cyan4 lineSolid +schAsmRegColor_qt = #01ffff qt_solidLine +schAsmTriColor = cyan4 lineSolid +schAsmTriColor_qt = #01ffff qt_solidLine +pre_select = True +ShowPassThroughNet = False +ComputedAnnotColor = ID_PURPLE5 +[schematics_print] +Signature = FALSE +DesignName = PCU +DesignerName = bai +SignatureLocation = LowerRight +MultiPage = TRUE +AutoSliver = FALSE +[sourceColors] +BackgroundActive = gray88 +BackgroundInactive = lightgray +InactiveCode = dimgray +Selection = darkblue +Standard = black +Keyword = blue +Comment = gray25 +Number = black +String = black +Identifier = darkred +Inline = green +colorIdentifier = green +Value = darkgreen +MacroBackground = white +Missing = #400040 +[specColors] +top_plan_linked = #ADFFA6 +top_plan_ignore = #D3D3D3 +top_plan_todo = #EECBAD +sub_plan_ignore = #919191 +sub_plan_todo = #EFAFAF +sub_plan_linked = darkorange +[spec_link_setting] +use_spline = true +goto_section = false +exclude_ignore = true +truncate_abstract = false +abstract_length = 999 +compare_strategy = 2 +auto_apply_margin = FALSE +margin_top = 0.80 +margin_bottom = 0.80 +margin_left = 0.50 +margin_right = 0.50 +margin_unit = inches +[spiceDebug] +ThroughNet = ID_YELLOW5 +InstrumentSig = ID_GREEN5 +InterfaceElement = ID_GREEN5 +Run-timeInterfaceElement = ID_BLUE5 +HighlightThroughNet = TRUE +HighlightInterfaceElement = TRUE +HighlightRuntimeInterfaceElement = TRUE +HighlightSameNet = TRUE +[surefire] +TPLanguage = Verilog +TPName = SureFire +TPPath = verilog +TPOption = +AddImportArgument = TRUE +LineBreakWithScope = TRUE +StopAfterCompileOption = -tcl +[turboSchema_Printer_Options] +Orientation = Landscape +[turbo_library] +bdb_load_scope = +[vdCovFilteringSearchesStrings] +keepLastUsedFiltersMaxNum = 10 +[verisity] +TPLanguage = Verilog +TPName = "Verisity SpeXsim" +TPPath = vlg +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = TRUE +StopAfterCompileOption = -s +[wave.0] +viewPort = 0 27 1017 301 229 65 +[wave.1] +viewPort = 127 219 960 332 100 65 +[wave.2] +viewPort = 38 314 686 205 100 65 +[wave.3] +viewPort = 63 63 700 400 65 41 +[wave.4] +viewPort = 84 84 700 400 65 41 +[wave.5] +viewPort = 92 105 700 400 65 41 +[wave.6] +viewPort = 0 0 700 400 65 41 +[wave.7] +viewPort = 21 21 700 400 65 41 diff --git a/DA4008_V1.2/sim/lvds/novas_dump.log b/DA4008_V1.2/sim/lvds/novas_dump.log new file mode 100644 index 0000000..bad90d2 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/novas_dump.log @@ -0,0 +1,393 @@ +####################################################################################### +# log primitive debug message of FSDB dumping # +# This is for R&D to analyze when there are issues happening when FSDB dump # +####################################################################################### +ANF: vcsd_get_serial_mode_status('./simv: undefined symbol: vcsd_get_serial_mode_status') +ANF: vcsd_enable_sva_success_callback('./simv: undefined symbol: vcsd_enable_sva_success_callback') +ANF: vcsd_disable_sva_success_callback('./simv: undefined symbol: vcsd_disable_sva_success_callback') +ANF: vcsd_get_power_scope_name('./simv: undefined symbol: vcsd_get_power_scope_name') +ANF: vcsd_begin_no_value_var_info('./simv: undefined symbol: vcsd_begin_no_value_var_info') +ANF: vcsd_end_no_value_var_info('./simv: undefined symbol: vcsd_end_no_value_var_info') +ANF: vcsd_remove_xprop_merge_mode_callback('./simv: undefined symbol: vcsd_remove_xprop_merge_mode_callback') +ANF: vhpi_get_cb_info('./simv: undefined symbol: vhpi_get_cb_info') +ANF: vhpi_free_handle('./simv: undefined symbol: vhpi_free_handle') +ANF: vhpi_fetch_vcsd_handle('./simv: undefined symbol: vhpi_fetch_vcsd_handle') +ANF: vhpi_fetch_vpi_handle('./simv: undefined symbol: vhpi_fetch_vpi_handle') +ANF: vhpi_has_verilog_parent('./simv: undefined symbol: vhpi_has_verilog_parent') +ANF: vhpi_is_verilog_scope('./simv: undefined symbol: vhpi_is_verilog_scope') +ANF: scsd_xprop_is_enabled('./simv: undefined symbol: scsd_xprop_is_enabled') +ANF: scsd_xprop_sig_is_promoted('./simv: undefined symbol: scsd_xprop_sig_is_promoted') +ANF: scsd_xprop_int_xvalue('./simv: undefined symbol: scsd_xprop_int_xvalue') +ANF: scsd_xprop_bool_xvalue('./simv: undefined symbol: scsd_xprop_bool_xvalue') +ANF: scsd_xprop_enum_xvalue('./simv: undefined symbol: scsd_xprop_enum_xvalue') +ANF: scsd_xprop_register_merge_mode_cb('./simv: undefined symbol: scsd_xprop_register_merge_mode_cb') +ANF: scsd_xprop_delete_merge_mode_cb('./simv: undefined symbol: scsd_xprop_delete_merge_mode_cb') +ANF: scsd_xprop_get_merge_mode('./simv: undefined symbol: scsd_xprop_get_merge_mode') +ANF: scsd_thread_get_info('./simv: undefined symbol: scsd_thread_get_info') +ANF: scsd_thread_vc_init('./simv: undefined symbol: scsd_thread_vc_init') +ANF: scsd_master_set_delta_sync_cbk('./simv: undefined symbol: scsd_master_set_delta_sync_cbk') +ANF: scsd_fgp_get_fsdb_cores('./simv: undefined symbol: scsd_fgp_get_fsdb_cores') +ANF: msvEnableDumpingMode('./simv: undefined symbol: msvEnableDumpingMode') +ANF: msvGetVersion('./simv: undefined symbol: msvGetVersion') +ANF: msvGetInstProp('./simv: undefined symbol: msvGetInstProp') +ANF: msvIsSpiceEngineReady('./simv: undefined symbol: msvIsSpiceEngineReady') +ANF: msvSetAddProbeCallback('./simv: undefined symbol: msvSetAddProbeCallback') +ANF: msvGetInstHandle('./simv: undefined symbol: msvGetInstHandle') +ANF: msvGetProbeByInst('./simv: undefined symbol: msvGetProbeByInst') +ANF: msvGetSigHandle('./simv: undefined symbol: msvGetSigHandle') +ANF: msvGetProbeBySig('./simv: undefined symbol: msvGetProbeBySig') +ANF: msvGetProbeInfo('./simv: undefined symbol: msvGetProbeInfo') +ANF: msvRelease('./simv: undefined symbol: msvRelease') +ANF: msvSetVcCallbackFunc('./simv: undefined symbol: msvSetVcCallbackFunc') +ANF: msvCheckVcCallback('./simv: undefined symbol: msvCheckVcCallback') +ANF: msvAddVcCallback('./simv: undefined symbol: msvAddVcCallback') +ANF: msvRemoveVcCallback('./simv: undefined symbol: msvRemoveVcCallback') +ANF: msvGetLatestValue('./simv: undefined symbol: msvGetLatestValue') +ANF: msvSetEndofSimCallback('./simv: undefined symbol: msvSetEndofSimCallback') +ANF: msvIgnoredProbe('./simv: undefined symbol: msvIgnoredProbe') +ANF: msvGetThruNetInfo('./simv: undefined symbol: msvGetThruNetInfo') +ANF: msvFreeThruNetInfo('./simv: undefined symbol: msvFreeThruNetInfo') +ANF: PI_ace_get_output_time_unit('./simv: undefined symbol: PI_ace_get_output_time_unit') +ANF: PI_ace_sim_sync('./simv: undefined symbol: PI_ace_sim_sync') +ANF: msvGetRereadInitFile('./simv: undefined symbol: msvGetRereadInitFile') +ANF: msvSetBeforeRereadCallback('./simv: undefined symbol: msvSetBeforeRereadCallback') +ANF: msvSetAfterRereadCallback('./simv: undefined symbol: msvSetAfterRereadCallback') +ANF: msvSetForceCallback('./simv: undefined symbol: msvSetForceCallback') +ANF: msvSetReleaseCallback('./simv: undefined symbol: msvSetReleaseCallback') +ANF: msvGetForceStatus('./simv: undefined symbol: msvGetForceStatus') +ANF: vhdi_dt_get_type('./simv: undefined symbol: vhdi_dt_get_type') +ANF: vhdi_dt_get_key('./simv: undefined symbol: vhdi_dt_get_key') +ANF: vhdi_dt_get_vhdl_enum_info('./simv: undefined symbol: vhdi_dt_get_vhdl_enum_info') +ANF: vhdi_dt_get_vhdl_physical_info('./simv: undefined symbol: vhdi_dt_get_vhdl_physical_info') +ANF: vhdi_dt_get_vhdl_array_info('./simv: undefined symbol: vhdi_dt_get_vhdl_array_info') +ANF: vhdi_dt_get_vhdl_record_info('./simv: undefined symbol: vhdi_dt_get_vhdl_record_info') +ANF: vhdi_def_traverse_module('./simv: undefined symbol: vhdi_def_traverse_module') +ANF: vhdi_def_traverse_scope('./simv: undefined symbol: vhdi_def_traverse_scope') +ANF: vhdi_def_traverse_variable('./simv: undefined symbol: vhdi_def_traverse_variable') +ANF: vhdi_def_get_module_id_by_vhpi('./simv: undefined symbol: vhdi_def_get_module_id_by_vhpi') +ANF: vhdi_def_get_handle_by_module_id('./simv: undefined symbol: vhdi_def_get_handle_by_module_id') +ANF: vhdi_def_get_variable_info_by_vhpi('./simv: undefined symbol: vhdi_def_get_variable_info_by_vhpi') +ANF: vhdi_def_free('./simv: undefined symbol: vhdi_def_free') +ANF: vhdi_ist_traverse_scope('./simv: undefined symbol: vhdi_ist_traverse_scope') +ANF: vhdi_ist_traverse_variable('./simv: undefined symbol: vhdi_ist_traverse_variable') +ANF: vhdi_ist_convert_by_vhpi('./simv: undefined symbol: vhdi_ist_convert_by_vhpi') +ANF: vhdi_ist_clone('./simv: undefined symbol: vhdi_ist_clone') +ANF: vhdi_ist_free('./simv: undefined symbol: vhdi_ist_free') +ANF: vhdi_ist_hash_key('./simv: undefined symbol: vhdi_ist_hash_key') +ANF: vhdi_ist_compare('./simv: undefined symbol: vhdi_ist_compare') +ANF: vhdi_ist_get_value_addr('./simv: undefined symbol: vhdi_ist_get_value_addr') +ANF: vhdi_set_scsd_callback('./simv: undefined symbol: vhdi_set_scsd_callback') +ANF: vhdi_cbk_set_force_callback('./simv: undefined symbol: vhdi_cbk_set_force_callback') +ANF: vhdi_trigger_init_force('./simv: undefined symbol: vhdi_trigger_init_force') +ANF: vhdi_ist_check_scsd_callback('./simv: undefined symbol: vhdi_ist_check_scsd_callback') +ANF: vhdi_ist_add_scsd_callback('./simv: undefined symbol: vhdi_ist_add_scsd_callback') +ANF: vhdi_ist_remove_scsd_callback('./simv: undefined symbol: vhdi_ist_remove_scsd_callback') +ANF: vhdi_ist_get_scsd_user_data('./simv: undefined symbol: vhdi_ist_get_scsd_user_data') +ANF: vhdi_add_time_change_callback('./simv: undefined symbol: vhdi_add_time_change_callback') +ANF: vhdi_get_real_value_by_value_addr('./simv: undefined symbol: vhdi_get_real_value_by_value_addr') +ANF: vhdi_get_64_value_by_value_addr('./simv: undefined symbol: vhdi_get_64_value_by_value_addr') +ANF: vhdi_xprop_inst_is_promoted('./simv: undefined symbol: vhdi_xprop_inst_is_promoted') +ANF: vdi_ist_convert_by_vhdi('./simv: undefined symbol: vdi_ist_convert_by_vhdi') +ANF: vhdi_ist_get_module_id('./simv: undefined symbol: vhdi_ist_get_module_id') +ANF: vhdi_refine_foreign_scope_type('./simv: undefined symbol: vhdi_refine_foreign_scope_type') +ANF: vhdi_flush_callback('./simv: undefined symbol: vhdi_flush_callback') +ANF: vhdi_set_orig_name('./simv: undefined symbol: vhdi_set_orig_name') +ANF: vhdi_set_dump_pt('./simv: undefined symbol: vhdi_set_dump_pt') +ANF: vhdi_get_fsdb_option('./simv: undefined symbol: vhdi_get_fsdb_option') +ANF: vhdi_fgp_get_mode('./simv: undefined symbol: vhdi_fgp_get_mode') +ANF: vhdi_node_register_composite_var('./simv: undefined symbol: vhdi_node_register_composite_var') +ANF: vhdi_node_analysis('./simv: undefined symbol: vhdi_node_analysis') +ANF: vhdi_node_id('./simv: undefined symbol: vhdi_node_id') +ANF: vhdi_node_ist_check_scsd_callback('./simv: undefined symbol: vhdi_node_ist_check_scsd_callback') +ANF: vhdi_node_ist_add_scsd_callback('./simv: undefined symbol: vhdi_node_ist_add_scsd_callback') +ANF: vhdi_node_ist_get_value_addr('./simv: undefined symbol: vhdi_node_ist_get_value_addr') +VCS compile option: + option[0]: ./simv + option[1]: sync:busywait + option[2]: -Xdprof=timeline + option[3]: -l + option[4]: /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcs1 + option[5]: -Mcc=gcc + option[6]: -Mcplusplus=g++ + option[7]: -Masflags= + option[8]: -Mcfl= -pipe -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include + option[9]: -Mxcflags= -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include + option[10]: -Mldflags= -rdynamic + option[11]: -Mout=simv + option[12]: -Mamsrun= + option[13]: -Mvcsaceobjs= + option[14]: -Mobjects= /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvirsim.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/liberrorinf.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so + option[15]: -Mexternalobj= + option[16]: -Msaverestoreobj=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_save_restore_new.o + option[17]: -Mcrt0= + option[18]: -Mcrtn= + option[19]: -Mcsrc= + option[20]: -Msyslibs=/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/pli.a -ldl + option[21]: -l + option[22]: compile.log + option[23]: -full64 + option[24]: -j8 + option[25]: +lint=TFIPC-L + option[26]: +v2k + option[27]: -debug_access+pp + option[28]: +vpi + option[29]: +vcsd1 + option[30]: +itf+/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcsdp_lite.tab + option[31]: -lca + option[32]: -q + option[33]: -timescale=1ns/1ps + option[34]: +nospecify + option[35]: -cm + option[36]: line+cond+fsm+tgl+branch + option[37]: -cm_dir + option[38]: ./coverage/simv.vdb + option[39]: -picarchive + option[40]: -P + option[41]: /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab + option[42]: -fsdb + option[43]: -sverilog + option[44]: -gen_obj + option[45]: -f + option[46]: filelist_vlg.f + option[47]: +incdir+./../../rtl/define + option[48]: +incdir+./../../rtl/qubitmcu + option[49]: +incdir+./../../model + option[50]: -load + option[51]: /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/libnovas.so:FSDBDumpCmd + option[52]: timescale=1ns/1ps +Chronologic Simulation VCS Release O-2018.09-SP2_Full64 +Linux 3.10.0-1160.92.1.el7.x86_64 #1 SMP Tue Jun 20 11:48:01 UTC 2023 x86_64 +CPU cores: 96 +Limit information: +====================================== +cputime unlimited +filesize unlimited +datasize unlimited +stacksize 8194 kbytes +coredumpsize 0 kbytes +memoryuse unlimited +vmemoryuse unlimited +descriptors 4096 +memorylocked 64 kbytes +maxproc 4096 +====================================== +(Special)Runtime environment variables: + +Runtime environment variables: +INNOVUS_HOME=/opt/cadence/INNOVUS181 +VNCDESKTOP=cryo1:17 (shbyang) +MGC_PDF_REDER=evince +XDG_SESSION_ID=c34 +SSH_AGENT_PID=24257 +DBUS_STARTER_ADDRESS=unix:abstract=/tmp/dbus-pbYbSoHCDo,guid=6bec37f851a0ec63831138606819dc51 +MGC_CALIBRE_REALTIME_VIRTUOSO_SAVE_MESSENGER_CELL=1 +HOSTNAME=cryo1 +IMSETTINGS_INTEGRATE_DESKTOP=yes +CDSROOT=/opt/cadence/IC618 +NOVAS_HOME=/opt/synopsys/verdi/Verdi_O-2018.09-SP2 +HOST=cryo1 +TERM=xterm-256color +XDG_MENU_PREFIX=gnome- +VTE_VERSION=5204 +SHELL=/bin/bash +HISTSIZE=1000 +MAKEFLAGS=sim=rtl +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/b5b6a33d_fc39_42b4_a104_3738461c290a +SPECTRE_HOME=/opt/cadence/SPECTRE181 +VIVADO_HOME=/opt/xilinx/Vivado/2019.2/ +CDS_LOAD_ENV=CWD +PWR_HOME=/opt/synopsys/pwr/O-2018.06-SP3 +QTDIR=/usr/lib64/qt-3.3 +QTINC=/usr/lib64/qt-3.3/include +sim=rtl +MENTOR_HOME=/opt/mentor +IMSETTINGS_MODULE=none +QT_GRAPHICSSYSTEM_CHECKED=1 +GROUP=cryo +USER=shbyang +MAKEOVERRIDES=${-*-command-variables-*-} +LD_LIBRARY_PATH=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11/shared/pkgs/icv/tools/calibre_client/lib/64 +LS_COLORS=rs=0:di=38;5;27:ln=38;5;51:mh=44;38;5;15:pi=40;38;5;11:so=38;5;13:do=38;5;5:bd=48;5;232;38;5;11:cd=48;5;232;38;5;3:or=48;5;232;38;5;9:mi=05;48;5;232;38;5;15:su=48;5;196;38;5;15:sg=48;5;11;38;5;16:ca=48;5;196;38;5;226:tw=48;5;10;38;5;16:ow=48;5;10;38;5;21:st=48;5;21;38;5;15:ex=38;5;34:*.tar=38;5;9:*.tgz=38;5;9:*.arc=38;5;9:*.arj=38;5;9:*.taz=38;5;9:*.lha=38;5;9:*.lz4=38;5;9:*.lzh=38;5;9:*.lzma=38;5;9:*.tlz=38;5;9:*.txz=38;5;9:*.tzo=38;5;9:*.t7z=38;5;9:*.zip=38;5;9:*.z=38;5;9:*.Z=38;5;9:*.dz=38;5;9:*.gz=38;5;9:*.lrz=38;5;9:*.lz=38;5;9:*.lzo=38;5;9:*.xz=38;5;9:*.bz2=38;5;9:*.bz=38;5;9:*.tbz=38;5;9:*.tbz2=38;5;9:*.tz=38;5;9:*.deb=38;5;9:*.rpm=38;5;9:*.jar=38;5;9:*.war=38;5;9:*.ear=38;5;9:*.sar=38;5;9:*.rar=38;5;9:*.alz=38;5;9:*.ace=38;5;9:*.zoo=38;5;9:*.cpio=38;5;9:*.7z=38;5;9:*.rz=38;5;9:*.cab=38;5;9:*.jpg=38;5;13:*.jpeg=38;5;13:*.gif=38;5;13:*.bmp=38;5;13:*.pbm=38;5;13:*.pgm=38;5;13:*.ppm=38;5;13:*.tga=38;5;13:*.xbm=38;5;13:*.xpm=38;5;13:*.tif=38;5;13:*.tiff=38;5;13:*.png=38;5;13:*.svg=38;5;13:*.svgz=38;5;13:*.mng=38;5;13:*.pcx=38;5;13:*.mov=38;5;13:*.mpg=38;5;13:*.mpeg=38;5;13:*.m2v=38;5;13:*.mkv=38;5;13:*.webm=38;5;13:*.ogm=38;5;13:*.mp4=38;5;13:*.m4v=38;5;13:*.mp4v=38;5;13:*.vob=38;5;13:*.qt=38;5;13:*.nuv=38;5;13:*.wmv=38;5;13:*.asf=38;5;13:*.rm=38;5;13:*.rmvb=38;5;13:*.flc=38;5;13:*.avi=38;5;13:*.fli=38;5;13:*.flv=38;5;13:*.gl=38;5;13:*.dl=38;5;13:*.xcf=38;5;13:*.xwd=38;5;13:*.yuv=38;5;13:*.cgm=38;5;13:*.emf=38;5;13:*.axv=38;5;13:*.anx=38;5;13:*.ogv=38;5;13:*.ogx=38;5;13:*.aac=38;5;45:*.au=38;5;45:*.flac=38;5;45:*.mid=38;5;45:*.midi=38;5;45:*.mka=38;5;45:*.mp3=38;5;45:*.mpc=38;5;45:*.ogg=38;5;45:*.ra=38;5;45:*.wav=38;5;45:*.axa=38;5;45:*.oga=38;5;45:*.spx=38;5;45:*.xspf=38;5;45: +GNOME_TERMINAL_SERVICE=:1.1458 +W3264_NO_HOST_CHECK=1 +CDS=/opt/cadence/IC618 +HOSTTYPE=x86_64-linux +SSH_AUTH_SOCK=/run/user/1019/keyring/ssh +MAKELEVEL=1 +SESSION_MANAGER=local/unix:@/tmp/.ICE-unix/24088,unix/unix:/tmp/.ICE-unix/24088 +SNPSLMD_LICENSE_FILE=27050@cryo1 +MFLAGS= +SYN_HOME=/opt/synopsys/syn/O-2018.06-SP1 +VC_STATIC_HOME=/opt/synopsys/vc_stat/vc_static/V-2023.12 +GNOME_SHELL_SESSION_MODE=classic +GENUS_HOME=/opt/cadence/GENUS152 +MAIL=/var/spool/mail/shbyang +starRC_HOME=/opt/synopsys/starrc/O-2018.06-SP1 +PATH=/opt/compiler/V0P100:/opt/synopsys/fpga/K-2015.09/bin:/opt/synopsys/vc_stat/vc_static/V-2023.12/bin:/opt/synopsys/wv/N-2017.12-SP2/bin:/opt/synopsys/hspice/N-2017.12-SP2/hspice/bin:/opt/synopsys/idq/O-2018.06-SP1/linux64/iddq/bin:/opt/synopsys/txs/O-2018.06-SP1/bin:/opt/synopsys/lc/O-2018.06-SP1/bin:/opt/synopsys/starrc/O-2018.06-SP1/bin:/opt/synopsys/fm/L-2016.03-SP1/bin:/opt/synopsys/pwr/O-2018.06-SP3/bin:/opt/synopsys/pts/O-2018.06-SP1/bin:/opt/synopsys/syn/O-2018.06-SP1/bin:/opt/synopsys/verdi/Verdi_O-2018.09-SP2/bin:/opt/synopsys/vcs-mx/O-2018.09-SP2/gui/dve/bin:/opt/synopsys/vcs-mx/O-2018.09-SP2/bin:/opt/synopsys/scl/2018.06/linux64/bin:/opt/xilinx/Vivado/2019.2/bin:/opt/xilinx/DocNav:/usr/local/git/bin:/usr/lib64/qt-3.3/bin:/usr/local/bin:/bin:/usr/bin:/usr/local/sbin:/usr/sbin:/home/shbyang/.local/bin:/home/shbyang/bin:/opt/cadence/IC618/tools/bin:/opt/cadence/IC618/tools/dfII/bin:/opt/cadence/IC618/tools/plot/bin:/opt/cadence/SPECTRE181/bin:/opt/cadence/SPECTRE181/tools/bin:/opt/cadence/INNOVUS181/bin:/opt/cadence/INNOVUS181/tools/bin:/opt/cadence/GENUS152/bin:/opt/cadence/GENUS152/tools/bin:/opt/cadence/INCISIVE152/bin:/opt/cadence/INCISIVE152/tools/bin:/opt/cadence/INCISIVE152/tools.lnx86/bin:/opt/cadence/INCISIVE152/tools/dfII/bin:/opt/cadence/INCISIVE152/tools.lnx86/dfII/bin:/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11/bin:/opt/xilinx/Vivado/2019.2//bin:/opt/xilinx/Vivado/2019.2//bin/unwrapped/lnx64.o/ +SPECTRE_DEFAULTS=-E +PT_HOME=/opt/synopsys/pts/O-2018.06-SP1 +QT_IM_MODULE=ibus +_=./simv +VERDI_HOME=/opt/synopsys/verdi/Verdi_O-2018.09-SP2 +CALIBRE_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 +CDS_SPECTRERF_FBENABLE=1 +CADENCE_DIR=/opt/cadence/IC618 +PWD=/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds +CDSDIR=/opt/cadence/IC618 +VCS_HOME=/opt/synopsys/vcs-mx/O-2018.09-SP2 +XMODIFIERS=@im=ibus +MGC_CALIBRE_SAVE_ALL_RUNSET_VALUES=1 +TXS_HOME=/opt/synopsys/txs/O-2018.06-SP1 +FM_HOME=/opt/synopsys/fm/L-2016.03-SP1 +LANG=C +VRST_HOME=/opt/cadence/INCISIVE152 +CDSHOME=/opt/cadence/IC618 +CDS_Netlisting_Mode=Analog +SYNOPSYS=/opt/synopsys +XILINX_VIVADO=/opt/xilinx/Vivado/2019.2 +AMS_ENABLE_NOISE=YES +SPECMAN_HOME=/opt/cadence/INCISIVE152/components/sn +HISTCONTROL=ignoredups +DBUS_STARTER_BUS_TYPE=session +SHLVL=6 +HOME=/home/shbyang +OSTYPE=linux +MGC_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 +GNOME_DESKTOP_SESSION_ID=this-is-deprecated +CDS_AUTO_64BIT=ALL +CADHOME=/opt/cadence +VENDOR=unknown +MGC_LIB_PATH=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11/lib +LOGNAME=shbyang +MACHTYPE=x86_64 +QTLIB=/usr/lib64/qt-3.3/lib +MGLS_LICENSE_FILE=/opt/mentor/license/license.dat +DBUS_SESSION_BUS_ADDRESS=unix:abstract=/tmp/dbus-pbYbSoHCDo,guid=6bec37f851a0ec63831138606819dc51 +XDG_DATA_DIRS=/home/shbyang/.local/share/flatpak/exports/share:/var/lib/flatpak/exports/share:/usr/local/share:/usr/share +IDQ_HOME=/opt/synopsys/idq/O-2018.06-SP1 +CDS_LIC_FILE=/opt/cadence/license/license.dat +MOZILLA_HOME=/usr/bin/firefox +LESSOPEN=||/usr/bin/lesspipe.sh %s +SPECMAN_DIR=/opt/cadence/INCISIVE152/components/sn +SCL_HOME=/opt/synopsys/scl/2018.06 +HSPICE_HOME=/opt/synopsys/hspice/N-2017.12-SP2 +FPGA_HOME=/opt/synopsys/fpga/K-2015.09 +OA_UNSUPPORTED_PLAT=linux_rhel50_gcc44x +CDS_ENABLE_VMS=1 +MGC_CALIBRE_REALTIME_VIRTUOSO_ENABLED=1 +DISPLAY=unix:17 +XDG_RUNTIME_DIR=/run/user/1019 +CDS_LIC_ONLY=1 +LC_HOME=/opt/synopsys/lc/O-2018.06-SP1 +CDS_ROOT=/opt/cadence/IC618 +XILINX_HOME=/opt/xilinx +INCISIVE_HOME=/opt/cadence/INCISIVE152 +XDG_CURRENT_DESKTOP=GNOME +CDS_SPECTRE_FBENABLE=1 +CALIBRE_ENABLE_SKILL_PEXBA_MODE=1 +CDS_INST_DIR=/opt/cadence/IC618 +WV_HOME=/opt/synopsys/wv/N-2017.12-SP2 +COLORTERM=truecolor +VCS_HEAP_EXEC=true +VCS_PATHMAP_PRELOAD_DONE=1 +VCS_STACK_EXEC=true +VCS_EXEC_DONE=1 +LC_ALL=C +DVE=/opt/synopsys/vcs-mx/O-2018.09-SP2/gui/dve +SPECMAN_OUTPUT_TO_TTY=1 +Runtime command line arguments: +argv[0]=./simv +argv[1]=sync:busywait +argv[2]=-Xdprof=timeline +argv[3]=-l +302 profile - 100 + CPU/Mem usage: 0.050 sys, 0.210 user, 282.95M mem +303 Fri Mar 13 18:07:28 2026 +304 pliAppInit +305 FSDB_GATE is set. +306 FSDB_RTL is set. +307 Enable Parallel Dumping. +308 pliAppMiscSet: New Sim Round +309 pliEntryInit +310 LIBSSCORE=found /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/lib/LINUXAMD64/libsscore_vcs201809.so through $NOVAS_HOME setting. +311 FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019 +312 (C) 1996 - 2019 by Synopsys, Inc. +313 FSDB_VCS_ENABLE_FAST_VC is enable +314 sps_call_fsdbAutoSwitchDumpfile_main_vd at 0 : ../../sim/lvds/TB.sv(22) +315 sps_call_fsdbAutoSwitchDumpfile at 0 : ../../sim/lvds/TB.sv(22) +316 argv[0]: (500) +317 argv[1]: (./verdplus.fsdb) +318 argv[2]: (1000000) +319 *Verdi* FSDB: The switch FSDB file size might not match the input size (500MB) because of performance concerns. +320 *Verdi* FSDB: To have the FSDB file size match the input size (500MB), set the FSDB_ENV_PRECISE_AUTOSWITCH environment, though the dumping performance might decrease. +321 *Verdi* : Enable automatic switching of the FSDB file. +322 *Verdi* : (Filename='./verdplus', Limit Size=500MB, File Amount=1000000). +323 *Verdi* : Create FSDB file './verdplus_000.fsdb' +324 compile option from '/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/vcs_rebuild'. +325 "vcs '-full64' '-j8' '-sverilog' '+lint=TFIPC-L' '+v2k' '-debug_access+pp' '-lca' '-q' '-timescale=1ns/1ps' '+nospecify' '-l' 'compile.log' '-cm' 'line+cond+fsm+tgl+branch' '-cm_dir' './coverage/simv.vdb' '-f' 'filelist_vlg.f' '+incdir+./../../rtl/define' '+incdir+./../../rtl/qubitmcu' '+incdir+./../../model' 2>&1" +326 *Verdi* : Create the file './verdplus.log' to log the time range of each FSDB file. +327 *Verdi* : Create virtual FSDB file './verdplus.vf' to log each FSDB file. +328 sps_call_fsdbDumpvars_vd_main at 0 : ../../sim/lvds/TB.sv(23) +329 [spi_vcs_vd_ppi_create_root]: no upf option +330 FSDB dumper cannot dump UPF related power signal ($power_tree): no ppiPowerNetwork. +331 *Verdi* : Begin traversing the scopes, layer (0). +332 *Verdi* : End of traversing. +333 pliAppHDL_DumpVarComplete traverse var: profile - + CPU/Mem usage: 0.060 sys, 0.220 user, 378.18M mem + incr: 0.010 sys, 0.010 user, 7.70M mem + accu: 0.010 sys, 0.010 user, 7.70M mem + accu incr: 0.010 sys, 0.010 user, 7.70M mem + + Count usage: 800 var, 522 idcode, 181 callback + incr: 800 var, 522 idcode, 181 callback + accu: 800 var, 522 idcode, 181 callback + accu incr: 800 var, 522 idcode, 181 callback +334 Fri Mar 13 18:07:28 2026 +335 pliAppHDL_DumpVarComplete: profile - + CPU/Mem usage: 0.060 sys, 0.220 user, 379.24M mem + incr: 0.000 sys, 0.000 user, 1.05M mem + accu: 0.010 sys, 0.010 user, 8.76M mem + accu incr: 0.000 sys, 0.000 user, 1.05M mem + + Count usage: 800 var, 522 idcode, 181 callback + incr: 0 var, 0 idcode, 0 callback + accu: 800 var, 522 idcode, 181 callback + accu incr: 0 var, 0 idcode, 0 callback +336 Fri Mar 13 18:07:28 2026 +337 sps_call_fsdbDumpMDA_vd_main at 0 : ../../sim/lvds/TB.sv(24) +338 *Verdi* : Begin traversing the MDAs, layer (0). +339 *Verdi* : Enable +mda and +packedmda dumping. +340 *Verdi* : End of traversing the MDAs. +341 pliAppHDL_DumpVarComplete traverse var: profile - + CPU/Mem usage: 0.060 sys, 0.220 user, 379.32M mem + incr: 0.000 sys, 0.000 user, 0.08M mem + accu: 0.000 sys, 0.000 user, 0.08M mem + accu incr: 0.000 sys, 0.000 user, 0.08M mem + + Count usage: 1908 var, 1630 idcode, 188 callback + incr: 1108 var, 1108 idcode, 7 callback + accu: 1108 var, 1108 idcode, 7 callback + accu incr: 1108 var, 1108 idcode, 7 callback +342 Fri Mar 13 18:07:28 2026 +343 pliAppHDL_DumpVarComplete: profile - + CPU/Mem usage: 0.060 sys, 0.220 user, 379.32M mem + incr: 0.000 sys, 0.000 user, 0.00M mem + accu: 0.000 sys, 0.000 user, 0.08M mem + accu incr: 0.000 sys, 0.000 user, 0.00M mem + + Count usage: 1908 var, 1630 idcode, 188 callback + incr: 0 var, 0 idcode, 0 callback + accu: 1108 var, 1108 idcode, 7 callback + accu incr: 0 var, 0 idcode, 0 callback +344 Fri Mar 13 18:07:28 2026 +345 End of simulation at 127115000 +346 Fri Mar 13 18:07:28 2026 +347 Begin FSDB profile info: +348 FSDB Writer : bc1(26514) bcn(38140) mtf/stf(0/0) +FSDB Writer elapsed time : flush(0.012084) io wait(0.000000) theadpool wait(0.000000) target functin(0.000000) +FSDB Writer cpu time : MT Compression : 0 +349 End FSDB profile info +350 Parallel profile - Flush:4 Expand:0 ProduceWait:0 ConsumerWait:0 BlockUsed:0 +351 ProduceTime:0.344292616 ConsumerTime:0.000000000 Buffer:64MB +352 SimExit +353 Sim process exit diff --git a/DA4008_V1.2/sim/lvds/sim.log b/DA4008_V1.2/sim/lvds/sim.log new file mode 100644 index 0000000..ea3792e --- /dev/null +++ b/DA4008_V1.2/sim/lvds/sim.log @@ -0,0 +1,61 @@ +[dprof-info] generating timeline profile dprof.dir/timeline.txt +Chronologic VCS simulator copyright 1991-2018 +Contains Synopsys proprietary information. +Compiler version O-2018.09-SP2_Full64; Runtime version O-2018.09-SP2_Full64; Mar 13 18:07 2026 +*Verdi* Loading libsscore_vcs201809.so +FSDB Dumper for VCS, Release Verdi_O-2018.09-SP2, Linux x86_64/64bit, 02/21/2019 +(C) 1996 - 2019 by Synopsys, Inc. +*Verdi* FSDB: The switch FSDB file size might not match the input size (500MB) because of performance concerns. +*Verdi* FSDB: To have the FSDB file size match the input size (500MB), set the FSDB_ENV_PRECISE_AUTOSWITCH environment, though the dumping performance might decrease. +*Verdi* : Enable automatic switching of the FSDB file. +*Verdi* : (Filename='./verdplus', Limit Size=500MB, File Amount=1000000). +*Verdi* : Create FSDB file './verdplus_000.fsdb' +*Verdi* : Create the file './verdplus.log' to log the time range of each FSDB file. +*Verdi* : Create virtual FSDB file './verdplus.vf' to log each FSDB file. +*Verdi* : Begin traversing the scopes, layer (0). +*Verdi* : End of traversing. +*Verdi* : Begin traversing the MDAs, layer (0). +*Verdi* : Enable +mda and +packedmda dumping. +*Verdi* : End of traversing the MDAs. +======================================== +Testbench started at 0 +======================================== +Phase 1: Training with correct patterns... +Link ready at 104675000 +Phase 2: Sending a correct frame... +WRITE: addr=291 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000003a0000002a0000001a00000000000000000000000000000000000000000000000 mask=fffffffffff00000 +Write detected: addr=292 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000013a0000012a0000011a0000010a000000fa000000ea000000da000000ca000000b mask=0000000fffffffff +Error: "../../sim/lvds/TB.sv", 311: TB: at time 106695200 ps +Unexpected write address: 292 +Error: "../../sim/lvds/TB.sv", 312: TB: at time 106695200 ps +Byte mask mismatch: 0000000fffffffff +Error: "../../sim/lvds/TB.sv", 313: TB: at time 106695200 ps +Byte mask high part not zero: 0000000f +Correct frame write verified. +WRITE: addr=292 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000013a0000012a0000011a0000010a000000fa000000ea000000da000000ca000000b mask=0000000fffffffff +Phase 3: Sending a frame with bad CRC... +WRITE: addr=291 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000003a0000002a0000001a0000000a000000fa000000ea000000da000000ca000000b mask=fffffffffff00000 +CRC error detected at 109615000 +WRITE: addr=292 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000013a0000012a0000011a0000010a000000fa000000ea000000da000000ca000000b mask=0000000fffffffff +CRC_ERROR pulse at 109625000 +Link down as expected. +Phase 4: Re-training... +Link ready again. +WRITE: addr=291 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000003a0000002a0000001a0000000a000000fa000000ea000000da000000ca000000b mask=fffffffffff00000 +WRITE: addr=292 data=a000000aa0000009a0000008a0000007a0000006a0000005a0000004a0000013a0000012a0000011a0000010a000000fa000000ea000000da000000ca000000b mask=0000000fffffffff +Phase 5: Testing delay_tap adjustment... +Final delay_tap = 3 +Phase 6: Testing with descrambler enabled (header not scrambled)... +Link ready for scrambled data. +WRITE: addr=291 data=a000000aa0000009b0000009b0000008b0000007b0000006b0000005b0000004b0000003b0000002b0000001b0000000a000000ea000000da000000ca000000b mask=00ffffffffff0000 +Scrambled test passed (no CRC error). +======================================== +Testbench finished at 127115000 +======================================== +$finish called from file "../../sim/lvds/TB.sv", line 463. +$finish at simulation time 127115000 +[dprof-info] generating dprof summary report in dprof.txt + V C S S i m u l a t i o n R e p o r t +Time: 127115000 ps +CPU Time: 0.340 seconds; Data structure size: 0.1Mb +Fri Mar 13 18:07:28 2026 diff --git a/DA4008_V1.2/sim/lvds/simv b/DA4008_V1.2/sim/lvds/simv new file mode 100755 index 0000000..03dd951 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/.daidir_complete b/DA4008_V1.2/sim/lvds/simv.daidir/.daidir_complete new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/.normal_done b/DA4008_V1.2/sim/lvds/simv.daidir/.normal_done new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/.vcs.timestamp b/DA4008_V1.2/sim/lvds/simv.daidir/.vcs.timestamp new file mode 100644 index 0000000..fe91f36 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/.vcs.timestamp @@ -0,0 +1,177 @@ +0 +44 ++incdir+./../../model ++incdir+./../../rtl/define ++incdir+./../../rtl/qubitmcu ++itf+/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcsdp_lite.tab ++lint=TFIPC-L ++nospecify ++v2k ++vcsd1 ++vpi +-Mamsrun= +-Masflags= +-Mcc=gcc +-Mcfl= -pipe -fPIC -O -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include +-Mcplusplus=g++ +-Mcrt0= +-Mcrtn= +-Mcsrc= +-Mexternalobj= +-Mldflags= -rdynamic +-Mobjects= /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvirsim.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/liberrorinf.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so +-Mout=simv +-Msaverestoreobj=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcs_save_restore_new.o +-Msyslibs=/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/pli.a -ldl +-Mvcsaceobjs= +-Mxcflags= -pipe -fPIC -I/opt/synopsys/vcs-mx/O-2018.09-SP2/include +-P +-cm +-cm_dir +-debug_access+pp +-f filelist_vlg.f +-fsdb +-full64 +-gen_obj +-l +-lca +-picarchive +-q +-sverilog +-timescale=1ns/1ps +./coverage/simv.vdb +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcs1 +/opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +compile.log +line+cond+fsm+tgl+branch +110 +sysc_uni_pwd=/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds +starRC_HOME=/opt/synopsys/starrc/O-2018.06-SP1 +sim=rtl +XMODIFIERS=@im=ibus +XILINX_VIVADO=/opt/xilinx/Vivado/2019.2 +XILINX_HOME=/opt/xilinx +XDG_SESSION_ID=c34 +XDG_RUNTIME_DIR=/run/user/1019 +XDG_MENU_PREFIX=gnome- +XDG_DATA_DIRS=/home/shbyang/.local/share/flatpak/exports/share:/var/lib/flatpak/exports/share:/usr/local/share:/usr/share +XDG_CURRENT_DESKTOP=GNOME +WV_HOME=/opt/synopsys/wv/N-2017.12-SP2 +W3264_NO_HOST_CHECK=1 +VTE_VERSION=5204 +VRST_HOME=/opt/cadence/INCISIVE152 +VNCDESKTOP=cryo1:17 (shbyang) +VMR_MODE_FLAG=64 +VIVADO_HOME=/opt/xilinx/Vivado/2019.2/ +VERDI_HOME=/opt/synopsys/verdi/Verdi_O-2018.09-SP2 +VENDOR=unknown +VC_STATIC_HOME=/opt/synopsys/vc_stat/vc_static/V-2023.12 +VCS_MX_HOME_INTERNAL=1 +VCS_MODE_FLAG=64 +VCS_LOG_FILE=compile.log +VCS_LCAMSG_PRINT_OFF=1 +VCS_HOME=/opt/synopsys/vcs-mx/O-2018.09-SP2 +VCS_DEPTH=0 +VCS_ARG_ADDED_FOR_TMP=1 +VCS_ARCH=linux64 +UNAME=/bin/uname +TXS_HOME=/opt/synopsys/txs/O-2018.06-SP1 +TOOL_HOME=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64 +SYN_HOME=/opt/synopsys/syn/O-2018.06-SP1 +SYNOPSYS=/opt/synopsys +SSH_AUTH_SOCK=/run/user/1019/keyring/ssh +SSH_AGENT_PID=24257 +SPECTRE_HOME=/opt/cadence/SPECTRE181 +SPECTRE_DEFAULTS=-E +SPECMAN_HOME=/opt/cadence/INCISIVE152/components/sn +SPECMAN_DIR=/opt/cadence/INCISIVE152/components/sn +SESSION_MANAGER=local/unix:@/tmp/.ICE-unix/24088,unix/unix:/tmp/.ICE-unix/24088 +SCRNAME=vcs +SCRIPT_NAME=vcs +SCL_HOME=/opt/synopsys/scl/2018.06 +QT_IM_MODULE=ibus +QT_GRAPHICSSYSTEM_CHECKED=1 +QTLIB=/usr/lib64/qt-3.3/lib +QTINC=/usr/lib64/qt-3.3/include +QTDIR=/usr/lib64/qt-3.3 +PWR_HOME=/opt/synopsys/pwr/O-2018.06-SP3 +PT_HOME=/opt/synopsys/pts/O-2018.06-SP1 +OVA_UUM=0 +OSTYPE=linux +OA_UNSUPPORTED_PLAT=linux_rhel50_gcc44x +NOVAS_HOME=/opt/synopsys/verdi/Verdi_O-2018.09-SP2 +MOZILLA_HOME=/usr/bin/firefox +MGLS_LICENSE_FILE=/opt/mentor/license/license.dat +MGC_PDF_REDER=evince +MGC_LIB_PATH=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11/lib +MGC_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 +MGC_CALIBRE_SAVE_ALL_RUNSET_VALUES=1 +MGC_CALIBRE_REALTIME_VIRTUOSO_SAVE_MESSENGER_CELL=1 +MGC_CALIBRE_REALTIME_VIRTUOSO_ENABLED=1 +MFLAGS= +MENTOR_HOME=/opt/mentor +MAKEOVERRIDES=${-*-command-variables-*-} +MAKELEVEL=1 +MAKEFLAGS=sim=rtl +LESSOPEN=||/usr/bin/lesspipe.sh %s +LC_HOME=/opt/synopsys/lc/O-2018.06-SP1 +LC_ALL=C +INNOVUS_HOME=/opt/cadence/INNOVUS181 +INCISIVE_HOME=/opt/cadence/INCISIVE152 +IMSETTINGS_MODULE=none +IMSETTINGS_INTEGRATE_DESKTOP=yes +IDQ_HOME=/opt/synopsys/idq/O-2018.06-SP1 +HSPICE_HOME=/opt/synopsys/hspice/N-2017.12-SP2 +HOSTTYPE=x86_64-linux +HISTCONTROL=ignoredups +GROUP=cryo +GNOME_TERMINAL_SERVICE=:1.1458 +GNOME_TERMINAL_SCREEN=/org/gnome/Terminal/screen/b5b6a33d_fc39_42b4_a104_3738461c290a +GNOME_SHELL_SESSION_MODE=classic +GNOME_DESKTOP_SESSION_ID=this-is-deprecated +GENUS_HOME=/opt/cadence/GENUS152 +FPGA_HOME=/opt/synopsys/fpga/K-2015.09 +FM_HOME=/opt/synopsys/fm/L-2016.03-SP1 +DBUS_STARTER_BUS_TYPE=session +DBUS_STARTER_ADDRESS=unix:abstract=/tmp/dbus-pbYbSoHCDo,guid=6bec37f851a0ec63831138606819dc51 +DBUS_SESSION_BUS_ADDRESS=unix:abstract=/tmp/dbus-pbYbSoHCDo,guid=6bec37f851a0ec63831138606819dc51 +COLORTERM=truecolor +CDS_SPECTRE_FBENABLE=1 +CDS_SPECTRERF_FBENABLE=1 +CDS_ROOT=/opt/cadence/IC618 +CDS_Netlisting_Mode=Analog +CDS_LOAD_ENV=CWD +CDS_LIC_ONLY=1 +CDS_LIC_FILE=/opt/cadence/license/license.dat +CDS_INST_DIR=/opt/cadence/IC618 +CDS_ENABLE_VMS=1 +CDS_AUTO_64BIT=ALL +CDSROOT=/opt/cadence/IC618 +CDSHOME=/opt/cadence/IC618 +CDSDIR=/opt/cadence/IC618 +CDS=/opt/cadence/IC618 +CALIBRE_HOME=/opt/mentor/Calibre2019/aoj_cal_2019.3_15.11 +CALIBRE_ENABLE_SKILL_PEXBA_MODE=1 +CADHOME=/opt/cadence +CADENCE_DIR=/opt/cadence/IC618 +AMS_ENABLE_NOISE=YES +0 +11 +1773384753 ../../sim/lvds/TB.sv +1773384753 ../../rtl/lvds/ulink_rx.sv +1773384753 ../../rtl/fifo/syn_fwft_fifo.v +1773384753 ../../rtl/memory/bhv_spram.v +1773384753 ../../rtl/memory/spram.v +1773384753 ../../rtl/comm/sirv_gnrl_dffs.v +1773384753 ../../rtl/comm/sirv_gnrl_xchecker.v +1551421444 /opt/synopsys/vcs-mx/O-2018.09-SP2/include/cm_vcsd.tab +1773384753 filelist_vlg.f +1550753332 /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +1551421246 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/vcsdp_lite.tab +4 +1551422344 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvirsim.so +1551421792 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/liberrorinf.so +1551421768 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libsnpsmalloc.so +1551421789 /opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/libvfs.so +1773396448 simv.daidir +-1 partitionlib diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/_117681_archive_1.so b/DA4008_V1.2/sim/lvds/simv.daidir/_117681_archive_1.so new file mode 100755 index 0000000..9a93463 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/_117681_archive_1.so differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/_117699_archive_1.so b/DA4008_V1.2/sim/lvds/simv.daidir/_117699_archive_1.so new file mode 100755 index 0000000..5a6f04e Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/_117699_archive_1.so differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/_117700_archive_1.so b/DA4008_V1.2/sim/lvds/simv.daidir/_117700_archive_1.so new file mode 100755 index 0000000..8ee6cbc Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/_117700_archive_1.so differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/binmap.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/binmap.sdb new file mode 100644 index 0000000..83151ca Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/binmap.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/build_db b/DA4008_V1.2/sim/lvds/simv.daidir/build_db new file mode 100755 index 0000000..94b240b --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/build_db @@ -0,0 +1,4 @@ +#!/bin/sh -e +# This file is automatically generated by VCS. Any changes you make +# to it will be overwritten the next time VCS is run. +vcs '-full64' '-j8' '-sverilog' '+lint=TFIPC-L' '+v2k' '-debug_access+pp' '-lca' '-q' '-timescale=1ns/1ps' '+nospecify' '-l' 'compile.log' '-cm' 'line+cond+fsm+tgl+branch' '-cm_dir' './coverage/simv.vdb' '-f' 'filelist_vlg.f' '+incdir+./../../rtl/define' '+incdir+./../../rtl/qubitmcu' '+incdir+./../../model' -static_dbgen_only -daidir=$1 2>&1 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_bcode.db b/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_bcode.db new file mode 100644 index 0000000..80340d4 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_bcode.db @@ -0,0 +1,34 @@ +sid sirv_gnrl_xchecker +bcid 0 0 WIDTH,32 CALL_ARG_VAL,2,0 WIDTH,1 XOR_REDUCE OPT_CONST_4ST,1,1 NEQU RET +sid ulink_descrambler_32 +bcid 1 0 WIDTH,32 CALL_ARG_VAL,2,0 OPT_CONST,0 WIDTH,31 SLICE,1 WIDTH,32 CALL_ARG_VAL,2,0 OPT_CONST,28 WIDTH,4 SLICE,1 WIDTH,1 XOR_REDUCE WIDTH,32 CONCATENATE,2 RET +bcid 2 1 WIDTH,1 CALL_ARG_VAL,2,0 CALL_ARG_VAL,3,0 AND WIDTH,32 CALL_ARG_VAL,4,0 CALL_ARG_VAL,5,0 XOR CALL_ARG_VAL,4,0 MITECONDNOINSTR,4 RET +sid syn_fwft_fifo +bcid 3 0 WIDTH,6 CALL_ARG_VAL,2,0 WIDTH,4 OPT_CONST,0 WIDTH,1 CALL_ARG_VAL,3,0 CALL_ARG_VAL,4,0 LNOT AND WIDTH,5 CONCATENATE,2 WIDTH,6 PAD ADD RET +bcid 4 1 WIDTH,6 CALL_ARG_VAL,2,0 CALL_ARG_VAL,3,0 WIDTH,1 M_NEQU RET +bcid 5 2 WIDTH,7 CALL_ARG_VAL,2,0 WIDTH,32 PAD OPT_CONST,62 WIDTH,1 M_GT RET +bcid 6 3 WIDTH,7 CALL_ARG_VAL,2,0 WIDTH,32 PAD OPT_CONST,59 WIDTH,1 M_GT RET +bcid 7 4 WIDTH,7 CALL_ARG_VAL,2,0 WIDTH,32 PAD OPT_CONST,510 WIDTH,1 M_GT RET +bcid 8 5 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,128 CONST,0,0 CALL_ARG_VAL,3,0 MITECONDNOINSTR,4 RET +bcid 9 6 WIDTH,7 CALL_ARG_VAL,2,0 OPT_CONST,0 WIDTH,1 M_EQU RET +bcid 10 7 WIDTH,7 CALL_ARG_VAL,2,0 OPT_CONST,2 WIDTH,1 M_LT RET +bcid 11 8 WIDTH,7 CALL_ARG_VAL,2,0 WIDTH,32 PAD OPT_CONST,17 WIDTH,1 M_LT RET +sid TB +bcid 12 0 WIDTH,20 CALL_ARG_VAL,2,0 OPT_CONST,10000 WIDTH,1 M_NEQU RET +bcid 13 1 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,20 CALL_ARG_VAL,3,0 OPT_CONST,9999 WIDTH,1 M_EQU AND RET +bcid 14 2 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,20 OPT_CONST,0 WIDTH,1 CALL_ARG_VAL,3,0 WIDTH,20 CALL_ARG_VAL,4,0 OPT_CONST,1 ADD CALL_ARG_VAL,4,0 MITECONDNOINSTR,4 MITECONDNOINSTR,4 RET +bcid 15 3 WIDTH,2 CALL_ARG_VAL,2,0 OPT_CONST,2 WIDTH,1 M_EQU CALL_ARG_VAL,3,0 OR RET +bcid 16 4 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,5 CALL_ARG_VAL,3,0 OPT_CONST,31 WIDTH,1 M_EQU AND RET +bcid 17 5 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,5 OPT_CONST,0 WIDTH,1 CALL_ARG_VAL,3,0 WIDTH,5 CALL_ARG_VAL,4,0 OPT_CONST,1 ADD CALL_ARG_VAL,4,0 MITECONDNOINSTR,4 MITECONDNOINSTR,4 RET +bcid 18 6 WIDTH,32 CALL_ARG_VAL,2,0 OPT_CONST,1751543404 WIDTH,1 M_EQU WIDTH,32 CALL_ARG_VAL,3,0 OPT_CONST,1751543404 WIDTH,1 M_EQU AND WIDTH,32 CALL_ARG_VAL,4,0 OPT_CONST,1751543404 WIDTH,1 M_EQU WIDTH,32 CALL_ARG_VAL,5,0 OPT_CONST,1751543404 WIDTH,1 M_EQU AND AND RET +bcid 19 7 WIDTH,32 CALL_ARG_VAL,2,0 OPT_CONST,1702390132 WIDTH,1 M_EQU WIDTH,32 CALL_ARG_VAL,3,0 OPT_CONST,1702390132 WIDTH,1 M_EQU AND WIDTH,32 CALL_ARG_VAL,4,0 OPT_CONST,1702390132 WIDTH,1 M_EQU WIDTH,32 CALL_ARG_VAL,5,0 OPT_CONST,1702390132 WIDTH,1 M_EQU AND AND RET +bcid 20 8 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,20 CALL_ARG_VAL,3,0 WIDTH,32 PAD WIDTH,20 CALL_ARG_VAL,4,0 WIDTH,32 PAD OPT_CONST,2 SUBTRACT WIDTH,1 M_EQU AND RET +bcid 21 9 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,3 CALL_ARG_VAL,3,0 CALL_ARG_VAL,4,0 CALL_ARG_VAL,3,0 ADD MITECONDNOINSTR,4 RET +bcid 22 10 WIDTH,32 CALL_ARG_VAL,2,0 OPT_CONST,-1128481604 WIDTH,1 M_EQU RET +bcid 23 11 WIDTH,1 CALL_ARG_VAL,2,0 CALL_ARG_VAL,3,0 AND OPT_CONST,1 CALL_ARG_VAL,4,0 OPT_CONST,0 CALL_ARG_VAL,5,0 OPT_CONST,0 CALL_ARG_VAL,6,0 MITECONDNOINSTR,4 MITECONDNOINSTR,4 MITECONDNOINSTR,4 RET +bcid 24 12 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,5 CALL_ARG_VAL,3,0 OPT_CONST,31 WIDTH,1 M_EQU AND CALL_ARG_VAL,4,0 OR RET +bcid 25 13 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,3 MULTI_CONCATENATE,1,3 RET +bcid 26 14 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,16 OPT_CONST,0 WIDTH,1 CALL_ARG_VAL,3,0 WIDTH,16 CALL_ARG_VAL,4,0 OPT_CONST,1 ADD CALL_ARG_VAL,4,0 MITECONDNOINSTR,4 MITECONDNOINSTR,4 RET +bcid 27 15 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,4 MULTI_CONCATENATE,1,4 WIDTH,1 CALL_ARG_VAL,3,0 WIDTH,4 MULTI_CONCATENATE,1,4 NOT OR RET +bcid 28 16 WIDTH,16 CALL_ARG_VAL,2,0 WIDTH,1 CALL_ARG_VAL,3,0 WIDTH,16 MULTI_CONCATENATE,1,16 OR RET +bcid 29 17 WIDTH,1 CALL_ARG_VAL,2,0 WIDTH,32 CALL_ARG_VAL,3,0 CALL_ARG_VAL,4,0 WIDTH,1 M_NEQU AND RET diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_dummy_file b/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_dummy_file new file mode 100644 index 0000000..9ec9235 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/cc/cc_dummy_file @@ -0,0 +1,2 @@ +Dummy_file +Missing line/file info diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/cgname.json b/DA4008_V1.2/sim/lvds/simv.daidir/cgname.json new file mode 100644 index 0000000..11b1766 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/cgname.json @@ -0,0 +1,176 @@ +{ + "sirv_gnrl_dffr_0004": [ + "sirv_gnrl_dffr_0004", + "dAYpP", + "module", + 18 + ], + "sirv_gnrl_dfflr_0002": [ + "sirv_gnrl_dfflr_0002", + "D5nSS", + "module", + 5 + ], + "sirv_gnrl_dffr_0002": [ + "sirv_gnrl_dffr_0002", + "qCch4", + "module", + 16 + ], + "std": [ + "std", + "reYIK", + "module", + 1 + ], + "TB": [ + "TB", + "sH4Fc", + "module", + 28 + ], + "sirv_gnrl_dfflr_0005": [ + "sirv_gnrl_dfflr_0005", + "N9yP9", + "module", + 8 + ], + "sirv_gnrl_dffl": [ + "sirv_gnrl_dffl", + "BM4bj", + "module", + 12 + ], + "...MASTER...": [ + "SIM", + "amcQw", + "module", + 29 + ], + "sirv_gnrl_edffr_0000": [ + "sirv_gnrl_edffr_0000", + "pyfvI", + "module", + 23 + ], + "sirv_gnrl_ltch": [ + "sirv_gnrl_ltch", + "UTi0b", + "module", + 22 + ], + "sirv_gnrl_xchecker": [ + "sirv_gnrl_xchecker", + "CjC7H", + "module", + 2 + ], + "sirv_gnrl_edffr_0001": [ + "sirv_gnrl_edffr_0001", + "dHTCN", + "module", + 24 + ], + "sirv_gnrl_dffr_0005": [ + "sirv_gnrl_dffr_0005", + "sF7c0", + "module", + 19 + ], + "sirv_gnrl_dfflr_0004": [ + "sirv_gnrl_dfflr_0004", + "ty6HF", + "module", + 7 + ], + "ulink_descrambler_32": [ + "ulink_descrambler_32", + "yuek5", + "module", + 26 + ], + "sirv_gnrl_dfflrs": [ + "sirv_gnrl_dfflrs", + "ZJgwY", + "module", + 3 + ], + "sirv_gnrl_dfflr_0001": [ + "sirv_gnrl_dfflr_0001", + "c06YI", + "module", + 4 + ], + "sirv_gnrl_dffr_0000": [ + "sirv_gnrl_dffr_0000", + "GAFTT", + "module", + 15 + ], + "sirv_gnrl_dfflr_0003": [ + "sirv_gnrl_dfflr_0003", + "iiu4n", + "module", + 6 + ], + "sirv_gnrl_dfflr_0006": [ + "sirv_gnrl_dfflr_0006", + "P2v7r", + "module", + 9 + ], + "sirv_gnrl_dffrs": [ + "sirv_gnrl_dffrs", + "QHiet", + "module", + 13 + ], + "sirv_gnrl_dfflrd": [ + "sirv_gnrl_dfflrd", + "Uye5v", + "module", + 11 + ], + "sirv_gnrl_dfflr_0007": [ + "sirv_gnrl_dfflr_0007", + "GKZvJ", + "module", + 10 + ], + "syn_fwft_fifo": [ + "syn_fwft_fifo", + "gzftm", + "module", + 25 + ], + "sirv_gnrl_dffr": [ + "sirv_gnrl_dffr", + "Wnd0S", + "module", + 14 + ], + "sirv_gnrl_dffr_0003": [ + "sirv_gnrl_dffr_0003", + "QH5mS", + "module", + 17 + ], + "crc32": [ + "crc32", + "T59nH", + "module", + 27 + ], + "sirv_gnrl_dffr_0006": [ + "sirv_gnrl_dffr_0006", + "MhyM4", + "module", + 20 + ], + "sirv_gnrl_dffr_0007": [ + "sirv_gnrl_dffr_0007", + "nMT3S", + "module", + 21 + ] +} \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/covg_defs b/DA4008_V1.2/sim/lvds/simv.daidir/covg_defs new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/.version b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/.version new file mode 100644 index 0000000..ba73ed3 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/.version @@ -0,0 +1,4 @@ +O-2018.09-SP2_Full64 +Build Date = Feb 28 2019 22:34:30 +RedHat +Compile Location: /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/AllModulesSkeletons.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/AllModulesSkeletons.sdb new file mode 100644 index 0000000..b988cc4 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/AllModulesSkeletons.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/HsimSigOptDb.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/HsimSigOptDb.sdb new file mode 100644 index 0000000..8fcf63b Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/HsimSigOptDb.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/dumpcheck.db b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/dumpcheck.db new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/dve_debug.db.gz b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/dve_debug.db.gz new file mode 100644 index 0000000..4a5cb04 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/dve_debug.db.gz differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db new file mode 100755 index 0000000..bb3b02e --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db @@ -0,0 +1,9 @@ +#!/bin/sh -h +PYTHONHOME=/opt/synopsys/vcs-mx/O-2018.09-SP2/etc/search/pyh +export PYTHONHOME +PYTHONPATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 +export PYTHONPATH +LD_LIBRARY_PATH=/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib:/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/lib/pylib27 +export LD_LIBRARY_PATH +/opt/synopsys/vcs-mx/O-2018.09-SP2/linux64/bin/vcsfind_create_index.exe -z "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/./idents_HfVCGe.xml.gz" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/./idents_tapi.xml.gz" -o "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" +\mv "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.db_tmp" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.db" diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/check_fsearch_db b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/check_fsearch_db new file mode 100755 index 0000000..1ccf475 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/check_fsearch_db @@ -0,0 +1,57 @@ +#!/bin/sh -h + +FILE_PATH="/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch" +lockfile="${FILE_PATH}"/lock + +FSearch_lock_release() { + echo "" > /dev/null +} +create_fsearch_db_ctrl() { + if [ -s "${FILE_PATH}"/fsearch.stat ]; then + if [ -s "${FILE_PATH}"/fsearch.log ]; then + echo "ERROR building identifier database failed. Check ${FILE_PATH}/fsearch.log" + else + cat "${FILE_PATH}"/fsearch.stat + fi + return + fi + nohup "$1" > "${FILE_PATH}"/fsearch.log 2>&1 193>/dev/null & + MY_PID=`echo $!` + BUILDER="pid ${MY_PID} ${USER}@${hostname}" + echo "INFO Started building database for Identifiers, please wait ($BUILDER). Use VCS elab option '-debug_access+idents_db' to build the database earlier." + echo "INFO Still building database for Identifiers, please wait ($BUILDER). Use VCS elab option '-debug_access+idents_db' to build the database earlier." > "${FILE_PATH}"/fsearch.stat + return +} + +dir_name=`/bin/dirname "$0"` +if [ "${dir_name}" = "." ]; then + cd $dir_name + dir_name=`/bin/pwd` +fi +if [ -d "$dir_name"/../../../../../../../../../../.. ]; then + cd "$dir_name"/../../../../../../../../../../.. +fi + +if [ -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db" ]; then + if [ ! -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.db" ]; then + if [ "$#" -eq 1 ] && [ "x$1" == "x-background" ]; then + trap FSearch_lock_release EXIT + ( + flock 193 + create_fsearch_db_ctrl "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db" + exit 193 + ) 193> "$lockfile" + rstat=$? + if [ "${rstat}"x != "193x" ]; then + exit $rstat + fi + else + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/.create_fsearch_db" + if [ -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then + rm -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat" + fi + fi + elif [ -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat" ]; then + rm -f "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat" + fi +fi diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/fsearch.stat new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_HfVCGe.xml.gz b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_HfVCGe.xml.gz new file mode 100644 index 0000000..5fbbb04 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_HfVCGe.xml.gz differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz new file mode 100644 index 0000000..29d279e Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/fsearch/idents_tapi.xml.gz differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/src_files_verilog b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/src_files_verilog new file mode 100644 index 0000000..15036f3 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/src_files_verilog @@ -0,0 +1,7 @@ +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/comm/sirv_gnrl_dffs.v +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/comm/sirv_gnrl_xchecker.v +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/fifo/syn_fwft_fifo.v +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/lvds/ulink_rx.sv +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/memory/bhv_spram.v +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/rtl/memory/spram.v +/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/TB.sv diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/topmodules b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/topmodules new file mode 100644 index 0000000..515257e --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/topmodules @@ -0,0 +1 @@ +1YX% \ No newline at end of file diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/vir.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/vir.sdb new file mode 100644 index 0000000..4b5f941 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/debug_dump/vir.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/eblklvl.db b/DA4008_V1.2/sim/lvds/simv.daidir/eblklvl.db new file mode 100644 index 0000000..f8a481d Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/eblklvl.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/elabmoddb.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/elabmoddb.sdb new file mode 100644 index 0000000..774727d Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/elabmoddb.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/external_functions b/DA4008_V1.2/sim/lvds/simv.daidir/external_functions new file mode 100644 index 0000000..b76773b --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/external_functions @@ -0,0 +1,78 @@ +pli $fsdbDumpvars novas_call_fsdbDumpvars - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpvarsES novas_call_fsdbDumpvarsES - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMDA novas_call_fsdbDumpMDA - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpSVA novas_call_fsdbDumpSVA - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpvarsByFile novas_call_fsdbDumpvarsByFile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbSuppress novas_call_fsdbSuppress - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpon novas_call_fsdbDumpon - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpoff novas_call_fsdbDumpoff - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbSwitchDumpfile novas_call_fsdbSwitchDumpfile - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpfile novas_call_fsdbDumpfile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbAutoSwitchDumpfile novas_call_fsdbAutoSwitchDumpfile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpFinish novas_call_fsdbDumpFinish - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpflush novas_call_fsdbDumpflush - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbLog novas_call_fsdbLog - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbAddRuntimeSignal novas_call_fsdbAddRuntimeSignal - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpSC novas_call_fsdbDumpSC - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpvarsToFile novas_call_fsdbDumpvarsToFile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_create_transaction_stream novas_call_sps_create_transaction_stream - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_begin_transaction novas_call_sps_begin_transaction - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_end_transaction novas_call_sps_end_transaction - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_free_transaction novas_call_sps_free_transaction - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_add_attribute novas_call_sps_add_attribute - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_update_label novas_call_sps_update_label - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_add_relation novas_call_sps_add_relation - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbWhatif novas_call_fsdbWhatif - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $paa_init novas_call_paa_init - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $paa_sync novas_call_paa_sync - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpClassMethod novas_call_fsdbDumpClassMethod - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbSuppressClassMethod novas_call_fsdbSuppressClassMethod - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbSuppressClassProp novas_call_fsdbSuppressClassProp - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMDAByFile novas_call_fsdbDumpMDAByFile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_create_stream_begin novas_call_fsdbEvent_create_stream_begin - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_define_attribute novas_call_fsdbEvent_add_stream_attribute - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_create_stream_end novas_call_fsdbEvent_create_stream_end - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_begin novas_call_fsdbEvent_begin - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_set_label novas_call_fsdbEvent_set_label - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_add_attribute novas_call_fsdbEvent_add_attribute - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_add_tag novas_call_fsdbEvent_add_tag - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_end novas_call_fsdbEvent_end - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_add_relation novas_call_fsdbEvent_add_relation - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_get_error_code novas_call_fsdbEvent_get_error_code - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_add_stream_attribute novas_call_fsdbTrans_add_stream_attribute - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbTrans_add_scope_attribute novas_call_fsdbTrans_add_scope_attribute - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_interactive novas_call_sps_interactive - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_test novas_call_sps_test - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpClassObject novas_call_fsdbDumpClassObject - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpClassObjectByFile novas_call_fsdbDumpClassObjectByFile - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $ridbDump novas_call_ridbDump - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $sps_flush_file novas_call_sps_flush_file - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpPSL novas_call_fsdbDumpPSL - novas_misc /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDisplay novas_call_fsdbDisplay - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumplimit novas_call_fsdbDumplimit - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMem novas_call_fsdbDumpMem - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMemNow novas_call_fsdbDumpMemNow - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMemInScope novas_call_fsdbDumpMemInScope - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMDANow novas_call_fsdbDumpMDANow - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMDAOnChange novas_call_fsdbDumpMDAOnChange - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMDAInScope novas_call_fsdbDumpMDAInScope - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpMemInFile novas_call_fsdbDumpMemInFile - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpPSLon novas_call_fsdbDumpPSLon - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpPSLoff novas_call_fsdbDumpPSLoff - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpSVAon novas_call_fsdbDumpSVAon - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpSVAoff novas_call_fsdbDumpSVAoff - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpStrength novas_call_fsdbDumpStrength - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpSingle novas_call_fsdbDumpSingle - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpIO novas_call_fsdbDumpIO - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbDumpPattern novas_call_fsdbDumpPattern - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $fsdbSubstituteHier novas_call_fsdbSubstituteHier - - /opt/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/LINUX64/verdi.tab +pli $dumpports DumpPortsIeeeCALL - DumpPortsMISC +pli $lsi_dumpports DumpPortsLsiCALL - DumpPortsMISC +pli $dumpportson DumpPortsOnCALL - DumpPortsMISC +pli $dumpportsoff DumpPortsOffCALL - DumpPortsMISC +pli $dumpportsflush DumpPortsFlushCALL - DumpPortsMISC +pli $simlearn simLearnCall simLearnCheck simLearnMisc +pli $dumpportsall DumpPortsAllCALL - DumpPortsMISC +pli $dumpportslimit DumpPortsLimitCALL - DumpPortsMISC +pli $countdrivers CountDriversCALL - - +pli $vcsmemprof DMMemProfCALL DMMemProfCheck DMMemProfMISC diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_callgraph.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_callgraph.sdb new file mode 100644 index 0000000..dde281d Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_callgraph.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_level.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_level.sdb new file mode 100644 index 0000000..6a51020 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_level.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_rtime_level.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/hslevel_rtime_level.sdb new file mode 100644 index 0000000..6b5b752 Binary files /dev/null and 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a/DA4008_V1.2/sim/lvds/simv.daidir/indcall_117700.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/indcall_117700.sdb new file mode 100644 index 0000000..35e5871 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/indcall_117700.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/nsparam.dat b/DA4008_V1.2/sim/lvds/simv.daidir/nsparam.dat new file mode 100644 index 0000000..1c1eb11 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/nsparam.dat differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/pcc.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/pcc.sdb new file mode 100644 index 0000000..0663705 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/pcc.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/pcxpxmr.dat b/DA4008_V1.2/sim/lvds/simv.daidir/pcxpxmr.dat new file mode 100644 index 0000000..229151a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/pcxpxmr.dat differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/prof.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/prof.sdb new file mode 100644 index 0000000..dc3fab0 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/prof.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.dat b/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.dat new file mode 100644 index 0000000..bd15b79 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.dat differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.so b/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.so new file mode 100755 index 0000000..61004b2 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/rmapats.so differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/saifNetInfo.db b/DA4008_V1.2/sim/lvds/simv.daidir/saifNetInfo.db new file mode 100644 index 0000000..573541a --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/saifNetInfo.db @@ -0,0 +1 @@ +0 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/stitch_nsparam.dat b/DA4008_V1.2/sim/lvds/simv.daidir/stitch_nsparam.dat new file mode 100644 index 0000000..0357d47 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/stitch_nsparam.dat differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/tt.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/tt.sdb new file mode 100644 index 0000000..133b848 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/tt.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117681.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117681.sdb new file mode 100644 index 0000000..2ab0f6e Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117681.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117699.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117699.sdb new file mode 100644 index 0000000..88a1040 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117699.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117700.sdb b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117700.sdb new file mode 100644 index 0000000..6031626 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/ttIncr_117700.sdb differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcs_rebuild b/DA4008_V1.2/sim/lvds/simv.daidir/vcs_rebuild new file mode 100755 index 0000000..c91bc83 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/vcs_rebuild @@ -0,0 +1,4 @@ +#!/bin/sh -e +# This file is automatically generated by VCS. Any changes you make +# to it will be overwritten the next time VCS is run. +vcs '-full64' '-j8' '-sverilog' '+lint=TFIPC-L' '+v2k' '-debug_access+pp' '-lca' '-q' '-timescale=1ns/1ps' '+nospecify' '-l' 'compile.log' '-cm' 'line+cond+fsm+tgl+branch' '-cm_dir' './coverage/simv.vdb' '-f' 'filelist_vlg.f' '+incdir+./../../rtl/define' '+incdir+./../../rtl/qubitmcu' '+incdir+./../../model' 2>&1 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_master_hsim_elabout.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_master_hsim_elabout.db new file mode 100644 index 0000000..60c0043 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_master_hsim_elabout.db @@ -0,0 +1,691 @@ +hsDirType 1 +fHsimDesignHasDebugNodes 15 +fNSParam 1024 +fLargeSizeSdfTest 0 +fHsimDelayGateMbme 0 +fNoMergeDelays 0 +fHsimAllMtmPat 0 +fHsimCertRaptMode 0 +fSharedMasterElab 0 +hsimLevelizeDone 1 +fHsimCompressDiag 1 +fHsimPowerOpt 0 +fLoopReportElab 0 +fHsimRtl 0 +fHsimCbkOptVec 1 +fHsimDynamicCcnHeur 1 +fHsimPvcs 0 +fHsimPvcsCcn 0 +fHsimOldLdr 0 +fHsimSingleDB 1 +uVfsGcLimit 50 +fHsimCompatSched 0 +fHsimCompatOrder 0 +fHsimTransUsingdoMpd32 0 +fHsimDynamicElabForGates 1 +fHsimDynamicElabForVectors 0 +fHsimDynamicElabForVectorsAlways 0 +fHsimDynamicElabForVectorsMinputs 0 +fHsimDeferForceSelTillReElab 0 +fHsimModByModElab 1 +fSvNettRealResType 0 +fHsimExprID 1 +fHsimSequdpon 0 +fHsimDatapinOpt 0 +fHsimExprPrune 0 +fHsimMimoGate 0 +fHsimNewChangeCheckFrankch 1 +fHsimNoSched0Front 0 +fHsimNoSched0FrontForMd 1 +fHsimScalReg 0 +fHsimNtbVl 0 +fHsimICTimeStamp 0 +fHsimICDiag 0 +fHsimNewCSDF 1 +vcselabIncrMode 2 +fHsimMPPackDelay 0 +fHsimMultDriver 0 +fHsimPart 0 +fHsimPrlComp 0 +fHsimPartTest 0 +fHsimTestChangeCheck 0 +fHsimTestFlatNodeOrder 0 +fHsimTestNState 0 +fHsimPartDebug 0 +fHsimPartFlags 0 +fHsimOdeSched0 0 +fHsimNewRootSig 1 +fHsimDisableRootSigModeOpt 0 +fHsimTestRootSigModeOpt 0 +fHsimIncrWriteOnce 0 +fHsimUnifInterfaceFlow 1 +fHsimUnifInterfaceFlowDiag 0 +fHsimUnifInterfaceFlowXmrDiag 0 +fHsimUnifInterfaceMultiDrvChk 1 +fHsimXVirForGenerateScope 0 +fHsimCongruencyIntTestI 0 +fHsimCongruencySVA 0 +fHsimCongruencySVADbg 0 +fHsimCongruencyLatchEdgeFix 0 +fHsimCongruencyFlopEdgeFix 0 +fHsimCongruencyXprop 0 +fHsimCongruencyXpropFix 0 +fHsimCongruencyXpropDbsEdge 0 +fHsimCongruencyResetRecoveryDbs 0 +fHsimCongruencyClockControlDiag 0 +fHsimCongruencySampleUpdate 0 +fHsimCongruencyFFDbsFix 0 +fHsimCongruency 0 +fHsimCongruencySlave 0 +fHsimCongruencyCombinedLoads 0 +fHsimCongruencyFGP 0 +fHsimDeraceClockDataUdp 0 +fHsimDeraceClockDataLERUpdate 0 +fHsimCongruencyPC 0 +fHsimCongruencyPCInl 0 +fHsimCongruencyPCDbg 0 +fHsimCongruencyPCNoReuse 0 +fHsimCongruencyDumpHier 0 +fHsimCongruencyResolution 0 +fHsimCongruencyEveBus 0 +fHsimHcExpr 0 +fHsCgOptModOpt 0 +fHsCgOptSlowProp 0 +fHsimCcnOpt 1 +fHsimCcnOpt2 1 +fHsimCcnOpt3 0 +fHsimSmdMap 0 +fHsimSmdDiag 0 +fHsimSmdSimProf 0 +fHsimSgdDiag 0 +fHsimRtDiagLite 0 +fHsimRtDiagLiteCevent 100 +fHsimRtDiag 0 +fHsimSkRtDiag 0 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+hsNodeDownOffsetPageElems 0 +hsNodeUpdateOffsetPageElems 0 +hsSdfOffsetPageElems 0 +fHsimPageAllLevelData 0 +fHsimAggrCg 0 +fHsimViWire 1 +fHsimPcCbOpt 1 +fHsimAmsTunneling 0 +fHsimAmsTunnelingDiag 0 +fHsimScUpwardXmrNoSplit 1 +fHsimOrigNdbViewOnly 0 +fHsimVcsInterface 1 +fHsimVcsInterfaceAlias 1 +fHsimSVTypesIntf 1 +fUnifiedAssertCtrlDiag 0 +fHsimEnable2StateScal 0 +fHsimDisable2StateScalIbn 0 +fHsimVcsInterfaceAliasDbg 0 +fHsimVcsInterfaceDbg 0 +fHsimVcsVirtIntfDbg 0 +fHsimVcsAllIntfVarMem 0 +fHsimCheckVIDynLoadOffsets 0 +fHsimModInline 1 +fHsimModInlineDbg 0 +fHsimPCDrvLoadDbg 0 +fHsimDrvChk 1 +fHsimRtlProcessingNeeded 0 +fHsimGrpByGrpElab 0 +fHsimGrpByGrpElabMaster 0 +fHsimNoParentSplitPC 0 +fHsimNusymMode 0 +fHsimOneIntfPart 0 +fHsimCompressInSingleDb 2 +fHsimCompressFlatDb 0 +fHsimNoTime0Sched 1 +fHsimMdbVectorizeInstances 0 +fHsimMdbSplitGates 0 +fHsimDeleteInstances 0 +fHsimUserDeleteInstances 0 +fHsimDeleteGdb 0 +fHsimDeleteInstancesMdb 0 +fHsimShortInstMap 0 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diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hil_stmts.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hil_stmts.db new file mode 100644 index 0000000..66fe5a8 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hil_stmts.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsdef.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsdef.db new file mode 100644 index 0000000..6f705b5 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsdef.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_elab.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_elab.db new file mode 100644 index 0000000..9d15b58 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_elab.db @@ -0,0 +1,1217 @@ +psSimBaseName simv +psLogFileName compile.log +pDaiDir /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/simv.daidir +destPath csrc/ +fSharedMaster 0 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+fHsimCanDumpClkConfig 0 +fFgpInitRout 0 +fFgpIgnoreExclSD 0 +fHsimAggrTCOpt 0 +fFgpNewAggrXmrIterFlow 0 +fFgpNoLocalReferer 0 +fHsCgOptNoClockFusing 0 +fHsClkWheelLimit 50000 +fHsFgpSchedCgUcLoads 1 +fHsimAdvanceUdpInfer 0 +fFgpIbnSchedIntf 0 +fHsCgOptNewSelCheck 1 +fFgpReportUnsafeFuncs 0 +fHsCgOptUncPrlThreshold 4 +fHsimCosimGatesProp 0 +fHsSVNettypePerfOpt 0 +fHsCgOptHashFixMap 1 +fHsimLowPowerRetAnalysisInChild 0 +fRetainWithDelayedSig 0 +fHsimChargeDecay 0 +fHsimCongruencyConfigFile 0 +fHsimCongruencyLogFile 0 +fHsimCoverageEnabled 1 +fHsimCoverageOptions 279 +fHsimCoverageDir ./coverage/simv.vdb diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_fegate.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_fegate.db new file mode 100644 index 0000000..09fbb1e Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_fegate.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_lvl.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_lvl.db new file mode 100644 index 0000000..5d94a3d Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_lvl.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_merge.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_merge.db new file mode 100644 index 0000000..daee268 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_merge.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_name.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_name.db new file mode 100644 index 0000000..845a982 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_name.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_uds.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_uds.db new file mode 100644 index 0000000..c9247d6 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_hsim_uds.db @@ -0,0 +1,4 @@ +vcselab_misc_midd.db 12293 +vcselab_misc_mnmn.db 603 +vcselab_misc_hsim_name.db 2565 +vcselab_misc_hsim_merge.db 79316 diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_midd.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_midd.db new file mode 100644 index 0000000..cdc702d Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_midd.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_mnmn.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_mnmn.db new file mode 100644 index 0000000..831b365 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_mnmn.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_partition.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_partition.db new file mode 100644 index 0000000..057063a Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_partition.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vcselabref.db b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vcselabref.db new file mode 100644 index 0000000..f76dd23 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vcselabref.db differ diff --git a/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vpdnodenums b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vpdnodenums new file mode 100644 index 0000000..da3eda5 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/simv.daidir/vcselab_misc_vpdnodenums differ diff --git a/DA4008_V1.2/sim/lvds/ucli.key b/DA4008_V1.2/sim/lvds/ucli.key new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/.diagnose.oneSearch b/DA4008_V1.2/sim/lvds/verdiLog/.diagnose.oneSearch new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/ToNetlist.log b/DA4008_V1.2/sim/lvds/verdiLog/ToNetlist.log new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/compiler.log b/DA4008_V1.2/sim/lvds/verdiLog/compiler.log new file mode 100644 index 0000000..29da552 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/compiler.log @@ -0,0 +1,25 @@ +*design* DebussyLib (btIdent Verdi_O-2018.09-SP2) +Command arguments: + +define+verilog + -sverilog + -f filelist_vlg.f + ../../rtl/comm/sirv_gnrl_xchecker.v + ../../rtl/comm/sirv_gnrl_dffs.v + ../../rtl/memory/spram.v + ../../rtl/memory/bhv_spram.v + ../../rtl/fifo/syn_fwft_fifo.v + ../../rtl/lvds/ulink_rx.sv + ../../sim/lvds/TB.sv + -top + TB + +Highest level modules: +sirv_gnrl_xchecker +sirv_gnrl_dfflrs +sirv_gnrl_dfflrd +sirv_gnrl_dffl +sirv_gnrl_dffrs +sirv_gnrl_ltch +TB + +Total 0 error(s), 0 warning(s) diff --git a/DA4008_V1.2/sim/lvds/verdiLog/exe.log b/DA4008_V1.2/sim/lvds/verdiLog/exe.log new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas.log b/DA4008_V1.2/sim/lvds/verdiLog/novas.log new file mode 100644 index 0000000..157ce72 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/novas.log @@ -0,0 +1,10 @@ +Verdi (R) + +Release Verdi_O-2018.09-SP2 for (RH Linux x86_64/64bit) -- Thu Feb 21 04:40:56 PDT 2019 + +Copyright (c) 1999 - 2019 Synopsys, Inc. +This software and the associated documentation are proprietary to Synopsys, Inc. +This software may only be used in accordance with the terms and conditions of a written license agreement with Synopsys, Inc. +All other use, reproduction, or distribution of this software is strictly prohibited. + + diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas.rc b/DA4008_V1.2/sim/lvds/verdiLog/novas.rc new file mode 100644 index 0000000..ea70da1 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/novas.rc @@ -0,0 +1,1315 @@ +@verdi rc file Version 1.0 +[Library] +work = ./work +[Annotation] +3D_Active_Annotation = FALSE +[CommandSyntax.finsim] +InvokeCommand = +FullFileName = TRUE +Separator = . +SimPromptSign = ">" +HierNameLevel = 1 +RunContinue = "continue" +Finish = "quit" +UseAbsTime = FALSE +NextTime = "run 1" +NextNTime = "run ${SimBPTime}" +NextEvent = "run 1" +Reset = +ObjPosBreak = "break posedge ${SimBPObj}" +ObjNegBreak = "break negedge ${SimBPObj}" +ObjAnyBreak = "break change ${SimBPObj}" +ObjLevelBreak = +LineBreak = "breakline ${SimBPFile} ${SimBPLine}" +AbsTimeBreak = "break abstimeaf ${SimBPTime}" +RelTimeBreak = "break reltimeaf ${SimBPTime}" +EnableBP = "breakon ${SimBPId}" +DisableBP = "breakoff ${SimBPId}" +DeleteBP = "breakclr ${SimBPId}" +DeleteAllBP = "breakclr" +SimSetScope = "cd ${SimDmpObj}" +[CommandSyntax.ikos] +InvokeCommand = "setvar debussy true;elaborate -p ${SimTop} -s ${SimArch}; run until 0;fsdbInteractive; " +FullFileName = TRUE +NeedTimeUnit = TRUE +NormalizeTimeUnit = TRUE +Separator = / +HierNameLevel = 2 +RunContinue = "run" +Finish = "exit" +NextTime = "run ${SimBPTime} ${SimTimeUnit}" +NextNTime = "run for ${SimBPTime} ${SimTimeUnit}" +NextEvent = "step 1" +Reset = "reset" +ObjPosBreak = "stop if ${SimBPObj} = \"'1'\"" +ObjNegBreak = "stop if ${SimBPObj} = \"'0'\"" +ObjAnyBreak = +ObjLevelBreak = "stop if ${SimBPObj} = ${SimBPValue}" +LineBreak = "stop at ${SimBPFile}:${SimBPLine}" +AbsTimeBreak = +RelTimeBreak = +EnableBP = "enable ${SimBPId}" +DisableBP = "disable ${SimBPId}" +DeleteBP = "delete ${SimBPId}" +DeleteAllBP = "delete *" +[CommandSyntax.verisity] +InvokeCommand = +FullFileName = FALSE +Separator = . +SimPromptSign = "> " +HierNameLevel = 1 +RunContinue = "." +Finish = "$finish;" +NextTime = "$db_steptime(1);" +NextNTime = "$db_steptime(${SimBPTime});" +NextEvent = "$db_step;" +SimSetScope = "$scope(${SimDmpObj});" +Reset = "$reset;" +ObjPosBreak = "$db_breakonposedge(${SimBPObj});" +ObjNegBreak = "$db_breakonnegedge(${SimBPObj});" +ObjAnyBreak = "$db_breakwhen(${SimBPObj});" +ObjLevelBreak = "$db_breakwhen(${SimBPObj}, ${SimBPValue});" +LineBreak = "$db_breakatline(${SimBPLine}, ${SimBPScope}, \"${SimBPFile}\");" +AbsTimeBreak = "$db_breakbeforetime(${SimBPTime});" +RelTimeBreak = "$db_breakbeforetime(${SimBPTime});" +EnableBP = "$db_enablebreak(${SimBPId});" +DisableBP = "$db_disablebreak(${SimBPId});" +DeleteBP = "$db_deletebreak(${SimBPId});" +DeleteAllBP = "$db_deletebreak;" +FSDBInit = "$novasInteractive;" +FSDBDumpvars = "$novasDumpvars(0, ${SimDmpObj});" +FSDBDumpsingle = "$novasDumpsingle(${SimDmpObj});" +FSDBDumpvarsInFile = "$novasDumpvarsToFile(\"${SimDmpFile}\");" +FSDBDumpMem = "$novasDumpMemNow(${SimDmpObj}, ${SimDmpBegin}, ${SimDmpSize});" +[CoverageDetail] +cross_filter_limit = 1000 +branch_limit_vector_display = 50 +showgrid = TRUE +reuseFirst = TRUE +justify = TRUE +scrollbar_mode = per pane +test_combo_left_truncate = TRUE +instance_combo_left_truncate = TRUE +loop_navigation = TRUE +condSubExpr = 20 +tglMda = 1000 +linecoverable = 100000 +lineuncovered = 50000 +tglcoverable = 30000 +tgluncovered = 30000 +pendingMax = 1000 +show_full_more = FALSE +[CoverageHier] +showgrid = FALSE +[CoverageWeight] +Assert = 1 +Covergroup = 1 +Line = 1 +Condition = 1 +Toggle = 1 +FSM = 1 +Branch = 1 +[DesignTree] +IfShowModule = {TRUE, FALSE} +[DisabledMessages] +version = Verdi_O-2018.09-SP2 +[Editor] +editorName = TurboEditor +[Emacs] +EmacsFont = "Clean 14" +EmacsBG = white +EmacsFG = black +[Exclusion] +enableAsDefault = TRUE +saveAsDefault = TRUE +saveManually = TRUE +illegalBehavior = FALSE +DisplayExcludedItem = FALSE +adaptiveExclusion = TRUE +warningExcludeInstance = TRUE +favorite_exclude_annotation = "" +[FSM] +viewport = 65 336 387 479 +WndBk-FillColor = Gray3 +Background-FillColor = gray5 +prefKey_Link-FillColor = yellow4 +prefKey_Link-TextColor = black +Trap = red3 +Hilight = blue4 +Window = Gray3 +Selected = white +Trans. = green2 +State = black +Init. = black +SmartTips = TRUE +VectorFont = FALSE +StopAskBkgndColor = FALSE +ShowStateAction = FALSE +ShowTransAction = FALSE +ShowTransCond = FALSE +StateLable = NAME +StateValueRadix = ORIG +State-LineColor = ID_BLACK +State-LineWidth = 1 +State-FillColor = ID_BLUE2 +State-TextColor = ID_WHITE +Init_State-LineColor = ID_BLACK +Init_State-LineWidth = 2 +Init_State-FillColor = ID_YELLOW2 +Init_State-TextColor = ID_BLACK +Reset_State-LineColor = ID_BLACK +Reset_State-LineWidth = 2 +Reset_State-FillColor = ID_YELLOW7 +Reset_State-TextColor = ID_BLACK +Trap_State-LineColor = ID_RED2 +Trap_State-LineWidth = 2 +Trap_State-FillColor = ID_CYAN5 +Trap_State-TextColor = ID_RED2 +State_Action-LineColor = ID_BLACK +State_Action-LineWidth = 1 +State_Action-FillColor = ID_WHITE +State_Action-TextColor = ID_BLACK +Junction-LineColor = ID_BLACK +Junction-LineWidth = 1 +Junction-FillColor = ID_GREEN2 +Junction-TextColor = ID_BLACK +Connection-LineColor = ID_BLACK +Connection-LineWidth = 1 +Connection-FillColor = ID_GRAY5 +Connection-TextColor = ID_BLACK +prefKey_Port-LineColor = ID_BLACK +prefKey_Port-LineWidth = 1 +prefKey_Port-FillColor = ID_ORANGE6 +prefKey_Port-TextColor = ID_YELLOW2 +Transition-LineColor = ID_BLACK +Transition-LineWidth = 1 +Transition-FillColor = ID_WHITE +Transition-TextColor = ID_BLACK +Trans_Condition-LineColor = ID_BLACK +Trans_Condition-LineWidth = 1 +Trans_Condition-FillColor = ID_WHITE +Trans_Condition-TextColor = ID_ORANGE2 +Trans_Action-LineColor = ID_BLACK +Trans_Action-LineWidth = 1 +Trans_Action-FillColor = ID_WHITE +Trans_Action-TextColor = ID_GREEN2 +SelectedSet-LineColor = ID_RED2 +SelectedSet-LineWidth = 1 +SelectedSet-FillColor = ID_RED2 +SelectedSet-TextColor = ID_WHITE +StickSet-LineColor = ID_ORANGE5 +StickSet-LineWidth = 1 +StickSet-FillColor = ID_PURPLE6 +StickSet-TextColor = ID_BLACK +HilightSet-LineColor = ID_RED5 +HilightSet-LineWidth = 1 +HilightSet-FillColor = ID_RED7 +HilightSet-TextColor = ID_BLUE5 +ControlPoint-LineColor = ID_BLACK +ControlPoint-LineWidth = 1 +ControlPoint-FillColor = ID_WHITE +Bundle-LineColor = ID_BLACK +Bundle-LineWidth = 1 +Bundle-FillColor = ID_WHITE +Bundle-TextColor = ID_BLUE4 +QtBackground-FillColor = ID_GRAY6 +prefKey_Link-LineColor = ID_ORANGE2 +prefKey_Link-LineWidth = 1 +Selection-LineColor = ID_BLUE2 +Selection-LineWidth = 1 +[FSM_Dlg-Print] +Orientation = Landscape +[FileBrowser] +nWaveRestoreRCDirHistory = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc\"" +[Form] +version = Verdi_O-2018.09-SP2 +[General] +autoSaveSession = FALSE +TclAutoSource = +cmd_enter_form = FALSE +SyncBrowserDir = TRUE +version = Verdi_O-2018.09-SP2 +SignalCaseInSensitive = FALSE +ShowWndCtntDuringResizing = FALSE +[GlobalProp] +ErrWindow_Font = Helvetica_M_R_12 +[Globals] +app_default_font = Bitstream Vera Sans,10,-1,5,50,0,0,0,0,0 +app_fixed_width_font = Courier,10,-1,5,50,0,0,0,0,0 +text_encoding = Unicode(utf8) +smart_resize = TRUE +smart_resize_child_limit = 2000 +tooltip_max_width = 200 +tooltip_max_height = 20 +tooltip_viewer_key = F3 +tooltip_display_time = 1000 +bookmark_name_length_limit = 12 +disable_tooltip = FALSE +auto_load_source = TRUE +max_array_size = 4096 +filter_when_typing = TRUE +filter_keep_children = TRUE +filter_syntax = Wildcards +filter_keystroke_interval = 800 +filter_case_sensitive = FALSE +filter_full_path = FALSE +load_detail_for_funcov = FALSE +sort_limit = 100000 +ignoreDBVersionChecking = FALSE +[HB] +ViewSchematic = FALSE +windowLayout = 0 0 804 500 182 214 804 148 +import_filter = *.v; *.vc; *.f +designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +import_filter_vhdl = *.vhd; *.vhdl; *.f +import_default_language = Verilog +import_filter_verilog = *.v; *.vc; *.f +simulation_file_type = *.fsdb;*.fsdb.gz;*.fsdb.bz2;*.ff;*.dump +PrefetchViewableAnnot = TRUE +[Hier] +filterTimeout = 1500 +[ImportLiberty] +SearchPriority = .lib++ +bSkipStateCell = False +bImportPowerInfo = False +bSkipFFCell = False +bScpecifyCellNameCase = False +bSpecifyPinNameCase = False +CellNameToCase = +PinNameToCase = +[Language] +EditWindow_Font = COURIER12 +Background = ID_WHITE +Comment = ID_GRAY4 +Keyword = ID_BLUE5 +UserKeyword = ID_GREEN2 +Text = ID_BLACK +SelText = ID_WHITE +SelBackground = ID_BLUE2 +[Library.Ikos] +pack = ./work.lib++ +vital = ./work.lib++ +work = ./work.lib++ +std = ${dls_std}.lib++ +ieee = ${dls_ieee}.lib++ +synopsys = ${dls_synopsys}.lib++ +silc = ${dls_silc}.lib++ +ikos = ${dls_ikos}.lib++ +novas = ${VOYAGER_LIB_VHDL}/${VOYAGER_MACHINE}/novas.lib++ +[MDT] +ART_RF_SP = spr[0-9]*bx[0-9]* +ART_RF_2P = dpr[0-9]*bx[0-9]* +ART_SRAM_SP = spm[0-9]*bx[0-9]* +ART_SRAM_DP = dpm[0-9]*bx[0-9]* +VIR_SRAM_SP = hdsd1_[0-9]*x[0-9]*cm4sw1 +VIR_SRAM_DP = hdsd2_[0-9]*x[0-9]*cm4sw1 +VIR_RF_SP = rfsd1_[0-9]*x[0-9]*cm2sw0 +VIR_RF_DP = rfsd2_[0-9]*x[0-9]*cm2sw1 +VIR_STAR_SRAM_SP = shsd1_[0-9]*x[0-9]*cm4sw0 +[NPExpanding] +functiongroups = FALSE +modules = FALSE +[NPFilter] +showAssertion = TRUE +showCoverGroup = TRUE +showProperty = TRUE +showSequence = TRUE +showDollarUnit = TRUE +[OldFontRC] +Wave_legend_window_font = -f COURIER12 -c ID_CYAN5 +Wave_value_window_font = -f COURIER12 -c ID_CYAN5 +Wave_curve_window_font = -f COURIER12 -c ID_CYAN5 +Wave_group_name_font = -f COURIER12 -c ID_GREEN5 +Wave_ruler_value_font = -f COURIER12 -c ID_CYAN5 +Wave_analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +Wave_comment_string_font = -f COURIER12 -c ID_RED5 +HB_designTreeFont = *-adobe-courier-medium-r-*-*-12-*-*-*-*-*-iso8859-* +Text_font = COURIER12 +nMemory_font = Fixed 14 +Wave_getsignal_form_font = -f COURIER12 +Text_annotFont = Helvetica_M_R_10 +[OtherEditor] +cmd1 = "xterm -font 9x15 -fg black -bg gray -e" +name = "vi" +options = "+${CurLine} ${CurFullFileName}" +[Power] +PowerDownInstance = ID_GRAY1 +RetentionSignal = ID_YELLOW2 +IsolationSignal = ID_RED6 +LevelShiftedSignal = ID_GREEN6 +PowerSwitchObject = ID_ORANGE5 +AlwaysOnObject = ID_GREEN5 +PowerNet = ID_RED2 +GroundNet = ID_RED2 +SimulationOnly = ID_CYAN3 +SRSN/SPA = ID_CYAN3 +CNSSignal = ID_CYAN3 +RPTRSignal = ID_CYAN3 +AcknowledgeSignal = ID_CYAN3 +BoundaryPort = ID_CYAN3 +DisplayInstrumentedCell = TRUE +ShowCmdByFile = FALSE +ShowPstAnnot = FALSE +ShowIsoSymbol = TRUE +ExtractIsoSameNets = FALSE +AnnotateSignal = TRUE +HighlightPowerObject = TRUE +HighlightPowerDomain = TRUE +TraceThroughInstruLowPower = FALSE +BrightenPowerColorInSchematicWindow = FALSE +ShowAlias = FALSE +ShowVoltage = TRUE +MatchTreeNodesCaseInsensitive = FALSE +SearchHBNodeDynamically = FALSE +ContinueTracingSupplyOrLogicNet = FALSE +[Print] +PrinterName = lp +FileName = test.ps +PaperSize = A4 - 210x297 (mm) +ColorPrint = FALSE +[PropertyTools] +saveWaveformStat = TRUE +savePropStat = FALSE +savePropDtl = TRUE +[QtDialog] +openFileDlg = 649,304,602,483 +saveSigDlg = 674,352,551,386 +restoreSigDlg = 657,411,551,438 +QwUserAskDlg = 780,571,324,134 +[Relationship] +hideRecursiceNode = FALSE +[Session Cache] +3 = string (session file name) +4 = string (session file name) +5 = string (session file name) +1 = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses +2 = /home/shbyang/verdiLog/novas_autosave.ses +[Simulation] +scsPath = scsim +scsOption = +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +osciPath = gdb +osciOption = +vcsPath = simv +vcsOption = +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +speedsimPath = +speedsimOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +interactiveDebugging = {True, False} +KeepBreakPoints = False +ScsDebugAll = False +simType = {vcssv, xl, nc, vcs, mti, mti_vlog, vhnc, scs, mixnc} +thirdpartyIdx = -1 +iscCmdSep = FALSE +NoAppendOption = False +[SimulationPlus] +xlPath = verilog +xlOption = +ncPath = ncsim +ncOption = -f ncsim.args +vcsPath = simv +vcsOption = +mti_vlogPath = vsim +mti_vlogOption = novas_vlog +mtiPath = vsim +mtiOption = +vhncPath = ncsim +vhncOption = -log debussy.nc.log +speedsimPath = verilog +speedsimOption = +mixncPath = ncsim +mixncOption = -log debussy.mixnc.log +scsPath = scsim +scsOption = +vcs_mixPath = simv +vcs_mixOption = -vhdlrun "-vhpi debussy:FSDBDumpCmd" +scs_mixPath = scsim +scs_mixOption = -vhpi debussy:FSDBDumpCmd +vcs_svPath = simv +vcs_svOption = +simType = vcssv +thirdpartyIdx = -1 +interactiveDebugging = FALSE +KeepBreakPoints = FALSE +iscCmdSep = FALSE +ScsDebugAll = FALSE +NoAppendOption = FALSE +invokeSimPath = work +[SimulationPlus2] +eventDumpUnfinish = FALSE +[Source] +wordWrapOn = TRUE +viewReuse = TRUE +lineNumberOn = TRUE +warnOutdatedDlg = TRUE +showEncrypt = FALSE +loadInclude = FALSE +showColorForActive = FALSE +tabWidth = 8 +editor = vi +reload = Never +sync_active_to_source = TRUE +navigateAsColored = FALSE +navigateCovered = FALSE +navigateUncovered = TRUE +navigateExcluded = FALSE +not_ask_for_source_path = FALSE +expandMacroOn = TRUE +expandMacroInstancesThreshold = 10000 +[SourceVHDL] +vhSimType = ModelSim +ohSimType = VCS +[TclShell] +nLineSize = 1024 +[Test] +verbose_progress = FALSE +[TestBenchBrowser] +-showUVMDynamicHierTreeWin = FALSE +[Text] +hdlTypeName = blue4 +hdlLibrary = blue4 +viewport = 396 392 445 487 +hdlOther = ID_BLACK +hdlComment = ID_GRAY1 +hdlKeyword = ID_BLUE5 +hdlEntity = ID_BLACK +hdlEntityInst = ID_BLACK +hdlSignal = ID_RED2 +hdlInSignal = ID_RED2 +hdlOutSignal = ID_RED2 +hdlInOutSignal = ID_RED2 +hdlOperator = ID_BLACK +hdlMinus = ID_BLACK +hdlSymbol = ID_BLACK +hdlString = ID_BLACK +hdlNumberBase = ID_BLACK +hdlNumber = ID_BLACK +hdlLiteral = ID_BLACK +hdlIdentifier = ID_BLACK +hdlSystemTask = ID_BLACK +hdlParameter = ID_BLACK +hdlIncFile = ID_BLACK +hdlDataFile = ID_BLACK +hdlCDSkipIf = ID_GRAY1 +hdlMacro = ID_BLACK +hdlMacroValue = ID_BLACK +hdlPlainText = ID_BLACK +hdlOvaId = ID_PURPLE2 +hdlPslId = ID_PURPLE2 +HvlEId = ID_BLACK +HvlVERAId = ID_BLACK +hdlEscSignal = ID_BLACK +hdlEscInSignal = ID_BLACK +hdlEscOutSignal = ID_BLACK +hdlEscInOutSignal = ID_BLACK +textBackgroundColor = ID_GRAY6 +textHiliteBK = ID_BLUE5 +textHiliteText = ID_WHITE +textTracedMark = ID_GREEN2 +textLineNo = ID_BLACK +textFoldedLineNo = ID_RED5 +textUserKeyword = ID_GREEN2 +textParaAnnotText = ID_BLACK +textFuncAnnotText = ID_BLUE2 +textAnnotText = ID_BLACK +textUserDefAnnotText = ID_BLACK +ComputedSignal = ID_PURPLE5 +textAnnotTextShadow = ID_WHITE +parenthesisBGColor = ID_YELLOW5 +codeInParenthesis = ID_CYAN5 +text3DLight = ID_WHITE +text3DShadow = ID_BLACK +textHvlDriver = ID_GREEN3 +textHvlLoad = ID_YELLOW3 +textHvlDriverLoad = ID_BLUE3 +irOutline = ID_RED2 +irDriver = ID_YELLOW5 +irLoad = ID_BLACK +irBookMark = ID_YELLOW2 +irIndicator = ID_WHITE +irBreakpoint = ID_GREEN5 +irCurLine = ID_BLUE5 +hdlVhEntity = ID_BLACK +hdlArchitecture = ID_BLACK +hdlPackage = ID_BLUE5 +hdlRefPackage = ID_BLUE5 +hdlAlias = ID_BLACK +hdlGeneric = ID_BLUE5 +specialAnnotShadow = ID_BLUE1 +hdlZeroInHead = ID_GREEN2 +hdlZeroInComment = ID_GREEN2 +hdlPslHead = ID_BLACK +hdlPslComment = ID_BLACK +hdlSynopsysHead = ID_GREEN2 +hdlSynopsysComment = ID_GREEN2 +pdmlIdentifier = ID_BLACK +pdmlCommand = ID_BLACK +pdmlMacro = ID_BLACK +font = COURIER12 +annotFont = Helvetica_M_R_10 +[Text.1] +viewport = 424 240 1017 706 45 +[TextPrinter] +Orientation = Landscape +Indicator = FALSE +LineNum = TRUE +FontSize = 7 +Column = 2 +Annotation = TRUE +[Texteditor] +TexteditorFont = "Clean 14" +TexteditorBG = white +TexteditorFG = black +[ThirdParty] +ThirdPartySimTool = verisity surefire ikos finsim +[TurboEditor] +autoBackup = TRUE +[UserButton.mixnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +Button8 = "FSDB Ver" "call fsdbVersion" +Button9 = "Dump On" "call fsdbDumpon" +Button10 = "Dump Off" "call fsdbDumpoff" +Button11 = "All Tasks" "call" +Button12 = "Dump Selected Instance" "call fsdbDumpvars 1 ${SelInst}" +[UserButton.mti] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.mti_vlog] +Button1 = "Dump All Signals" "fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000\n" +Button3 = "Next ? Time" "run ${Arg:Next Time}\n" +Button4 = "Show Variables" "exa ${SelVars}\n" +Button5 = "Force Variable" "force -freeze ${SelVar} ${Arg:New Value} 0\n" +Button6 = "Release Variable" "noforce ${SelVar}\n" +Button7 = "Deposit Variable" "force -deposit ${SelVar} ${Arg:New Value} 0\n" +[UserButton.nc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.scs] +Button1 = "Dump All Signals" "call fsdbDumpvars(0, \"${TopScope}\");\n" +Button2 = "Next 1000 Time" "run 1000 \n" +Button3 = "Next ? Time" "run ${Arg:Next Time} \n" +Button4 = "Run Step" "step\n" +Button5 = "Show Variables" "ls -v {${SelVars}}\n" +[UserButton.vhnc] +Button1 = "Dump All Signals" "call fsdbDumpvars\n" +Button2 = "Next 1000 Time" "run 1000 -relative\n" +Button3 = "Next ? Time" "run ${Arg:Next Time} -relative\n" +Button4 = "Run Next" "run -next\n" +Button5 = "Run Step" "run -step\n" +Button6 = "Run Return" "run -return\n" +Button7 = "Show Variables" "value {${NCSelVars}}\n" +[UserButton.xl] +Button13 = "Dump Off" "$fsdbDumpoff;\n" +Button12 = "Dump On" "$fsdbDumpon;\n" +Button11 = "Delete Focus" "$db_deletefocus(${treeSelScope});\n" +Button10 = "Set Focus" "$db_setfocus(${treeSelScope});\n" +Button9 = "Deposit Variable" "$deposit(${SelVar},${Arg:New Value});\n" +Button8 = "Release Variable" "release ${SelVar};\n" +Button7 = "Force Variable" "force ${SelVar} = ${Arg:New Value};\n" +Button6 = "Show Variables" "$showvars(${SelVars});\n" +Button5 = "Next ? Event" "$db_step(${Arg:Next Event});\n" +Button4 = "Next Event" "$db_step(1);\n" +Button3 = "Next ? Time" "#${Arg:Next Time} $stop;.\n" +Button2 = "Next 1000 Time" "#1000 $stop;.\n" +Button1 = "Dump All Signals" "$fsdbDumpvars;\n" +[VIA] +viaLogViewerDefaultRuleOneSearchForm = "share/VIA/Apps/PredefinedRules/Misc/Onesearch_rule.rc" +[VIA.oneSearch.preference] +DefaultDisplayTimeUnit = "1.000000ns" +DefaultLogTimeUnit = "1.000000ns" +[VIA.oneSearch.preference.vgifColumnSettingRC] +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0] +parRuleSets = "" +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column0] +name = Time +width = 60 +visualIndex = 0 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column1] +name = Message +width = 2000 +visualIndex = 4 +isHidden = FALSE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column2] +name = Code +width = 60 +visualIndex = 2 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column3] +name = Type +width = 60 +visualIndex = 3 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[VIA.oneSearch.preference.vgifColumnSettingRC.setting0.column4] +name = Severity +width = 60 +visualIndex = 1 +isHidden = TRUE +isUserChangeColumnVisible = FALSE +[Vi] +ViFont = "Clean 14" +ViBG = white +ViFG = black +[Wave] +ovaEventSuccessColor = -c ID_CYAN5 +ovaEventFailureColor = -c ID_RED5 +ovaBooleanSuccessColor = -c ID_CYAN5 +ovaBooleanFailureColor = -c ID_RED5 +ovaAssertSuccessColor = -c ID_GREEN5 +ovaAssertFailureColor = -c ID_RED5 +ovaForbidSuccessColor = -c ID_GREEN5 +SigGroupRuleFile = +DisplayFileName = FALSE +waveform_vertical_scroll_bar = TRUE +scope_to_save_with_macro +open_file_dir +open_rc_file_dir +getSignalForm = 0 0 800 479 100 30 100 30 +viewPort = 0 27 1017 282 229 65 +signalSpacing = 5 +digitalSignalHeight = 15 +analogSignalHeight = 98 +commentSignalHeight = 98 +transactionSignalHeight = 98 +messageSignalHeight = 98 +minCompErrWidth = 4 +DragZoomTolerance = 4 +maxTransExpandedLayer = 10 +WaveMaxPoint = 512 +legendBackground = -c ID_BLACK +valueBackground = -c ID_BLACK +curveBackground = -c ID_BLACK +getSignalSignalList_BackgroundColor = -c ID_GRAY6 +glitchColor = -c ID_RED5 +cursor = -c ID_YELLOW5 -lw 1 -ls long_dashed +marker = -c ID_WHITE -lw 1 -ls dash_dot_l +usermarker = -c ID_GREEN5 -lw 1 -ls long_dashed +trace = -c ID_GRAY5 -lw 1 -ls long_dashed +grid = -c ID_WHITE -lw 1 -ls short_dashed +rulerBackground = -c ID_GRAY3 +rulerForeground = -c ID_YELLOW5 +busTextColor = -c ID_ORANGE8 +legendForeground = -c ID_CYAN5 +valueForeground = -c ID_CYAN5 +curveForeground = -c ID_CYAN5 +groupNameColor = -c ID_GREEN5 +commentStringColor = -c ID_RED5 +region(Active)Background = -c ID_YELLOW1 +region(NBA)Background = -c ID_RED1 +region(Re-Active)Background = -c ID_YELLOW3 +region(Re-NBA)Background = -c ID_RED3 +region(VHDL-Delta)Background = -c ID_ORANGE3 +region(Dump-Off)Background = -c ID_GRAY4 +High_Light = -c ID_GRAY2 +Input_Signal = -c ID_RED5 +Output_Signal = -c ID_GREEN5 +InOut_Signal = -c ID_BLUE5 +Net_Signal = -c ID_YELLOW5 +Register_Signal = -c ID_PURPLE5 +Verilog_Signal = -c ID_CYAN5 +VHDL_Signal = -c ID_ORANGE5 +SystemC_Signal = -c ID_BLUE7 +Dump_Off_Color = -c ID_BLUE2 +Compress_Bar_Color = -c ID_YELLOW4 +Vector_Dense_Block_Color = -c ID_ORANGE8 +Scalar_Dense_Block_Color = -c ID_GREEN6 +Analog_Dense_Block_Color = -c ID_PURPLE2 +Composite_Dense_Block_Color = -c ID_ORANGE5 +RPTR_Power_Off_Layer = -c ID_CYAN3 -stipple dots +DB_Power_Off_Layer = -c ID_BLUE4 -stipple dots +SPA_Driver_Power_Off_Layer = -c ID_ORANGE4 -stipple dots +SPA_Receiver_Power_Off_Layer = -c ID_GREEN5 -stipple dots +SRSN_Power_Off_Layer = -c ID_GREEN4 -stipple dots +Isolation_Power_Off_Layer = -c ID_RED4 -stipple dots +PD_Power_Off_Layer = -c ID_GRAY4 -stipple dots +Isolation_Layer = -c ID_RED4 -stipple vLine +Retention_Level_Trigger_Layer = -c ID_ORANGE1 -stipple fill_solid +Retention_Edge_Trigger_Layer = -c ID_YELLOW6 -stipple fill_solid +Driving_Power_Off_Layer = -c ID_YELLOW2 -stipple x +Toggle_Layer = -c ID_YELLOW4 -stipple slash +analogRealStyle = pwl +analogVoltageStyle = pwl +analogCurrentStyle = pwl +analogOthersStyle = pwl +busSignalLayer = -c ID_ORANGE8 +busXLayer = -c ID_RED5 +busZLayer = -c ID_ORANGE6 +busMixedLayer = -c ID_GREEN5 +busNotComputedLayer = -c ID_GRAY1 +busNoValueLayer = -c ID_BLUE2 +signalGridLayer = -c ID_WHITE +analogGridLayer = -c ID_GRAY6 +analogRulerLayer = -c ID_GRAY6 +keywordLayer = -c ID_RED5 +loadedLayer = -c ID_BLUE5 +loadingLayer = -c ID_BLACK +qdsCurMarkerLayer = -c ID_BLUE5 +qdsBrkMarkerLayer = -c ID_GREEN5 +qdsTrgMarkerLayer = -c ID_RED5 +arrowDefaultColor = -c ID_ORANGE6 +startNodeArrowColor = -c ID_WHITE +endNodeArrowColor = -c ID_YELLOW5 +propertyEventMatchColor = -c ID_GREEN5 +propertyEventNoMatchColor = -c ID_RED5 +propertyVacuousSuccessMatchColor = -c ID_YELLOW2 +propertyStatusBoundaryColor = -c ID_WHITE +propertyBooleanSuccessColor = -c ID_CYAN5 +propertyBooleanFailureColor = -c ID_RED5 +propertyAssertSuccessColor = -c ID_GREEN5 +propertyAssertFailureColor = -c ID_RED5 +propertyForbidSuccessColor = -c ID_GREEN5 +transactionForegroundColor = -c ID_YELLOW8 +transactionBackgroundColor = -c ID_BLACK +transactionHighLightColor = -c ID_CYAN6 +transactionRelationshipColor = -c ID_PURPLE6 +transactionErrorTypeColor = -c ID_RED5 +coverageFullyCoveredColor = -c ID_GREEN5 +coverageNoCoverageColor = -c ID_RED5 +coveragePartialCoverageColor = -c ID_YELLOW5 +coverageReferenceLineColor = -c ID_GRAY4 +messageForegroundColor = -c ID_YELLOW4 +messageBackgroundColor = -c ID_PURPLE1 +messageHighLightColor = -c ID_CYAN6 +messageInformationColor = -c ID_RED5 +ComputedAnnotColor = -c ID_PURPLE5 +fsvSecurityDataColor = -c ID_PURPLE3 +qdsAutoBusGroup = TRUE +qdsTimeStampMode = FALSE +qdsVbfBusOrderAscending = FALSE +openDumpFilter = *.fsdb;*.vf;*.jf +DumpFileFilter = *.vcd +RestoreSignalFilter = *.rc +SaveSignalFilter = *.rc +AddAliasFilter = *.alias;*.adb +CompareSignalFilter = *.err +ConvertFFFilter = *.vcd;*.out;*.tr0;*.xp;*.raw;*.wfm +Scroll_Ratio = 100 +Zoom_Ratio = 10 +EventSequence_SyncCursorTime = TRUE +EventSequence_Sorting = FALSE +EventSequence_RemoveGrid = FALSE +EventSequence_IsGridMode = FALSE +SetDefaultRadix_global = FALSE +DefaultRadix = Hex +SigSearchSignalMatchCase = FALSE +SigSearchSignalScopeOption = FALSE +SigSearchSignalSamenetInterface = FALSE +SigSearchSignalFullScope = FALSE +SigSearchSignalWithRegExp = FALSE +SigSearchDynamically = FALSE +SigDisplayBySelectionOrder = FALSE +SigDisplayRowMajor = FALSE +SigDragSelFollowColumn = FALSE +SigDisplayHierarchyBox = TRUE +SigDisplaySubscopeBox = TRUE +SigDisplayEmptyScope = TRUE +SigDisplaySignalNavigationBox = FALSE +SigDisplayFormBus = TRUE +SigShowSubProgram = TRUE +SigSearchScopeDynamically = TRUE +SigCollapseSubtreeNodes = FALSE +activeFileApplyToAnnotation = FALSE +GrpSelMode = TRUE +dispGridCount = FALSE +hierarchyName = FALSE +partial_level_name = FALSE +partial_level_head = 1 +partial_level_tail = 1 +displayMessageLabelOnly = TRUE +autoInsertDumpoffs = TRUE +displayMessageCallStack = FALSE +displayCallStackWithFullSections = TRUE +displayCallStackWithLastSection = FALSE +limitMessageMaxWidth = FALSE +messageMaxWidth = 50 +displayTransBySpecificColor = FALSE +fittedTransHeight = FALSE +snap = TRUE +gravitySnap = FALSE +displayLeadingZero = FALSE +displayGlitchs = FALSE +allfileTimeRange = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +restoreFromActiveFile = TRUE +restoreToEnd = FALSE +dispCompErr = TRUE +showMsgDes = TRUE +anaAutoFit = FALSE +anaAutoPattn = FALSE +anaAuto100VertFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE +denseBlockDrawing = TRUE +relativeFreqPrecision = 3 +showMarkerAbsolute = FALSE +showMarkerAdjacent = FALSE +showMarkerRelative = FALSE +showMarkerFrequency = FALSE +stickCursorMarkerOnWaveform = TRUE +keepMarkerAtEndTimeOfTransaction = FALSE +doubleClickToExpandTransaction = TRUE +expandTransactionAssociatedSignals = TRUE +expandTransactionAttributeSignals = FALSE +WaveExtendLastTick = TRUE +InOutSignal = FALSE +NetRegisterSignal = FALSE +VerilogVHDLSignal = FALSE +LabelMarker = TRUE +ResolveSymbolicLink = TRUE +signal_rc_abspath = TRUE +signal_rc_no_natural_bus_range = FALSE +save_scope_with_macro = FALSE +TipInSignalWin = FALSE +DisplayPackedSiganlInBitwiseManner = FALSE +DisplaySignalTypeAheadOfSignalName = TRUE ICON +TipInCurveWin = FALSE +MouseGesturesInCurveWin = TRUE +DisplayLSBsFirst = FALSE +PaintSpecificColorPattern = TRUE +ModuleName = TRUE +form_all_memory_signal = FALSE +formBusSignalFromPartSelects = FALSE +read_value_change_on_demand_for_drawing = FALSE +load_scopes_on_demand = on 5 +TransitionMode = TRUE +DisplayRadix = FALSE +SchemaX = FALSE +Hilight = TRUE +UseBeforeValue = FALSE +DisplayFileNameAheadOfSignalName = FALSE +DisplayFileNumberAheadOfSignalName = FALSE +DisplayValueSpace = TRUE +FitAnaByBusSize = FALSE +displayTransactionAttributeName = FALSE +expandOverlappedTrans = FALSE +dispSamplePointForAttrSig = TRUE +dispClassName = TRUE +ReloadActiveFileOnly = FALSE +NormalizeEVCD = FALSE +OverwriteAliasWithRC = TRUE +overlay_added_analog_signals = FALSE +case_insensitive = FALSE +vhdlVariableCalculate = TRUE +showError = TRUE +signal_vertical_scroll_bar = TRUE +showPortNameForDroppedInstance = FALSE +truncateFilePathInTitleBar = TRUE +filterPropVacuousSuccess = FALSE +includeLocalSignals = FALSE +encloseSignalsByGroup = TRUE +resaveSignals = TRUE +adjustBusPrefix = adjustBus_ +adjustBusBits = 1 +adjustBusSettings = 69889 +maskPowerOff = TRUE +maskIsolation = TRUE +maskRetention = TRUE +maskDrivingPowerOff = TRUE +maskToggle = TRUE +autoBackupSignals = off 5 "\"/home/shbyang/verdiLog\"" "\"novas_autosave_sig\"" +signal_rc_attribute = 65535 +signal_rc_alias_attribute = 0 +ConvertAttr1 = -inc FALSE +ConvertAttr2 = -hier FALSE +ConvertAttr3 = -ucase FALSE +ConvertAttr4 = -lcase FALSE +ConvertAttr5 = -org FALSE +ConvertAttr6 = -mem 24 +ConvertAttr7 = -deli . +ConvertAttr8 = -hier_scope FALSE +ConvertAttr9 = -inst_array FALSE +ConvertAttr10 = -vhdlnaming FALSE +ConvertAttr11 = -orgScope FALSE +analogFmtPrecision = Automatic 2 +confirmOverwrite = TRUE +confirmExit = TRUE +confirmGetAll = TRUE +printTimeRange = TRUE 0.000000 0.000000 0.000000 +printPageRange = TRUE 1 1 +printOption = 0 +printBasic = 1 0 0 FALSE FALSE +printDest = -printer {} +printSignature = {%f %h %t} {} +curveWindow_Drag&Drop_Mode = TRUE +hspiceIncOpenMode = TRUE +pcSelectMode = TRUE +hierarchyDelimiter = / +RecentFile1 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc\"" +RecentFile2 = "\"/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb\"" +open_file_time_range = FALSE +value_window_aligment = Right +signal_window_alignment = Auto +ShowDeltaTime = TRUE +legend_window_font = -f COURIER12 -c ID_CYAN5 +value_window_font = -f COURIER12 -c ID_CYAN5 +curve_window_font = -f COURIER12 -c ID_CYAN5 +group_name_font = -f COURIER12 -c ID_GREEN5 +ruler_value_font = -f COURIER12 -c ID_CYAN5 +analog_ruler_value_font = -f COURIER12 -c ID_CYAN5 +comment_string_font = -f COURIER12 -c ID_RED5 +getsignal_form_font = -f COURIER12 +SigsCheckNum = on 1000 +filter_synthesized_net = off n +filterOutNet = on +filter_synthesized_instance = off +filterOutInstance = on +showGroupTree = TRUE +hierGroupDelim = / +MsgSeverityColor = {y \"Severity\"==\"1\" ID_RED5} {y \"Severity\"==\"2\" ID_RED6} {y \"Severity\"==\"3\" ID_RED7} {y \"Severity\"==\"4\" ID_RED8} {y \"Severity\"==\"5\" ID_ORANGE5} {y \"Severity\"==\"6\" ID_ORANGE6} {y \"Severity\"==\"7\" ID_ORANGE7} {y \"Severity\"==\"8\" \ +ID_GREEN7} {y \"Severity\"==\"9\" ID_GREEN6} {y \"Severity\"==\"10\" ID_GREEN5} +AutoApplySeverityColor = TRUE +AutoAdjustMsgWidthByLabel = off +verilogStrengthDispType = type1 +waveDblClkActiveTrace = on +autoConnectTBrowser = FALSE +connectTBrowserInContainer = TRUE +SEQShowComparisonIcon = TRUE +SEQAddDriverLoadInSameGroup = TRUE +autoSyncCursorMarker = FALSE +autoSyncHorizontalRange = FALSE +autoSyncVerticalScroll = FALSE +[cov_hier_name_column] +justify = TRUE +[coverageColors] +sou_uncov = TRUE +sou_pc = TRUE +sou_cov = TRUE +sou_exuncov = TRUE +sou_excov = TRUE +sou_unreach = TRUE +sou_unreachcon = TRUE +sou_fillColor_uncov = red +sou_fillColor_pc = yellow +sou_fillColor_cov = green3 +sou_fillColor_exuncov = grey +sou_fillColor_excov = #3C9371 +sou_fillColor_unreach = grey +sou_fillColor_unreachcon = orange +numberOfBins = 6 +rangeMin_0 = 0 +rangeMax_0 = 20 +fillColor_0 = #FF6464 +rangeMin_1 = 20 +rangeMax_1 = 40 +fillColor_1 = #FF9999 +rangeMin_2 = 40 +rangeMax_2 = 60 +fillColor_2 = #FF8040 +rangeMin_3 = 60 +rangeMax_3 = 80 +fillColor_3 = #FFFF99 +rangeMin_4 = 80 +rangeMax_4 = 100 +fillColor_4 = #99FF99 +rangeMin_5 = 100 +rangeMax_5 = 100 +fillColor_5 = #64FF64 +[coveragesetting] +assertTopoMode = FALSE +urgAppendOptions = +group_instance_new_format_name = TRUE +showvalue = FALSE +computeGroupsScoreByRatio = FALSE +computeGroupsScoreByInst = FALSE +showConditionId = FALSE +showfullhier = FALSE +nameLeftAlignment = TRUE +showAllInfoInTooltips = FALSE +copyItemHvpName = TRUE +ignoreGroupWeight = FALSE +absTestName = FALSE +HvpMergeTool = +ShowMergeMenuItem = FALSE +fsmScoreMode = transition +[eco] +NameRule = +IsFreezeSilicon = FALSE +cellQuantityManagement = FALSE +ManageMode = INSTANCE_NAME +SpareCellsPinsManagement = TRUE +LogCommitReport = FALSE +InputPinStatus = 1 +OutputPinStatus = 2 +RevisedComponentColor = ID_BLUE5 +SpareCellColor = ID_RED5 +UserName = shbyang +CommentFormat = Novas ECO updated by ${UserName} ${Date} ${Time} +PrefixN = eco_n +PrefixP = eco_p +PrefixI = eco_i +DefaultTieUpNet = 1'b1 +DefaultTieDownNet = 1'b0 +MultipleInstantiations = TRUE +KeepClockPinConnection = FALSE +KeepAsyncResetPinConnection = FALSE +ScriptFileModeType = 1 +MagmaScriptPower = VDD +MagmaScriptGround = GND +ShowModeMsg = TRUE +AstroScriptPower = VDD +AstroScriptGround = VSS +ClearFloatingPorts = FALSE +[eco_connection] +Port/NetIsUnique = TRUE +SerialNet = 0 +SerialPort = 0 +SerialInst = 0 +[finsim] +TPLanguage = Verilog +TPName = Super-FinSim +TPPath = TOP.sim +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[hvpsetting] +importExcelXMLOptions = +use_test_loca_as_source = FALSE +autoTurnOffHideMeetGoalInit = FALSE +autoTurnOffHideMeetGoal = TRUE +autoTurnOffModifierInit = FALSE +autoTurnOffModifier = TRUE +enableNumbering = TRUE +autoSaveCheck = TRUE +autoSaveTime = 5 +ShowMissingScore = TRUE +enableFeatureId = FALSE +enable_HVP_FEAT_ID = FALSE +enableMeasureConcealment = FALSE +HvpCloneHierShowMsgAgain = 1 +HvpCloneHierType = tree +HvpCloneHierMetrics = Line,Cond,FSM,Toggle,Branch,Assert +autoRecalPlanAfterLoadingCovDBUserDataPlan = false +warnMeAutoRecalPlanAfterLoadingCovDBUserDataPlan = true +autoRecalExclWithPlan = false +warnMeAutoRecalExclWithPlan = true +autoRecalPlanWithExcl = false +warnMeAutoRecalPlanWithExcl = true +warnPopupWarnWhenMultiFilters = true +warnPopupWarnIfHvpReadOnly = true +unmappedObjsReportLevel = def_var_inst +unmappedObjsReportInst = true +unmappedObjsNumOfObjs = High +[ikos] +TPLanguage = VHDL +TPName = Voyager +TPPath = vsh +TPOption = -X +AddImportArgument = FALSE +LineBreakWithScope = FALSE +StopAfterCompileOption = -i +[imp] +options = NULL +libPath = NULL +libDir = NULL +[nCompare] +ErrorViewport = 80 180 800 550 +EditorViewport = 409 287 676 475 +EditorHeightWidth = 802 380 +WaveCommand = "novas" +WaveArgs = "-nWave" +[nCompare.Wnd0] +ViewByHier = FALSE +[nMemory] +dispMode = ADDR_HINT +addrColWidth = 120 +valueColWidth = 100 +showCellBitRangeWithAddr = TRUE +wordsShownInOneRow = 8 +syncCursorTime = FALSE +fixCellColumnWidth = FALSE +font = Courier 12 +[planColors] +plan_fillColor_inactive = lightGray +plan_fillColor_warning = orange +plan_fillColor_error = red +plan_fillColor_invalid = #F0DCDB +plan_fillColor_subplan = lightGray +[schematics] +viewport = 178 262 638 516 +schBackgroundColor = black lineSolid +schBackgroundColor_qt = #000000 qt_solidLine 1 +schBodyColor = orange6 lineSolid +schBodyColor_qt = #ffb973 qt_solidLine 1 +schAsmBodyColor = blue7 lineSolid +schAsmBodyColor_qt = #a5a5ff qt_solidLine 1 +schPortColor = orange6 lineSolid +schPortColor_qt = #ffb973 qt_solidLine 1 +schCellNameColor = Gray6 lineSolid +schCellNameColor_qt = #e0e0e0 qt_solidLine 1 +schCLKNetColor = red6 lineSolid +schCLKNetColor_qt = #ff7373 qt_solidLine 1 +schPWRNetColor = red4 lineSolid +schPWRNetColor_qt = #ff0101 qt_solidLine 1 +schGNDNetColor = cyan4 lineSolid +schGNDNetColor_qt = #01ffff qt_solidLine 1 +schSIGNetColor = green8 lineSolid +schSIGNetColor_qt = #cdffcd qt_solidLine 1 +schTraceColor = yellow4 lineSolid +schTraceColor_qt = #ffff01 qt_solidLine 2 +schBackAnnotateColor = white lineSolid +schBackAnnotateColor_qt = #ffffff qt_solidLine 1 +schValue0 = yellow4 lineSolid +schValue0_qt = #ffff01 qt_solidLine 1 +schValue1 = green3 lineSolid +schValue1_qt = #008000 qt_solidLine 1 +schValueX = red4 lineSolid +schValueX_qt = #ff0101 qt_solidLine 1 +schValueZ = purple7 lineSolid +schValueZ_qt = #ffcdff qt_solidLine 1 +dimColor = cyan2 lineSolid +dimColor_qt = #008080 qt_solidLine 1 +schPreSelColor = green4 lineDash +schPreSelColor_qt = #01ff01 qt_dashLine 2 +schSIGBusNetColor = green8 lineSolid +schSIGBusNetColor_qt = #cdffcd qt_solidLine +schGNDBusNetColor = cyan4 lineSolid +schGNDBusNetColor_qt = #01ffff qt_solidLine +schPWRBusNetColor = red4 lineSolid +schPWRBusNetColor_qt = #ff0101 qt_solidLine +schCLKBusNetColor = red6 lineSolid +schCLKBusNetColor_qt = #ff7373 qt_solidLine +schEdgeSensitiveColor = orange6 lineSolid +schEdgeSensitiveColor_qt = #ffb973 qt_solidLine +schAnnotColor = cyan4 lineSolid +schAnnotColor_qt = #01ffff qt_solidLine +schInstNameColor = orange6 lineSolid +schInstNameColor_qt = #ffb973 qt_solidLine +schPortNameColor = cyan4 lineSolid +schPortNameColor_qt = #01ffff qt_solidLine +schAsmLatchColor = cyan4 lineSolid +schAsmLatchColor_qt = #01ffff qt_solidLine +schAsmRegColor = cyan4 lineSolid +schAsmRegColor_qt = #01ffff qt_solidLine +schAsmTriColor = cyan4 lineSolid +schAsmTriColor_qt = #01ffff qt_solidLine +pre_select = True +ShowPassThroughNet = False +ComputedAnnotColor = ID_PURPLE5 +[schematics_print] +Signature = FALSE +DesignName = PCU +DesignerName = bai +SignatureLocation = LowerRight +MultiPage = TRUE +AutoSliver = FALSE +[sourceColors] +BackgroundActive = gray88 +BackgroundInactive = lightgray +InactiveCode = dimgray +Selection = darkblue +Standard = black +Keyword = blue +Comment = gray25 +Number = black +String = black +Identifier = darkred +Inline = green +colorIdentifier = green +Value = darkgreen +MacroBackground = white +Missing = #400040 +[specColors] +top_plan_linked = #ADFFA6 +top_plan_ignore = #D3D3D3 +top_plan_todo = #EECBAD +sub_plan_ignore = #919191 +sub_plan_todo = #EFAFAF +sub_plan_linked = darkorange +[spec_link_setting] +use_spline = true +goto_section = false +exclude_ignore = true +truncate_abstract = false +abstract_length = 999 +compare_strategy = 2 +auto_apply_margin = FALSE +margin_top = 0.80 +margin_bottom = 0.80 +margin_left = 0.50 +margin_right = 0.50 +margin_unit = inches +[spiceDebug] +ThroughNet = ID_YELLOW5 +InstrumentSig = ID_GREEN5 +InterfaceElement = ID_GREEN5 +Run-timeInterfaceElement = ID_BLUE5 +HighlightThroughNet = TRUE +HighlightInterfaceElement = TRUE +HighlightRuntimeInterfaceElement = TRUE +HighlightSameNet = TRUE +[surefire] +TPLanguage = Verilog +TPName = SureFire +TPPath = verilog +TPOption = +AddImportArgument = TRUE +LineBreakWithScope = TRUE +StopAfterCompileOption = -tcl +[turboSchema_Printer_Options] +Orientation = Landscape +[turbo_library] +bdb_load_scope = +[vdCovFilteringSearchesStrings] +keepLastUsedFiltersMaxNum = 10 +[verisity] +TPLanguage = Verilog +TPName = "Verisity SpeXsim" +TPPath = vlg +TPOption = +AddImportArgument = FALSE +LineBreakWithScope = TRUE +StopAfterCompileOption = -s +[wave.0] +viewPort = 0 27 1017 282 229 65 +[wave.1] +viewPort = 127 219 960 332 100 65 +[wave.2] +viewPort = 38 314 686 205 100 65 +[wave.3] +viewPort = 63 63 700 400 65 41 +[wave.4] +viewPort = 84 84 700 400 65 41 +[wave.5] +viewPort = 92 105 700 400 65 41 +[wave.6] +viewPort = 0 0 700 400 65 41 +[wave.7] +viewPort = 21 21 700 400 65 41 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses new file mode 100644 index 0000000..23662cc --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses @@ -0,0 +1,82 @@ +@verdi rc file Version 1.0 +[General] +saveDB = TRUE +relativePath = FALSE +saveSingleView = FALSE +saveNWaveWinId = +VerdiVersion = Verdi_O-2018.09-SP2 +[KeyNote] +Line1 = Automatic Backup 0 +Line2 = Save Open Database Information: Yes +Line3 = Path Option: Absolute Paths +Line4 = Windows Option: All Windows +[TestBench] +ConstrViewShow = 0 +InherViewShow = 0 +FSDBMsgShow = 0 +AnnotationShow = 0 +Console = FALSE +powerDumped = 0 +[hb] +postSimFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb +syncTime = 104685000 +viewport = 602 297 1017 794 0 0 281 1015 +activeNode = "TB" +activeScope = "TB" +activeFile = "../../sim/lvds/TB.sv" +interactiveMode = False +viewType = Source +simulatorMode = False +sourceBeginLine = 277 +baMode = False +srcLineNum = True +AutoWrap = True +IdentifyFalseLogic = False +syncSignal = False +traceMode = Hierarchical +showTraceInSchema = True +paMode = False +funcMode = False +powerAwareAnnot = True +amsAnnot = True +traceCrossHier = True +DnDtraceCrossHierOnly = True +traceIncTopPort = False +leadingZero = False +signalPane = False +Scope1 = "TB" +Scope2 = "TB.dut" +sdfCheckUndef = FALSE +simFlow = FALSE +[hb.design] +importCmd = "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" +invokeDir = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds +[hb.sourceTab.1] +scope = TB +File = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/TB.sv +Line = 278 +[nMemoryManager] +WaveformFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb +UserActionNum = 0 +nMemWindowNum = 0 +[wave.0] +viewPort = 0 27 1017 301 229 65 +primaryWindow = TRUE +SessionFile = /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.wave.0 +displayGrid = FALSE +hierarchicalName = FALSE +snap = TRUE +displayLeadingZeros = FALSE +fixDelta = FALSE +displayCursorMarker = FALSE +autoUpdate = FALSE +highlightGlitchs = FALSE +waveformSyncCursorMarker = FALSE +waveformSyncHorizontalRange = FALSE +waveformSyncVerticalscroll = FALSE +displayErrors = TRUE +displayMsgSymbols = TRUE +showMsgDescriptions = TRUE +autoFit = FALSE +displayDeltaY = FALSE +centerCursor = FALSE diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.config b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.config new file mode 100644 index 0000000..d6f964f --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.config @@ -0,0 +1,55 @@ +[qBaseWindowStateGroup] +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\Verdi=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\nWave=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\hdlHier=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\hdlSrc=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\messageWindow=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\svtbHier=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindow_qDockContentType\OneSearch=1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1=7 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_0=widgetDock_hdlHier_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_1=widgetDock_messageWindow_1 +qDockerWindowMgr_C\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\qDockerWindowMgr_saveDockerChildList\Verdi_1_2=widgetDock_hdlSrc_1 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+Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isNestedWindow=0 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\isVisible=true +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\size=@Size(1017 794) +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_x=602 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_y=297 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_width=1017 +Verdi_1\qBaseWindowRestoreStateGroup\qBaseWindow_saveRestoreSession_group\geometry_height=794 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.png b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.png new file mode 100644 index 0000000..a621c94 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.png differ diff --git a/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.wave.0 b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.wave.0 new file mode 100644 index 0000000..e9a550d --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/novas_autosave.ses.wave.0 @@ -0,0 +1,73 @@ +Magic 271485 +Revision Verdi_O-2018.09-SP2 + +; Window Layout +viewPort 0 27 1017 301 229 65 + +; File list: +; openDirFile [-d delimiter] [-s time_offset] [-rf auto_bus_rule_file] path_name file_name +openDirFile -d / "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb" + +; file time scale: +; fileTimeScale ### s|ms|us|ns|ps + +; signal spacing: +signalSpacing 5 + +; windowTimeUnit is used for zoom, cursor & marker +; waveform viewport range +zoom 104198385.824836 105096545.781257 +cursor 104685000.000000 +marker 0.000000 + +; user define markers +; userMarker time_pos marker_name color linestyle +; visible top row signal index +top 7 +; marker line index +markerPos 19 + +; event list +; addEvent event_name event_expression +; curEvent event_name + + + +COMPLEX_EVENT_BEGIN + + +COMPLEX_EVENT_END + + + +; toolbar current search type +; curSTATUS search_type +curSTATUS ByChange + + +addGroup "Basic" +activeDirFile "" "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb" +addSignal -h 15 /TB/clk +addSignal -h 15 -holdScope rst_n +addSignal -expanded -h 15 -UNSIGNED -HEX -holdScope serial_in[3:0] +addSignal -h 15 -holdScope serial_in[3] +addSignal -h 15 -holdScope serial_in[2] +addSignal -h 15 -holdScope serial_in[1] +addSignal -h 15 -holdScope serial_in[0] +addSignal -h 15 -holdScope train_ready +addSignal -h 15 -holdScope link_down +addGroup "SRAM" +addSignal -h 15 -UNSIGNED -HEX /TB/wr_addr[12:0] +addSignal -h 15 -holdScope wr_data[511:0] +addSignal -h 15 -holdScope wr_en +addSignal -h 15 -holdScope byte_mask[63:0] +addGroup "STATUS" +addSignal -h 15 /TB/crc_error +addSignal -h 15 -holdScope train_status[31:0] +addSignal -h 15 -holdScope frame_status[31:0] +addSignal -h 15 -holdScope always_on +addGroup "G4" + +; getSignalForm Scope Hierarchy Status +; active file of getSignalForm + diff --git a/DA4008_V1.2/sim/lvds/verdiLog/pes.bat b/DA4008_V1.2/sim/lvds/verdiLog/pes.bat new file mode 100644 index 0000000..7c6e4ac --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/pes.bat @@ -0,0 +1,3 @@ +where +detach +quit diff --git a/DA4008_V1.2/sim/lvds/verdiLog/turbo.log b/DA4008_V1.2/sim/lvds/verdiLog/turbo.log new file mode 100644 index 0000000..c5a08c1 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/turbo.log @@ -0,0 +1,3 @@ +Command Line: /opt/synopsys/verdi/Verdi_O-2018.09-SP2/platform/LINUXAMD64/bin/Novas -sverilog -f filelist_vlg.f -top TB -ssf verdplus_000.fsdb -nologo +uname(Linux cryo1 3.10.0-1160.92.1.el7.x86_64 #1 SMP Tue Jun 20 11:48:01 UTC 2023 x86_64) +au time 11158.911737 126.304460 117.382513 delta 1954689024 1954689024 total 2379776000 2379776000 diff --git a/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd b/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd new file mode 100644 index 0000000..6761779 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd @@ -0,0 +1,582 @@ +sidCmdLineBehaviorAnalysisOpt -incr -clockSkew 0 -loopUnroll 0 -bboxEmptyModule 0 -cellModel 0 -bboxIgnoreProtected 0 +debImport "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" +debLoadSimResult \ + /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb +wvCreateWindow +wvRestoreSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc" \ + -overWriteAutoAlias on -appendSignals on +wvScrollDown -win $_nWave2 12 +wvSelectSignal -win $_nWave2 {( "write_SRAM" 6 )} +wvScrollUp -win $_nWave2 4 +wvSelectGroup -win $_nWave2 {write_SRAM} +wvCut -win $_nWave2 +wvSetPosition -win $_nWave2 {("G4" 9)} +wvScrollUp -win $_nWave2 3 +wvSelectGroup -win $_nWave2 {G4} +wvCut -win $_nWave2 +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSelectGroup -win $_nWave2 {G3} +wvCut -win $_nWave2 +wvSetPosition -win $_nWave2 {("G1" 0)} +wvSelectGroup -win $_nWave2 {G1} +wvCut -win $_nWave2 +wvSetPosition -win $_nWave2 {("G1" 0)} +wvSelectGroup -win $_nWave2 {G1} +wvRenameGroup -win $_nWave2 {G1} {Basic} +wvSelectGroup -win $_nWave2 {Basic} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "clk" -line 64 -pos 2 -win $_nTrace1 +wvAddSignal -win $_nWave2 "/TB/clk" +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "rst_n" -line 65 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("G2" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvAddSignal -win $_nWave2 "/TB/rst_n" +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "serial_in" -line 66 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvAddSignal -win $_nWave2 "/TB/serial_in\[3:0\]" +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSelectSignal -win $_nWave2 {( "Basic" 3 )} +wvExpandBus -win $_nWave2 {("Basic" 3)} +wvSelectSignal -win $_nWave2 {( "Basic" 3 )} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvCollapseBus -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "tap_step" -line 68 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "train_ready" -line 86 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("G2" 0)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvAddSignal -win $_nWave2 "/TB/train_ready" +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "prefill_start" -line 85 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "link_down" -line 70 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvAddSignal -win $_nWave2 "/TB/link_down" +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSelectSignal -win $_nWave2 {( "Basic" 5 )} +wvSetPosition -win $_nWave2 {("Basic" 5)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvMoveSelected -win $_nWave2 +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetCursor -win $_nWave2 106093161.210239 -snap {("G2" 0)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 101443997.004330 127466174.044048 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 101680890.812986 -snap {("Basic" 5)} +wvSelectSignal -win $_nWave2 {( "Basic" 5 )} +wvSelectSignal -win $_nWave2 {( "Basic" 4 )} +wvSelectGroup -win $_nWave2 {G2} +wvRenameGroup -win $_nWave2 {G2} {SRAM} +wvSelectGroup -win $_nWave2 {SRAM} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "wr_addr" -line 72 -pos 2 -win $_nTrace1 +srcSelect -signal "wr_data" -line 73 -pos 2 -win $_nTrace1 +srcSelect -signal "wr_en" -line 74 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("Basic" 5)} +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvAddSignal -win $_nWave2 "/TB/wr_addr\[12:0\]" "/TB/wr_data\[511:0\]" \ + "/TB/wr_en" +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvSetCursor -win $_nWave2 105909494.581940 -snap {("SRAM" 2)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "byte_mask" -line 75 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("SRAM" 2)} +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvSetPosition -win $_nWave2 {("G3" 0)} +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvAddSignal -win $_nWave2 "/TB/byte_mask\[63:0\]" +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvSetPosition -win $_nWave2 {("SRAM" 4)} +wvZoom -win $_nWave2 105356523.319846 108186435.072916 +wvSelectGroup -win $_nWave2 {G3} +wvSelectGroup -win $_nWave2 {G3} +wvRenameGroup -win $_nWave2 {G3} {STATUS} +wvSelectGroup -win $_nWave2 {STATUS} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "crc_error" -line 76 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 2)} +wvSetPosition -win $_nWave2 {("SRAM" 3)} +wvSetPosition -win $_nWave2 {("SRAM" 4)} +wvSetPosition -win $_nWave2 {("STATUS" 0)} +wvAddSignal -win $_nWave2 "/TB/crc_error" +wvSetPosition -win $_nWave2 {("STATUS" 0)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "tap_adj_mask" -line 77 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "link_down" -line 70 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "descram_en" -line 69 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "wr_addr" -line 72 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "delay_tap" -line 71 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "train_status" -line 81 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("Basic" 5)} +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 2)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvSetPosition -win $_nWave2 {("G4" 0)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvAddSignal -win $_nWave2 "/TB/train_status\[31:0\]" +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 2)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "frame_status" -line 82 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("Basic" 5)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("SRAM" 4)} +wvSetPosition -win $_nWave2 {("STATUS" 0)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 2)} +wvAddSignal -win $_nWave2 "/TB/frame_status\[31:0\]" +wvSetPosition -win $_nWave2 {("STATUS" 2)} +wvSetPosition -win $_nWave2 {("STATUS" 3)} +srcDeselectAll -win $_nTrace1 +srcSelect -signal "always_on" -line 83 -pos 2 -win $_nTrace1 +wvSetPosition -win $_nWave2 {("Basic" 0)} +wvSetPosition -win $_nWave2 {("Basic" 1)} +wvSetPosition -win $_nWave2 {("Basic" 2)} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("Basic" 4)} +wvSetPosition -win $_nWave2 {("STATUS" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 2)} +wvSetPosition -win $_nWave2 {("STATUS" 3)} +wvSetPosition -win $_nWave2 {("G4" 0)} +wvSetPosition -win $_nWave2 {("STATUS" 3)} +wvAddSignal -win $_nWave2 "/TB/always_on" +wvSetPosition -win $_nWave2 {("STATUS" 3)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "STATUS" 1 )} +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvSaveSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc" +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcHBSelect "TB.dut" -win $_nTrace1 +srcHBSelect "TB.dut" -win $_nTrace1 +srcHBSelect "TB.Unnamed_\$TB_sv_346" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSearchString "success" -win $_nTrace1 -next -case +srcSearchString "success" -win $_nTrace1 -next -case +srcSearchString "success" -win $_nTrace1 -next -case +srcSearchString "success" -win $_nTrace1 -next -case +srcHBSelect "TB.dut.U_prefill" -win $_nTrace1 +srcHBSelect "TB.dut.U_prefill.delay_counter_dffr" -win $_nTrace1 +srcHBSelect "TB.dut" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "TRAINING_PATN" -line 274 -pos 1 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -all -win $_nTrace1 +srcSelect -win $_nTrace1 -range {1 479 1 2 1 1} +srcDeselectAll -win $_nTrace1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvSetCursor -win $_nWave2 101125805.249006 -snap {("Basic" 3)} +wvZoomAll -win $_nWave2 +wvZoom -win $_nWave2 101425058.500000 103671816.125000 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "Basic" 3 )} +wvSelectSignal -win $_nWave2 {( "Basic" 3 )} +wvSetPosition -win $_nWave2 {("Basic" 3)} +wvExpandBus -win $_nWave2 {("Basic" 3)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvSetCursor -win $_nWave2 101450334.523281 -snap {("Basic" 7)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104402012.353125 105783768.292500 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "frame_words\[1\]" -line 289 -pos 1 -win $_nTrace1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 2 +wvSelectSignal -win $_nWave2 {( "SRAM" 4 )} +srcDeselectAll -win $_nTrace1 +wvZoom -win $_nWave2 105984122.903672 106471191.872302 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvSetCursor -win $_nWave2 106543338.963214 -snap {("SRAM" 3)} +wvSetCursor -win $_nWave2 106233397.734100 -snap {("SRAM" 4)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 0 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "frame_words\[1\]" -line 289 -pos 1 -win $_nTrace1 +srcAction -pos 288 1 9 -win $_nTrace1 -name "frame_words\[1\]" -ctrlKey off +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +wvSetCursor -win $_nWave2 106325873.493219 -snap {("STATUS" 4)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104393988.218750 128225667.312500 +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +nsMsgSwitchTab -tab general +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {395 395 2 3 1 1} +srcSearchString "frame_words\[1\]" -win $_nTrace1 -prev -case +srcSelect -win $_nTrace1 -range {289 289 2 3 1 1} +srcDeselectAll -win $_nTrace1 +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +wvZoom -win $_nWave2 105689835.769423 105957942.159227 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 101146540.795834 128300355.955253 +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcSearchString "frame_words\[1\]" -win $_nTrace1 -next -case +srcDeselectAll -win $_nTrace1 +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSetRadix -win $_nWave2 -format UDec +wvZoom -win $_nWave2 105779660.507376 107103408.996398 +wvSetCursor -win $_nWave2 106259519.334570 -snap {("STATUS" 0)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSetRadix -win $_nWave2 -format Hex +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvExpandBus -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvScrollUp -win $_nWave2 2 +wvSelectGroup -win $_nWave2 {SRAM} +wvSelectGroup -win $_nWave2 {SRAM} +wvSelectGroup -win $_nWave2 {SRAM} +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvCollapseBus -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvShowFilterTextField -win $_nWave2 -on +wvShowFilterTextField -win $_nWave2 -off +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvSetPosition -win $_nWave2 {("Basic" 9)} +wvSetPosition -win $_nWave2 {("Basic" 8)} +wvSetPosition -win $_nWave2 {("Basic" 7)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvSetPosition -win $_nWave2 {("Basic" 9)} +wvSetPosition -win $_nWave2 {("Basic" 8)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +wvSetPosition -win $_nWave2 {("SRAM" 1)} +wvSetPosition -win $_nWave2 {("SRAM" 0)} +wvSetPosition -win $_nWave2 {("Basic" 9)} +wvSetPosition -win $_nWave2 {("Basic" 8)} +wvSetPosition -win $_nWave2 {("Basic" 7)} +wvSetPosition -win $_nWave2 {("STATUS" 4)} +srcSearchString "TB.wr_addr" -win $_nTrace1 -prev -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -next -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -next -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -next -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -prev -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -prev -case +srcSearchString "TB.wr_addr" -win $_nTrace1 -prev -case +wvZoom -win $_nWave2 105448723.385117 107182833.905736 +srcDeselectAll -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcHBSelect "TB.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.dut" -delim "." +srcHBSelect "TB.dut" -win $_nTrace1 +wvScrollDown -win $_nWave2 2 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "train_en" -line 78 -pos 2 -win $_nTrace1 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "serial_in" -line 66 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "link_down" -line 70 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "byte_mask" -line 75 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "wr_en" -line 74 -pos 2 -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +srcSelect -signal "wr_addr" -line 72 -pos 2 -win $_nTrace1 +verdiWindowResize -win $_Verdi_1 "357" "162" "1017" "706" +srcHBSelect "TB.dut" -win $_nTrace1 +srcHBSelect "TB.dut" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB.dut" -delim "." +srcHBSelect "TB.dut" -win $_nTrace1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvSetCursor -win $_nWave2 106062935.488214 -snap {("SRAM" 3)} +wvSelectSignal -win $_nWave2 {( "SRAM" 3 )} +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvSelectSignal -win $_nWave2 {( "SRAM" 3 )} +wvSelectSignal -win $_nWave2 {( "SRAM" 3 )} +wvZoom -win $_nWave2 105970726.882644 106181489.409661 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvZoomOut -win $_nWave2 +srcDeselectAll -win $_nTrace1 +srcHBSelect "TB" -win $_nTrace1 +srcSetScope -win $_nTrace1 "TB" -delim "." +srcHBSelect "TB" -win $_nTrace1 +srcDeselectAll -win $_nTrace1 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 101422838.093140 -snap {("STATUS" 2)} +wvSelectSignal -win $_nWave2 {( "Basic" 9 )} +wvScrollUp -win $_nWave2 2 +wvSelectSignal -win $_nWave2 {( "Basic" 8 )} +wvScrollUp -win $_nWave2 3 +srcDeselectAll -win $_nTrace1 +wvSetCursor -win $_nWave2 109677303.689821 -snap {("Basic" 8)} +srcDeselectAll -win $_nTrace1 +wvSetCursor -win $_nWave2 104632908.047405 -snap {("Basic" 8)} +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104556477.810399 104718892.064037 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104672908.528377 104677476.429261 +wvSetCursor -win $_nWave2 104675192.478742 -snap {("Basic" 8)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvSetCursor -win $_nWave2 104684922.107616 -snap {("Basic" 1)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 104695291.242656 -snap {("Basic" 1)} +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104694514.699506 104695291.242656 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 104674961.342909 -snap {("Basic" 1)} +wvSetCursor -win $_nWave2 104675023.466361 -snap {("Basic" 8)} +wvSetCursor -win $_nWave2 104674899.219457 -snap {("Basic" 1)} +wvSetCursor -win $_nWave2 104675147.713265 -snap {("Basic" 9)} +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvSetCursor -win $_nWave2 104673191.063018 -snap {("Basic" 8)} +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomIn -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoom -win $_nWave2 104601624.846294 104728853.676026 +wvZoomIn -win $_nWave2 +wvSetCursor -win $_nWave2 104684999.488751 -snap {("Basic" 1)} +wvSetCursor -win $_nWave2 104674980.218409 -snap {("Basic" 1)} +wvSetCursor -win $_nWave2 104685277.801816 -snap {("Basic" 1)} +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +srcDeselectAll -win $_nTrace1 +verdiWindowResize -win $_Verdi_1 "257" "231" "1017" "706" +verdiWindowResize -win $_Verdi_1 "602" "297" "1017" "794" +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +wvScrollDown -win $_nWave2 12 +wvSelectSignal -win $_nWave2 {( "STATUS" 4 )} +wvSelectSignal -win $_nWave2 {( "STATUS" 2 )} +wvScrollUp -win $_nWave2 2 +wvScrollUp -win $_nWave2 6 +wvScrollDown -win $_nWave2 3 +wvSelectGroup -win $_nWave2 {SRAM} +wvSelectSignal -win $_nWave2 {( "SRAM" 1 )} +wvSelectSignal -win $_nWave2 {( "SRAM" 2 )} +debExit diff --git a/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd.bak b/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd.bak new file mode 100644 index 0000000..e583bba --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdiLog/verdi.cmd.bak @@ -0,0 +1,36 @@ +sidCmdLineBehaviorAnalysisOpt -incr -clockSkew 0 -loopUnroll 0 -bboxEmptyModule 0 -cellModel 0 -bboxIgnoreProtected 0 +debImport "-sverilog" "-f" "filelist_vlg.f" "-top" "TB" +debLoadSimResult \ + /home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/verdplus_000.fsdb +wvCreateWindow +wvRestoreSignal -win $_nWave2 \ + "/home/shbyang/Desktop/workplace/lin-win-share/DA4008_V1.2/sim/lvds/my_signal.rc" \ + -overWriteAutoAlias on -appendSignals on +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollUp -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 1 +wvScrollDown -win $_nWave2 0 +wvScrollDown -win $_nWave2 0 +wvZoomOut -win $_nWave2 +wvZoomOut -win $_nWave2 +debExit diff --git a/DA4008_V1.2/sim/lvds/verdiLog/verdi_perf_err.log b/DA4008_V1.2/sim/lvds/verdiLog/verdi_perf_err.log new file mode 100644 index 0000000..e69de29 diff --git a/DA4008_V1.2/sim/lvds/verdplus.log b/DA4008_V1.2/sim/lvds/verdplus.log new file mode 100644 index 0000000..e6f3ad5 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdplus.log @@ -0,0 +1,2 @@ +File Name Time +./verdplus_000.fsdb 0 to 127,115,000 diff --git a/DA4008_V1.2/sim/lvds/verdplus.vf b/DA4008_V1.2/sim/lvds/verdplus.vf new file mode 100644 index 0000000..1ef6a51 --- /dev/null +++ b/DA4008_V1.2/sim/lvds/verdplus.vf @@ -0,0 +1,7 @@ +@FSDB rc file Version 1.0 +[VRTL_FILE_HEADER] +# !! DON'T EDIT [VRTL_FILE_HEADER] SESSION !! +Version = 1 +[VRTL_FILE_SOURCE] +FileType = switch +File1 = ./verdplus_000.fsdb diff --git a/DA4008_V1.2/sim/lvds/verdplus_000.fsdb b/DA4008_V1.2/sim/lvds/verdplus_000.fsdb new file mode 100644 index 0000000..be84163 Binary files /dev/null and b/DA4008_V1.2/sim/lvds/verdplus_000.fsdb differ