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try_smg/counter.v
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@ -9,7 +9,6 @@ begin
if (!rst_n) if (!rst_n)
count <= 0; count <= 0;
else if (enable == 1'b1) else if (enable == 1'b1)
count <= count + 1;//aabbcc count <= count + 1;//00sss
end end
endmodule endmodule