From 40ed349feca56c6992ff107cb50ebd295e6e858f Mon Sep 17 00:00:00 2001 From: yangshenbo Date: Fri, 9 Jan 2026 19:42:43 +0800 Subject: [PATCH] =?UTF-8?q?=E5=BD=BB=E5=BA=95=E4=BF=AE=E5=A4=8D=E5=9B=A0va?= =?UTF-8?q?lid=E6=9C=89=E6=97=B6=E6=8B=89=E9=AB=98=E6=9C=89=E6=97=B6?= =?UTF-8?q?=E6=8B=89=E4=BD=8E=E5=AF=BC=E8=87=B4=E6=88=91=E7=9A=84=E6=A8=A1?= =?UTF-8?q?=E5=9D=97=E5=A4=9A=E5=8F=91=E7=9A=84=E9=97=AE=E9=A2=98=EF=BC=8C?= =?UTF-8?q?=E4=BF=AE=E5=A4=8Dcrc=E4=BC=9A=E8=AE=A1=E7=AE=97=E5=8C=85?= =?UTF-8?q?=E5=A4=B4=E7=9A=84BUG?= MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- status_to_udp.v | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/status_to_udp.v b/status_to_udp.v index 7cae7bf..34e2abc 100644 --- a/status_to_udp.v +++ b/status_to_udp.v @@ -268,8 +268,9 @@ always @(posedge clk) begin if(CMU_Status_Info_valid) info_cache_fifo_wren <= 1'b1; else info_cache_fifo_wren <= 1'b0; info_cache_fifo_din <= CMU_Status_Info_data; + if (CMU_Status_Info_valid) begin /////valid可能为高低高低交替，所以计数也要加判断逻辑，以免多计数。 Info_data_bytes_num <= Info_data_bytes_num + 4; - + end if (CMU_Status_Info_last) begin A_state <= IDLE; CMU_Status_Info_ready <= 1'b0; @@ -302,7 +303,9 @@ always @(posedge clk) begin if(XYZ_Status_Info_valid) info_cache_fifo_wren <= 1'b1; else info_cache_fifo_wren <= 1'b0; info_cache_fifo_din <= XYZ_Status_Info_data; + if (XYZ_Status_Info_valid) begin /////valid可能为高低高低交替，所以计数也要加判断逻辑，以免多计数。 Info_data_bytes_num <= Info_data_bytes_num + 4; + end if (XYZ_Status_Info_last) begin A_state <= IDLE; @@ -336,7 +339,9 @@ always @(posedge clk) begin if(DAQ_Status_Info_valid) info_cache_fifo_wren <= 1'b1; else info_cache_fifo_wren <= 1'b0; info_cache_fifo_din <= DAQ_Status_Info_data; + if (DAQ_Status_Info_valid) begin /////valid可能为高低高低交替，所以计数也要加判断逻辑，以免多计数。 Info_data_bytes_num <= Info_data_bytes_num + 4; + end if (DAQ_Status_Info_last) begin A_state <= IDLE; @@ -423,7 +428,7 @@ always @(posedge clk or posedge reset) begin fifo_wr_en <= 1'b1; fifo_wr_data[31:16] <= 16'h494e; // "IN" fifo_wr_data[15:0] <= Info_data_bytes_num_reg; - crc32_calc <= calc_crc32({16'h494e, Info_data_bytes_num_reg}, 32'hFFFFFFFF); + crc32_calc <= 32'hFFFFFFFF; //be ready to caculate crc S_state <= SEND_INFO_DATA; end