367 lines
15 KiB
Python
367 lines
15 KiB
Python
import numpy as np
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import os
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from reg_define import *
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class ZChipConfig(object):
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CHANNEL_OFFSET = 0x00600000
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SCALE_FACTOR = 2 ** 31
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def __init__(self, mk_instance, channel_id=0, **kwargs):
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self.mk = mk_instance
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self.channel_id = channel_id
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self.FolderName = kwargs.get('FolderName')
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self.config_file = kwargs.get('config_file')
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self._setup_environment()
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self._init_logger()
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def _setup_environment(self):
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if self.FolderName:
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os.makedirs(self.FolderName, exist_ok=True)
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if self.config_file and os.path.exists(self.config_file):
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os.remove(self.config_file)
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def _init_logger(self):
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import logging
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self.logger = logging.getLogger(f"ChipConfig.ch{self.channel_id}")
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if not self.logger.handlers:
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handler = logging.StreamHandler()
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formatter = logging.Formatter(
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'%(name)s - %(levelname)s - %(message)s')
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handler.setFormatter(formatter)
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self.logger.addHandler(handler)
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self.logger.setLevel(logging.INFO)
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def get_channel_addr(self, base_addr):
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if isinstance(base_addr, str):
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if base_addr.startswith('0x'):
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base_addr = int(base_addr, 16)
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else:
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base_addr = int(base_addr)
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if not hasattr(self, '_channel_offset'):
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self._channel_offset = self.CHANNEL_OFFSET * self.channel_id
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return hex(base_addr + self._channel_offset)
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def _configure_tc_mode(self):
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"""配置TC模式 - 分组配置系数"""
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# self.logger.info(
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# "Configuring TC mode with group-wise coefficient setup")
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# 写入TC_BYPASS
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self.write_register(
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self.get_register_addr('BYPASS'),
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self.REGISTER_VALUES['BYPASS_TC']
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)
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# 计算TC系数
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coefficients = self._calculate_tc_coefficients()
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# 分组配置TC系数并设置配置完成标志
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self._configure_tc_coefficients_by_groups(coefficients)
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# self.logger.info("TC mode configuration completed")
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def _configure_tc_coefficients_by_groups(self, coefficients):
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"""分组配置TC系数，每组配置完成后设置对应的配置完成标志"""
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# 定义7个系数组，每组包含一个系数的4个寄存器(alpha_re, alpha_im, beta_re, beta_im)
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tc_register_groups = self._build_tc_register_groups(coefficients)
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for group_idx, group_registers in enumerate(tc_register_groups):
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# 配置当前组的所有寄存器
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# self.logger.info(f"配置系数组 {group_idx}")
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self.write_registers_batch(group_registers)
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# 设置当前组的配置完成标志
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self._set_coef_config_done_for_group(group_idx)
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# self.logger.info(f"系数组 {group_idx} 配置完成")
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def set_tc_coefficient_set(self, coeff_set_name):
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"""设置要使用的TC系数组"""
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if coeff_set_name not in self.TC_COEFFICIENT_SETS:
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available = list(self.TC_COEFFICIENT_SETS.keys())
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raise ValueError(f"未知的系数组: {coeff_set_name}. 可用的系数组: {available}")
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self.tc_coeff_set = coeff_set_name
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# self.logger.info(
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# f"切换到TC系数组: {coeff_set_name} - {self.TC_COEFFICIENT_SETS[coeff_set_name]['description']}")
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def _calculate_tc_coefficients(self, **kwargs):
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tc_coef_set = kwargs.pop('tc_coef_set')
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coef_set = TC_COEFFICIENT_SETS[tc_coef_set]
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amp_real = coef_set['amp_real']
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amp_imag = coef_set['amp_imag']
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time_real = coef_set['time_real']
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time_imag = coef_set['time_imag']
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sampling_rate = 3e9
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coef1, coef2 = [], []
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for ar, ai, tr, ti in zip(amp_real, amp_imag, time_real, time_imag):
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amp_coef = ar + 1j * ai
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time_coef = tr + 1j * ti
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coef1.append(amp_coef * np.exp(1e9 / (sampling_rate) / 2 / (1 - amp_coef) * time_coef) /
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(1 - amp_coef))
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coef2.append(np.exp(1e9 / (sampling_rate) / (1 - amp_coef) * time_coef))
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# print('coef1_real = ')
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# for c in coef1:
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# print(c.real)
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# # print(hex(int(c.real*(2**31-1)) & 0xFFFFFFFF))
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# print('coef1_imag = ')
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# for c in coef1:
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# # print(hex(int(c.imag*(2**31-1)) & 0xFFFFFFFF))
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# print(c.imag)
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# print('coef2_real = ')
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# for c in coef2:
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# # print(hex(int(c.real*(2**31-1)) & 0xFFFFFFFF))
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# print(c.real)
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# print('coef2_imag = ')
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# for c in coef2:
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# # print(hex(int(c.imag*(2**31-1)) & 0xFFFFFFFF))
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# print(c.imag)
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return {
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'alpha_re': [int(c.real * self.SCALE_FACTOR) for c in coef1],
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'alpha_im': [int(c.imag * self.SCALE_FACTOR) for c in coef1],
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'beta_re': [int(c.real * self.SCALE_FACTOR) for c in coef2],
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'beta_im': [int(c.imag * self.SCALE_FACTOR) for c in coef2]
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}
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def _build_tc_register_groups(self, coefficients):
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"""构建分组的TC寄存器配置"""
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tc_register_groups = []
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# 获取所有寄存器地址
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alpha_re_addrs = self.get_register_addr('TC_ALPHA_RE')
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alpha_im_addrs = self.get_register_addr('TC_ALPHA_IM')
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beta_re_addrs = self.get_register_addr('TC_BETA_RE')
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beta_im_addrs = self.get_register_addr('TC_BETA_IM')
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# 按组分配寄存器（假设有8个系数，但只使用前7组）
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num_groups = len(coefficients['alpha_re'])
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for i in range(num_groups):
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group_registers = [
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(alpha_re_addrs[i], coefficients['alpha_re'][i]),
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(alpha_im_addrs[i], coefficients['alpha_im'][i]),
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(beta_re_addrs[i], coefficients['beta_re'][i]),
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(beta_im_addrs[i], coefficients['beta_im'][i])
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]
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tc_register_groups.append(group_registers)
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return tc_register_groups
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def _set_coef_config_done_for_group(self, group_idx):
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"""为指定组设置配置完成标志"""
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if not (0 <= group_idx <= 7): # 8组，索引0-7
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self.logger.warning(f"无效的组索引: {group_idx}")
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return
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# 计算当前组的配置完成标志值：2^group_idx
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config_done_value = 1 << group_idx
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config_done_hex = f'0x{config_done_value:02x}'
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# 读取当前配置完成寄存器的值，进行或运算以保留其他组的标志
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try:
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# 如果需要保留其他组的标志，这里需要先读取当前值
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# current_value = self._read_register(self.get_register_addr('COEF_CONFIG_DONE'))
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# new_value = current_value | config_done_value
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# 简化版本：直接写入当前组的标志
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self.write_register(
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self.get_register_addr('COEF_CONFIG_DONE'),
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config_done_hex
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)
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# self.logger.info(f"系数组 {group_idx} 配置完成标志已设置: {config_done_hex}")
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except Exception as e:
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self.logger.error(f"设置系数组 {group_idx} 配置完成标志失败: {e}")
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raise
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def write_registers_batch(self, register_values):
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"""
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批量写入寄存器
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参数:
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register_values: [(address, value), ...] 或 {address: value, ...}
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"""
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if isinstance(register_values, dict):
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register_values = register_values.items()
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for address, value in register_values:
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try:
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self.mk.rw_once('w', address, value, self.config_file)
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except Exception as e:
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self.logger.error(f"Failed to write register {address}: {e}")
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raise
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def write_register(self, address, value):
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"""写入单个寄存器"""
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try:
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self.mk.rw_once('w', address, value, self.config_file)
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except Exception as e:
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self.logger.error(f"Failed to write register {address}: {e}")
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raise
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def _freq2hex(self, freq):
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fs = 750
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fcw = int(freq / fs / 4 * 2 ** 32)
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return int(fcw)
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def _deg2hex(self, deg):
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return int(deg / 360 * (2 ** 16 - 1))
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# def _system_reg_config(self, **kwargs):
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# 中断屏蔽寄存器
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# mk_instance.rw_once('w', '0x14', '0x10000000', config.config_file)
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def _general_reg_config(self, **kwargs):
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ctrl_registers = []
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# 自定义寄存器配置支持（元组/字典/列表三种格式）
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if 'custom_registers' in kwargs:
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custom_registers = kwargs.pop('custom_registers')
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first_item = custom_registers[0]
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# 元组格式：[(addr, val), ...] 批量写入
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if isinstance(first_item, tuple):
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self.write_registers_batch(custom_registers)
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# 字典格式：[{"addr": addr, "values": val}, ...] 单条写入
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elif isinstance(first_item, dict):
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for item in custom_registers:
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addr = item['addr']
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values = item['values']
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self.write_register(addr, values)
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# 列表格式：[[addr, val], ...] 单条写入
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elif isinstance(first_item, list):
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for item in custom_registers:
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addr = item[0]
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values = item[1]
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self.write_register(addr, values)
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# 芯片工作模式配置
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if 'chip_mode' in kwargs:
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# TODO: 部分模式可以合并，双频点与单音NCO
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chip_mode = kwargs.pop('chip_mode')
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if chip_mode == 'RAMP':
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self._ramp_config(**kwargs)
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elif chip_mode == 'AWG':
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self._awg_config(**kwargs)
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def _ramp_config(self, **kwargs):
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODDOTR'], 8) # 切换到RAMP输出
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ramp_ctrl = kwargs.pop('ramp_ctrl')
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if ramp_ctrl == 'MCU': # RAMP连到 mcu_regfile
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPENR'], 1 << 30)
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# 之后来用汇编操作RAMP四个参数寄存器
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elif ramp_ctrl == 'SPI': # RAMP连到 ctrl_regfile
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ramp_spi_registers = []
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fixed_enable = kwargs.pop('fixed_enable')
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if fixed_enable: # 打开固定值使能位，把值填进去就好
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fixed_value = kwargs.pop('fixed_value')
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ramp_spi_registers += [1 << 15 | fixed_value << 16]
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPFIXR'], # 常数寄存器
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ramp_spi_registers)
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else:
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ramp_spi_registers += [0 << 15] # 不是固定值模式，常数寄存器给0就好
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height = kwargs.pop('height', 0)
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length = kwargs.pop('step_time', 0)
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ramp_spi_registers += [height << 16]
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ramp_spi_registers += [length]
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPFIXR'],
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ramp_spi_registers)
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# 必须最后配使能
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPENR'], 1 << 31 | 0 << 30)
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def _awg_config(self, **kwargs):
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#数据选择寄存器300108配置开始
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# 模式与寄存器数值的映射字典 (Bit 2 和 Bit[1:0])
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mode_map = {
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'nco': 6,
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'nco_fm': 7,
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'env': 4,
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'mod': 5
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}
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# 1. 在内存中先计算 mode 对应的基础寄存器值
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mode = kwargs.pop('mode', None)
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moddotr_val = mode_map.get(mode, 0) # 如果 mode 不在字典里，默认基础值为 0
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# 2. DSP（拖尾矫正）开关配置
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tail_en = kwargs.pop('tail_en', False)
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if tail_en:
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coefficients = self._calculate_tc_coefficients(**kwargs)
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# 拼接系数列表
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tc_coef_registers = (
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coefficients['alpha_re'] +
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coefficients['alpha_im'] +
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coefficients['beta_re'] +
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coefficients['beta_im']
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)
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self.write_register(addr_base['TCCO0_BASE'] + reg_define['tc_reg']['TCPARR0'], tc_coef_registers)
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tccdr_addr = addr_base['TCCO0_BASE'] + reg_define['tc_reg']['TCCDR']
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for i in range(8):
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self.write_register(tccdr_addr, 1 << i)
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# 如果开启了 tail_en，在内存里直接给第 4 位 (Bit 3) 置 1
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moddotr_val &= ~4 #把[2]变0
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# 3. 所有逻辑判断完毕后，只触发一次物理写操作！
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moddotr_addr = addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODDOTR']
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self.write_register(moddotr_addr, moddotr_val)
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#调制使能寄存器300104配置开始
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amp_mod_enable = kwargs.pop('amp_mod_enable', False)
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freq_mod_enable = kwargs.pop('freq_mod_enable', False)
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bias_enable = kwargs.pop('bias_enable', False)
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# 低电平使能逻辑：True(开启) -> 0，False(关闭) -> 1
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mod_enable = (
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(int(not bias_enable) << 0) # Bit 0: Bias (低电平有效)
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| (int(not freq_mod_enable) << 1) # Bit 1: Freq (加括号，先取非再左移 1 位)
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| (int(not amp_mod_enable) << 2) # Bit 2: Amp (加括号，先取非再左移 2 位)
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)
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self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODENR'], mod_enable)
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#mcu_regfile配置开始
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mcu_registers = []
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fcw_list = kwargs.pop('fcw', 0)
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mcu_reg_clr = kwargs.pop('mcu_reg_clr', 0)
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pcw_list = kwargs.pop('pcw', 0)
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fcw = int(fcw_list[0] / fs / 4 * 2 ** 32)
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for fcw in fcw_list:
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mcu_registers.append(int(fcw / fs / 4 * 2 ** 32))
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if mcu_reg_clr:
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mcu_registers += [1 << 31]
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else:
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mcu_registers += [0 << 31]
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for pcw in pcw_list:
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mcu_registers.append(int(pcw / 360 * (2 ** 16 - 1)) << 16)
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rz_pha = kwargs.pop('rz_pha', 0)
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mcu_registers.append(int(rz_pha / 360 * (2 ** 16 - 1)))
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#幅度
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ff_amp_list = kwargs.pop('ff_amp', 0)
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fm_amp_list = kwargs.pop('fm_amp', 0)
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for ff, fm in zip(ff_amp_list, fm_amp_list):
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mcu_registers.append(((ff & 0xFFFF) << 16) | (fm & 0xFFFF))
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#偏置
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bias_list = kwargs.pop('bias', 0)
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for bias in bias_list:
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mcu_registers.append(bias << 16)
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self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['CWFR0'], mcu_registers)
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#FMER
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fm_en = kwargs.pop('fm_en', False)
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if fm_en:
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self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['FMER'], 1 << 31)
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elif not fm_en:
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self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['FMER'], 0 << 31)
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#mcu_regfile配置到此完成
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return None
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def config_chip_reg(mk_instance, **kwargs):
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config = ZChipConfig(mk_instance, **kwargs)
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config._general_reg_config(**kwargs)
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