commit a5a4bd1da57c09c881a090d47fb1278ffeb2c0e4 Author: yangshenbo Date: Sat Jul 25 23:02:18 2026 +0800 除拖尾矫正功能没完成，其他均完成 diff --git a/Z_case_Generator_V2.0/.idea/.gitignore b/Z_case_Generator_V2.0/.idea/.gitignore new file mode 100644 index 0000000..35410ca --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/.gitignore @@ -0,0 +1,8 @@ +# 默认忽略的文件 +/shelf/ +/workspace.xml +# 基于编辑器的 HTTP 客户端请求 +/httpRequests/ +# Datasource local storage ignored files +/dataSources/ +/dataSources.local.xml diff --git a/Z_case_Generator_V2.0/.idea/Z_case_Generator_V2.0.iml b/Z_case_Generator_V2.0/.idea/Z_case_Generator_V2.0.iml new file mode 100644 index 0000000..f87dfe0 --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/Z_case_Generator_V2.0.iml @@ -0,0 +1,12 @@ + + + + + + + + + + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/.idea/inspectionProfiles/Project_Default.xml b/Z_case_Generator_V2.0/.idea/inspectionProfiles/Project_Default.xml new file mode 100644 index 0000000..4c429e7 --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/inspectionProfiles/Project_Default.xml @@ -0,0 +1,17 @@ + + + + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/.idea/inspectionProfiles/profiles_settings.xml b/Z_case_Generator_V2.0/.idea/inspectionProfiles/profiles_settings.xml new file mode 100644 index 0000000..105ce2d --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/inspectionProfiles/profiles_settings.xml @@ -0,0 +1,6 @@ + + + + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/.idea/misc.xml b/Z_case_Generator_V2.0/.idea/misc.xml new file mode 100644 index 0000000..a6218fe --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/misc.xml @@ -0,0 +1,7 @@ + + + + + + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/.idea/modules.xml b/Z_case_Generator_V2.0/.idea/modules.xml new file mode 100644 index 0000000..efcbff0 --- /dev/null +++ b/Z_case_Generator_V2.0/.idea/modules.xml @@ -0,0 +1,8 @@ + + + + + + + + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/AssemblyTemplateManager.py b/Z_case_Generator_V2.0/AssemblyTemplateManager.py new file mode 100644 index 0000000..3dbac10 --- /dev/null +++ b/Z_case_Generator_V2.0/AssemblyTemplateManager.py @@ -0,0 +1,323 @@ +# from select import kevent +# from os import sync +# from select import kevent +from logging import config +import numpy as np +import re +from typing import List +# from chip_define.reg_define import reg_define['mcu_reg'], addr_base['DTCM0_BASE'] +from reg_define import * +class AssemblyTemplateManager: + """汇编指令模板管理器""" + + def __init__(self, mk_instance, mk_instr, **kwargs): + self.mk = mk_instance + self.mk_instr = mk_instr + self.config_file = kwargs.get('config_file') + self.templates = { + 'general_send_wait': self._generic_awg_control_template, + 'ramp_fixed': self._ramp_mcu_fixed_template, + 'ramp_step': self._ramp_mcu_template + } + + def create_instructions(self, **kwargs): + template_type = kwargs.get('instr_type', str) + params = {**kwargs} + + return self.templates[template_type](**params) + + def _codeword_encode(self, **kwargs): + + sendc = kwargs.pop('sendc' , 0) + wave_hold = kwargs.pop('wave_hold' , 0) + ff_amp_index = kwargs.pop('ff_amp_index', 0) + fm_amp_index = kwargs.pop('fm_amp_index', 0) + bias_index = kwargs.pop('bias_index' , 0) + fcw_index = kwargs.pop('fcw_index' , 0) + pcw_index = kwargs.pop('pcw_index' , 0) + code_clr = kwargs.pop('code_clr' , 0) + env_index = kwargs.pop('env_index' , 0) + + codeword = 0 + codeword |= sendc << 31 + codeword |= wave_hold << 30 + codeword |= ff_amp_index << 28 + codeword |= fm_amp_index << 26 + codeword |= bias_index << 24 + codeword |= fcw_index << 22 + codeword |= pcw_index << 19 + codeword |= code_clr << 18 + codeword |= env_index << 12 + + return codeword + + def _codeword_gen(self, **kwargs): + codeword_configs = kwargs.pop('codeword_configs', []) + codeword_list = [] + for config in codeword_configs: + codeword = self._codeword_encode(**config) + codeword_list.append(codeword) + return codeword_list + + def write_register(self, address, value): + self.mk.rw_once('w', address, value, self.config_file) + + def _generic_awg_control_template(self, **kwargs): + """ + 通用 AWG汇编控制模版 + 支持扫参功能 + """ + # ========================================== + # 1. 准备并打包 DTCM 数据 (Python 侧) + # ========================================== + codeword_list = self._codeword_gen(**kwargs) + send_interval_list = kwargs.get('send_interval', [100]) + cycle_num = kwargs.get('cycle_num', 1) + # 提取扫参相关的参数配置 + sweep_config = kwargs.get('sweep_config', {}) # 扫描参数包 + sweep_num = sweep_config.get('sweep_num', 1) # 扫描次数，代表最外层大循环需要mcu参数重载的次数 + sweep_offsets = sweep_config.get('offsets', []) # mcu_regfile中的偏移地址，代表需要重载的寄存器 + sweep_steps = sweep_config.get('steps', []) # 增量步进 + # 自动获取需要扫描的寄存器个数 + sweep_reg_num = len(sweep_offsets) + + # 构造 DTCM Payload 列表 + # [宏观头部] -> [波形序列] -> [Offsets表] -> [Starts表] -> [Steps表] + # 宏观头部：重载次数，波形播放次数，码字个数,需要重载的寄存器个数 + dtcm_payload = [sweep_num, cycle_num, len(codeword_list), sweep_reg_num] + + # 压入波形序列：[码字0, 间隔0, 码字1, 间隔1 ...] + for cw, wait_clk in zip(codeword_list, send_interval_list): + dtcm_payload.append(cw) + dtcm_payload.append(wait_clk) + + # 如果有扫参任务，压入地址表和步长表 + if sweep_reg_num > 0: + dtcm_payload.extend(sweep_offsets) + dtcm_payload.extend([s & 0xFFFFFFFF for s in sweep_steps]) + + # 统一将这批动态参数写入到 DTFR(0xD8) 的下一个地址，即 0xDC 开始的内存中 + target_addr = addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['DTFR'] + 4 + self.write_register(target_addr, dtcm_payload) + + # ========================================== + # 2. 生成标准 RISC-V 汇编指令文本 (MCU 侧) + # ========================================== + return f""" + start: + # --------------------------------------------------------- + # 基地址初始化 + # --------------------------------------------------------- + lui x1 , 0x100 # x1 = 数据内存 (DTCM) 基地址 (0x00100000) + lui x2 , 0x200 # x2 = 硬件控制寄存器基地址 (0x00200000) + + # --------------------------------------------------------- + # 批量搬移固化的 NCO 外设参数 (0x40 ~ 0x94) + # 包含 22 个寄存器：FCW0~3, CWPRR, GAPR0~7, LCPR, AMPR0~3, BIASR0~3 + # --------------------------------------------------------- + addi x3 , x0 , 4 # x3 = 4 (地址递增步长为 4 字节) + addi x4 , x0 , 22 # x4 = 22 (需要搬移的寄存器总数) + addi x5 , x1 , 0x40 # x5 = 数据源首地址 (DTCM 的 0x40 偏移) + addi x6 , x2 , 0x40 # x6 = 目标首地址 (外设的 0x40 偏移) + + load_nco_params_loop: + addi x4 , x4 , -1 # 循环计数减 1 + lw x31, 0x00(x5) # 从 DTCM 读出 1 个参数 + sw x31, 0x00(x6) # 写入到控制寄存器 + add x5 , x5 , x3 # 源地址 + 4 + add x6 , x6 , x3 # 目标地址 + 4 + bne x4 , x0 , load_nco_params_loop + + # ========================================================= + # 单独搬移 0xB4 地址的参数 (1000b4 -> 2000b4) FM_EN 。至此上述共23个参数搬移完成 + # ========================================================= + lw x31, 0xb4(x1) # 从 DTCM (0x1000b4) 读出参数到 x31 + sw x31, 0xb4(x2) # 将 x31 写入到外设控制寄存器 (0x2000b4) + + # --------------------------------------------------------- + # 模块 A: 读取宏观参数 (0xDC) + # --------------------------------------------------------- + lw x10, 0xdc(x1) # x10 = sweep_num (扫描总步数) + lw x11, 0xe0(x1) # x11 = cycle_num (系综平均次数) + lw x12, 0xe4(x1) # x12 = wave_num (波形数) + lw x17, 0xe8(x1) # x17 = sweep_reg_num (修改个数) + + addi x13, x1 , 0xec # x13 = 波形序列首地址 (0xEC) + slli x14, x12, 3 + add x18, x13, x14 # x18 = [Offsets] 地址表首地址 + slli x14, x17, 2 + add x20, x18, x14 # x20 = [Steps] 步长表首地址 + + # ==================== 主控执行入口 (Do-While 模式) ==================== + run_sweep_iteration: + # ====== 1. 系综平均循环 ====== + addi x28, x11, 0 + middle_ensemble_loop: + addi x28, x28, -1 + addi x26, x12, 0 + addi x25, x13, 0 + + # ====== 2. 波形发送内循环 ====== + inner_wave_send_loop: + addi x26, x26, -1 + lw x31, 0x00(x25) + lw x30, 0x04(x25) + addi x25, x25, 8 + + send x0 , x31, 0 + + bne x26, x0 , inner_wait_branch + beq x0 , x0 , outer_wait_branch + + inner_wait_branch: + wait x0 , x30, -24 + bne x26, x0 , inner_wave_send_loop + + outer_wait_branch: + wait x0 , x30, -36 + bne x28, x0 , middle_ensemble_loop + + # ====== 3. 扫参结束判断 ====== + # 如果 sweep_num == 0，说明当前序列已经打完，直接下班！ + beq x10, x0 , mcu_exit + addi x10, x10, -1 # 否则步数 -1，准备更新参数 + wait x0 , x0 , 100 # 参数切换保护死时间 + + # ====== 4. 硬件 ALU 更新寄存器 ====== + beq x17, x0 , run_sweep_iteration # 若没配寄存器(防呆)，直接进入下一轮 + addi x4 , x17, 0 # 循环次数 + addi x21, x18, 0 # 游标 x21 -> Offsets + addi x23, x20, 0 # 游标 x23 -> Steps + + update_param_loop: + addi x4 , x4 , -1 + lw x29, 0(x21) # 读 相对偏移地址 (例如 0x78) + lw x24, 0(x23) # 读 步长 Step + + add x5 , x1 , x29 # x5 = DTCM中该参数的地址 (x1 + 0x78) + lw x31, 0(x5) # 从 DTCM 读出当前真值！ + add x31, x31, x24 # 当前值 = 当前值 + 步长 + sw x31, 0(x5) # 将新值存回 DTCM，作为下一次的基准！ + + add x6 , x2 , x29 # x6 = 硬件物理地址 (x2 + 0x78) + sw x31, 0(x6) # 写入硬件生效 + + addi x21, x21, 4 # 游标下移 + addi x23, x23, 4 + bne x4 , x0 , update_param_loop + + # 参数更新完毕，无条件跳回上面执行新一轮波形 + beq x0 , x0 , run_sweep_iteration + + mcu_exit: + exit x0 , x0 , 0 + """ + + + def _ramp_mcu_template(self, **kwargs): + ramp_mcu_registers = [] + ramp_mcu_registers.append(0 << 16) + ramp_mcu_registers += [1 << 31] + param_num = kwargs.pop('param_num') + ensemble_num = kwargs.pop('ensemble_num') + ramp_mcu_registers.append(param_num) + ramp_mcu_registers.append(ensemble_num) + height_list = kwargs.pop('height', 0) + length_list = kwargs.pop('step_time', 0) + for height, length in zip(height_list, length_list): + ramp_mcu_registers += [height << 16] + ramp_mcu_registers += [length] + wait = 65536 / height * length + ramp_mcu_registers += [wait] + self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['DTFR'] + 4, ramp_mcu_registers) + # todo: configre step and width first, and then enable? + return f""" + start: + lui x1 , 0x100 + lui x2 , 0x200 + lw x31, 0xdc(x1) + sw x31, 0xb8(x2) + lw x28, 0xe0(x1) + addi x6 , x0, 12 + lw x7 , 0xe8(x1) + ensemble_loop: + addi x7 , x7, -1 + addi x8 , x1, 0 + lw x5 , 0xe4(x1) + ramp_loop: + addi x5, x5, -1 + lw x31, 0xec(x8) + lw x30, 0xf0(x8) + lw x29, 0xf4(x8) + add x8 , x8 , x6 + sw x30, 0xc0(x2) + sw x31, 0xbc(x2) + sw x28, 0xc4(x2) + wait x0 , x29, -30 + bne x5 , x0 , ramp_loop + bne x7 , x0 , ensemble_loop + sw x0, 0xc4(x2) + exit x0, x0, 0 + """ + + def _ramp_mcu_fixed_template(self, **kwargs): + ramp_mcu_registers = [] + ramp_mcu_registers += [1 << 31] # RAMPENR + ensemble_num = kwargs.pop('ensemble_num') + config_param_num = kwargs.pop('config_param_num') + ramp_mcu_registers.append(ensemble_num) + ramp_mcu_registers.append(config_param_num) + fixed_value_list = kwargs.pop('fixed_value') + wait_list = kwargs.pop('wait_clk') + for fixed_value, wait_clk in zip(fixed_value_list, wait_list): + ramp_mcu_registers += [fixed_value << 16 | 1 << 15] + ramp_mcu_registers += [wait_clk] + self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['DTFR'] + 4, ramp_mcu_registers) + return f""" + start: + lui x1 , 0x100 + lui x2 , 0x200 + lw x31, 0xdc(x1) + sw x31, 0xc4(x2) + addi x3 , x0, 8 + lw x4 , 0xe0(x1) + ensemble_loop: + addi x4 , x4, -1 + addi x6 , x1, 0 + lw x5 , 0xe4(x1) + ramp_loop: + addi x5, x5, -1 + lw x31, 0xe8(x6) + lw x30, 0xec(x6) + sw x31, 0xb8(x2) + add x6 , x6 , x3 + bne x5 , x0 , ramp_loop_wait + jal x0 , ensemble_loop_wait + ramp_loop_wait: + wait x0 , x30, -24 + jal x0 , ramp_loop + ensemble_loop_wait: + wait x0 , x30, -36 + bne x4 , x0 , ensemble_loop + exit: + wait x0 , x0, 15 + sw x0, 0xb8(x2) + sw x0, 0xc4(x2) + exit x0, x0, 0 + """ + + + def _write_machine_codes_to_chip(self, machine_codes: str, **kwargs): + channel_id = kwargs.get('channel_id', 0) + self.mk_instr.write(machine_codes, self.config_file, chip_id = channel_id, show=kwargs.pop('instr_show', False)) + if 'inner_sync' in kwargs: + inner_sync = kwargs.pop('inner_sync') + if inner_sync: + self.write_register(addr_base['SYST_BASE']+reg_define['sys_reg']['SYNCR'], 3<<16 | 1) + self.mk.rw_once('r', addr_base['SYST_BASE']+reg_define['pll_reg']['INTPLL_CLKRXPD'], [0]*20, self.config_file) + self.mk.rw_once('r', addr_base['DBGM_BASE'], [0]*2048, self.config_file) + + def instruction_config(mk_instance, mk_instr, **kwargs): + asm_templates = AssemblyTemplateManager(mk_instance, mk_instr, **kwargs) + machine_codes = asm_templates.create_instructions(**kwargs) + asm_templates._write_machine_codes_to_chip(machine_codes, **kwargs) diff --git a/Z_case_Generator_V2.0/EnvelopeGenerator.py b/Z_case_Generator_V2.0/EnvelopeGenerator.py new file mode 100644 index 0000000..a90645a --- /dev/null +++ b/Z_case_Generator_V2.0/EnvelopeGenerator.py @@ -0,0 +1,252 @@ +import numpy as np +import os +import logging +import matplotlib.pyplot as plt +import sys +# sys.path.append('D:/Work/EnvData') +# sys.path.append('D:/Work/EnvData/acz') +# sys.path.append('D:/Work/EnvData/accz') + +from typing import Any, Dict, List, Optional, Union, Callable +from enum import Enum +from env_gen.flattop import flattop +from env_gen.acz import aczwave +from env_gen.accz_gen import accz_wave +from matplotlib import gridspec +from reg_define import * +class EnvelopeGenerator: + + _axes_list: List[tuple] = [] + + PLOT_STYLES = [ + 'ggplot', 'bmh', 'fivethirtyeight', 'Solarize_Light2', + 'fast', 'tableau-colorblind10', 'seaborn-poster', 'seaborn-bright' + ] + PLOT_COLORS = ['C0', 'C1', 'C2', 'C3', 'C4', 'C5', 'C6', 'C7'] + + SINGLE_PLOT_CONFIG = { + 'figsize': (8, 6), + 'dpi': 220, + 'style': 'seaborn-v0_8-poster', + 'linewidth': 3, + 'fontsize': {'xlabel': 22, 'ylabel': 22, 'title': 20, 'legend': 18, 'tick': 18} + } + + MULTI_PLOT_CONFIG = { + 'dpi': 200, + 'fontsize': {'xlabel': 18, 'ylabel': 18, 'title': 16, 'tick': 16}, + 'grid_alpha': 0.3 + } + + def __init__(self, mk_instance, **kwargs): + self.mk = mk_instance + self.config_file = kwargs.get('config_file') + + def write_register(self, address, value): + self.mk.rw_once('w', address, value, self.config_file) + + + # def _show_envelope_subplot(self, all_data): + # n = len(all_data) + # if n == 1: + # EnvelopeGenerator._show_single_plot(all_data[0]) + # else: + # EnvelopeGenerator._show_multi_plots(all_data) + + # def _show_single_plot(self, plot_data): + # t, y, title, output_mode = plot_data + # config = EnvelopeGenerator.SINGLE_PLOT_CONFIG + + # plt.figure(figsize=config['figsize'], dpi=config['dpi']) + # plt.style.use(config['style']) + + # plt.plot(t, y, label=f'{output_mode} Mode', + # linewidth=config['linewidth'], color=EnvelopeGenerator.PLOT_COLORS[0]) + # plt.xlabel('Time (ns)', fontsize=config['fontsize']['xlabel']) + # plt.ylabel('Amplitude', fontsize=config['fontsize']['ylabel']) + # plt.title(title, fontsize=config['fontsize']['title']) + # plt.grid(True, alpha=0.6) + # plt.legend(fontsize=config['fontsize']['legend']) + # plt.tick_params(axis='both', labelsize=config['fontsize']['tick']) + # plt.tight_layout(pad=2.0) + # plt.show() + + # def _show_multi_plots(self, all_data): + # n = len(all_data) + # cols = int(np.ceil(np.sqrt(n))) + # rows = int(np.ceil(n / cols)) + + # config = EnvelopeGenerator.MULTI_PLOT_CONFIG + # fig = plt.figure(figsize=(5 * cols, 4 * rows), dpi=config['dpi']) + # gs = gridspec.GridSpec(rows, cols) + + # for i, (t, y, title, output_mode) in enumerate(all_data): + # row = i // cols + # col = i % cols + + # # 为每个子图分配不同风格和颜色 + # style_idx = i % len(EnvelopeGenerator.PLOT_STYLES) + # color_idx = i % len(EnvelopeGenerator.PLOT_COLORS) + + # with plt.style.context(EnvelopeGenerator.PLOT_STYLES[2]): + # ax = fig.add_subplot(gs[row, col]) + # ax.plot(t, y, color=EnvelopeGenerator.PLOT_COLORS[color_idx]) + # ax.set_xlabel('Time (ns)', fontsize=config['fontsize']['xlabel']) + # ax.set_ylabel('Amplitude', fontsize=config['fontsize']['ylabel']) + # ax.set_title(title, fontsize=config['fontsize']['title']) + # ax.grid(True, alpha=config['grid_alpha']) + # ax.tick_params(axis='both', labelsize=config['fontsize']['tick']) + # plt.tight_layout(pad=3.0) + # plt.show() + + def _generate_rect_envelope(self, **kwargs): + amp = kwargs.pop('amp') + wave_time = kwargs.pop('wave_time') + rect_wave = [amp]*wave_time + return rect_wave + + def _generate_rect_hold_envelope(self, **kwargs): + amp = kwargs.pop('amp') + rect_rising_edge = [amp]*4 + rect_falling_edge = [0]*4 + return rect_rising_edge, rect_falling_edge + + def _generate_flattop_envelope(self, **kwargs): + amp = kwargs.pop('amp') + edge_time = kwargs.pop('edge_time') + wave_time = kwargs.pop('wave_time') + flattop_wave = flattop(float(amp), float(edge_time), float(wave_time), 1.0) + return flattop_wave + + def _generate_flattop_hold_envelope(self, **kwargs): + amp = kwargs.pop('amp') + edge_time = kwargs.pop('edge_time') + wave_time = kwargs.pop('wave_time') + flattop_wave = flattop(float(amp), float(edge_time), float(wave_time), 1.0) + hold_value = flattop_wave.max() + hold_idx = np.where(flattop_wave == hold_value)[0] + rising_edge_end_idx = hold_idx[0] + falling_edge_start_idx = hold_idx[-1] + flattop_rising_edge = flattop_wave[:rising_edge_end_idx+1] + flattop_falling_edge = flattop_wave[falling_edge_start_idx:-2] + return flattop_rising_edge, flattop_falling_edge + + def _generate_acz_envelope(self, **kwargs): + amp = kwargs.pop('amp') + wave_time = kwargs.pop('wave_time') + acz_wave = aczwave(amp, wave_time, 0.0, 0.0, 0.0, 0.864, 0.05, -0.18, 0.04) + acz_wave_real = [val.real for val in acz_wave] + return acz_wave_real + + def _generate_accz_envelope(self, **kwargs): + wave_time = kwargs.pop('wave_time') + env_accz = accz_wave(T=wave_time, A=0.8, plot=False) + return env_accz + + def _cosine_envelope(self, **kwargs): + alpha = kwargs.pop('alpha', 1) + phi = kwargs.pop('phi', np.pi) + amp = kwargs.pop('amp') + wave_time = kwargs.pop('wave_time') + t_norm = np.arange(wave_time) / wave_time + cosine_wave = amp * (1 + alpha * np.cos(2 * np.pi * t_norm + phi)) / 2 + return cosine_wave + + def _generate_envelope_data(self, envelope_type, **kwargs): + if envelope_type == 'rect': + env_data = self._generate_rect_envelope(**kwargs) + elif envelope_type == 'rect_hold': + env_data = self._generate_rect_hold_envelope(**kwargs) + elif envelope_type == 'flattop': + env_data = self._generate_flattop_envelope(**kwargs) + elif envelope_type == 'flattop_hold': + env_data = self._generate_flattop_hold_envelope(**kwargs) + elif envelope_type == 'acz': + env_data = self._generate_acz_envelope(**kwargs) + elif envelope_type == 'accz': + env_data = self._generate_accz_envelope(**kwargs) + elif envelope_type == 'cosine': + env_data = self._cosine_envelope(**kwargs) + elif envelope_type == 'file_read_direct': + env_data = kwargs.get('external_envelope_data', []) + elif envelope_type == 'file_read_txt': + file_path = kwargs.get('file_path') + if file_path is None: + raise ValueError("Missing 'file_path'") + + txt_data = np.loadtxt(file_path) + env_data = np.asarray(txt_data, dtype=float).reshape(-1).tolist() + return env_data + + def _next_env_idx(self, idx_num, env_idx_mem, envelope_length): + if idx_num == 0: + return envelope_length + else: + last_env_idx = env_idx_mem[-1] + env_base_addr = (last_env_idx >> 16) + ((last_env_idx & 0xFFFF) << 1) + return env_base_addr<<16 | envelope_length + + def _env_data_pack(self, float_data_array): + + data_int = np.round(float_data_array).astype(int) + data_int[data_int < 0] += 65536 + hex_pairs = [] + for data0, data1 in zip(data_int[::2], data_int[1::2]): + hex_pairs.append((data1 << 16) | data0) + + return hex_pairs + + def _generate_envelope_batch(self, **kwargs): + envelope_configs = kwargs.pop('envelope_configs') + env_data_mem = [] + env_idx_mem = [] + idx_num = 0 + for envelope_config in envelope_configs: + envelope_type = envelope_config.pop('envelope_type') + env_data = self._generate_envelope_data(envelope_type, **envelope_config) + if isinstance(env_data, tuple): + retun_param_count = len(env_data) + else: + retun_param_count = 1 + if retun_param_count == 1: + envelope = env_data + envelope_arr = np.asarray(envelope, dtype=float).reshape(-1) + if envelope_arr.size % 4 != 0: + raise ValueError("Envelope length must be multiple of 4") + env_data_mem += envelope_arr.astype(int).tolist() + envelope_length = int(envelope_arr.size) + current_env_idx = self._next_env_idx(idx_num, env_idx_mem, envelope_length) + env_idx_mem.append(current_env_idx) + idx_num += 1 + elif retun_param_count == 2: + rising_edge, falling_edge = env_data + rising_edge_arr = np.asarray(rising_edge, dtype=float).reshape(-1) + falling_edge_arr = np.asarray(falling_edge, dtype=float).reshape(-1) + if rising_edge_arr.size % 4 != 0: + raise ValueError("Envelope length must be multiple of 4") + env_data_mem += rising_edge_arr.astype(int).tolist() + rising_edge_length = int(rising_edge_arr.size) + rising_edge_idx = self._next_env_idx(idx_num, env_idx_mem, rising_edge_length) + env_idx_mem.append(rising_edge_idx) + idx_num += 1 + env_data_mem += falling_edge_arr.astype(int).tolist() + falling_edge_length = int(falling_edge_arr.size) + falling_edge_idx = self._next_env_idx(idx_num, env_idx_mem, falling_edge_length) + env_idx_mem.append(falling_edge_idx) + idx_num += 1 + + env2mem_format = self._env_data_pack(env_data_mem) + self.write_register(addr_base['ENVI0_BASE'], env_idx_mem) + self.write_register(addr_base['ENVM0_BASE'], env2mem_format) + # t = np.arange(len(processed_data)) / 3e9 * 1e9 + # EnvelopeGenerator._axes_list.append((t, processed_data, f'Processed Envelope - {output_mode} Mode', output_mode)) + # def _im_show(self, **kwargs): + # EnvelopeGenerator._axes_list = [] + + # if EnvelopeGenerator._axes_list: + # EnvelopeGenerator.show_envelope_subplot(EnvelopeGenerator._axes_list) + # EnvelopeGenerator._axes_list = [] +def env_config(mk_instance, **kwargs): + env_gen = EnvelopeGenerator(mk_instance, **kwargs) + env_gen._generate_envelope_batch(**kwargs) + \ No newline at end of file diff --git a/Z_case_Generator_V2.0/ParamsManager.py b/Z_case_Generator_V2.0/ParamsManager.py new file mode 100644 index 0000000..d70040c --- /dev/null +++ b/Z_case_Generator_V2.0/ParamsManager.py @@ -0,0 +1,56 @@ +import json +import os +from pathlib import Path + + +class ParamsManager: + + def __init__(self, params_dir='params'): + self.params_dir = params_dir + self._ensure_dir_exists() + + def _ensure_dir_exists(self): + Path(self.params_dir).mkdir(parents=True, exist_ok=True) + + def save(self, params, filename): + if not filename.endswith('.json'): + filename = filename + '.json' + + filepath = os.path.join(self.params_dir, filename) + + with open(filepath, 'w', encoding='utf-8') as f: + json.dump(params, f, indent=2, ensure_ascii=False) + + def load(self, filename): + if not filename.endswith('.json'): + filename = filename + '.json' + + filepath = os.path.join(self.params_dir, filename) + + with open(filepath, 'r', encoding='utf-8') as f: + params = json.load(f) + return params + + def save_multiple(self, params_dict): + filepaths = [] + for filename, params in params_dict.items(): + filepath = self.save(params, filename) + filepaths.append(filepath) + return filepaths + + def load_multiple(self, filenames): + result = {} + for filename in filenames: + result[filename] = self.load(filename) + return result + +# from ParamsManager import ParamsManager + +# # 创建参数管理器实例 +# pm = ParamsManager('params') # 参数保存在 params 文件夹中 + +# # 保存单个参数 +# pm.save(params, 'AWG_NCO') # 自动添加 .json 后缀 + +# # 加载单个参数 +# params = pm.load('AWG_NCO') diff --git a/Z_case_Generator_V2.0/ZChipConfig.py b/Z_case_Generator_V2.0/ZChipConfig.py new file mode 100644 index 0000000..c634fec --- /dev/null +++ b/Z_case_Generator_V2.0/ZChipConfig.py @@ -0,0 +1,366 @@ +import numpy as np +import os +from reg_define import * + + +class ZChipConfig(object): + CHANNEL_OFFSET = 0x00600000 + SCALE_FACTOR = 2 ** 31 + + def __init__(self, mk_instance, channel_id=0, **kwargs): + self.mk = mk_instance + self.channel_id = channel_id + self.FolderName = kwargs.get('FolderName') + self.config_file = kwargs.get('config_file') + self._setup_environment() + self._init_logger() + + def _setup_environment(self): + if self.FolderName: + os.makedirs(self.FolderName, exist_ok=True) + if self.config_file and os.path.exists(self.config_file): + os.remove(self.config_file) + + def _init_logger(self): + import logging + self.logger = logging.getLogger(f"ChipConfig.ch{self.channel_id}") + if not self.logger.handlers: + handler = logging.StreamHandler() + formatter = logging.Formatter( + '%(name)s - %(levelname)s - %(message)s') + handler.setFormatter(formatter) + self.logger.addHandler(handler) + self.logger.setLevel(logging.INFO) + + def get_channel_addr(self, base_addr): + if isinstance(base_addr, str): + if base_addr.startswith('0x'): + base_addr = int(base_addr, 16) + else: + base_addr = int(base_addr) + + if not hasattr(self, '_channel_offset'): + self._channel_offset = self.CHANNEL_OFFSET * self.channel_id + + return hex(base_addr + self._channel_offset) + + def _configure_tc_mode(self): + """配置TC模式 - 分组配置系数""" + # self.logger.info( + # "Configuring TC mode with group-wise coefficient setup") + + # 写入TC_BYPASS + self.write_register( + self.get_register_addr('BYPASS'), + self.REGISTER_VALUES['BYPASS_TC'] + ) + + # 计算TC系数 + coefficients = self._calculate_tc_coefficients() + + # 分组配置TC系数并设置配置完成标志 + self._configure_tc_coefficients_by_groups(coefficients) + + # self.logger.info("TC mode configuration completed") + + def _configure_tc_coefficients_by_groups(self, coefficients): + """分组配置TC系数，每组配置完成后设置对应的配置完成标志""" + + # 定义7个系数组，每组包含一个系数的4个寄存器(alpha_re, alpha_im, beta_re, beta_im) + tc_register_groups = self._build_tc_register_groups(coefficients) + + for group_idx, group_registers in enumerate(tc_register_groups): + # 配置当前组的所有寄存器 + # self.logger.info(f"配置系数组 {group_idx}") + self.write_registers_batch(group_registers) + + # 设置当前组的配置完成标志 + self._set_coef_config_done_for_group(group_idx) + + # self.logger.info(f"系数组 {group_idx} 配置完成") + + def set_tc_coefficient_set(self, coeff_set_name): + """设置要使用的TC系数组""" + if coeff_set_name not in self.TC_COEFFICIENT_SETS: + available = list(self.TC_COEFFICIENT_SETS.keys()) + raise ValueError(f"未知的系数组: {coeff_set_name}. 可用的系数组: {available}") + + self.tc_coeff_set = coeff_set_name + # self.logger.info( + # f"切换到TC系数组: {coeff_set_name} - {self.TC_COEFFICIENT_SETS[coeff_set_name]['description']}") + + def _calculate_tc_coefficients(self, **kwargs): + tc_coef_set = kwargs.pop('tc_coef_set') + coef_set = TC_COEFFICIENT_SETS[tc_coef_set] + + amp_real = coef_set['amp_real'] + amp_imag = coef_set['amp_imag'] + time_real = coef_set['time_real'] + time_imag = coef_set['time_imag'] + + sampling_rate = 3e9 + coef1, coef2 = [], [] + for ar, ai, tr, ti in zip(amp_real, amp_imag, time_real, time_imag): + amp_coef = ar + 1j * ai + time_coef = tr + 1j * ti + coef1.append(amp_coef * np.exp(1e9 / (sampling_rate) / 2 / (1 - amp_coef) * time_coef) / + (1 - amp_coef)) + coef2.append(np.exp(1e9 / (sampling_rate) / (1 - amp_coef) * time_coef)) + # print('coef1_real = ') + # for c in coef1: + # print(c.real) + # # print(hex(int(c.real*(2**31-1)) & 0xFFFFFFFF)) + # print('coef1_imag = ') + # for c in coef1: + # # print(hex(int(c.imag*(2**31-1)) & 0xFFFFFFFF)) + # print(c.imag) + # print('coef2_real = ') + # for c in coef2: + # # print(hex(int(c.real*(2**31-1)) & 0xFFFFFFFF)) + # print(c.real) + # print('coef2_imag = ') + # for c in coef2: + # # print(hex(int(c.imag*(2**31-1)) & 0xFFFFFFFF)) + # print(c.imag) + return { + 'alpha_re': [int(c.real * self.SCALE_FACTOR) for c in coef1], + 'alpha_im': [int(c.imag * self.SCALE_FACTOR) for c in coef1], + 'beta_re': [int(c.real * self.SCALE_FACTOR) for c in coef2], + 'beta_im': [int(c.imag * self.SCALE_FACTOR) for c in coef2] + } + + def _build_tc_register_groups(self, coefficients): + """构建分组的TC寄存器配置""" + tc_register_groups = [] + + # 获取所有寄存器地址 + alpha_re_addrs = self.get_register_addr('TC_ALPHA_RE') + alpha_im_addrs = self.get_register_addr('TC_ALPHA_IM') + beta_re_addrs = self.get_register_addr('TC_BETA_RE') + beta_im_addrs = self.get_register_addr('TC_BETA_IM') + + # 按组分配寄存器（假设有8个系数，但只使用前7组） + num_groups = len(coefficients['alpha_re']) + + for i in range(num_groups): + group_registers = [ + (alpha_re_addrs[i], coefficients['alpha_re'][i]), + (alpha_im_addrs[i], coefficients['alpha_im'][i]), + (beta_re_addrs[i], coefficients['beta_re'][i]), + (beta_im_addrs[i], coefficients['beta_im'][i]) + ] + tc_register_groups.append(group_registers) + + return tc_register_groups + + def _set_coef_config_done_for_group(self, group_idx): + """为指定组设置配置完成标志""" + if not (0 <= group_idx <= 7): # 8组，索引0-7 + self.logger.warning(f"无效的组索引: {group_idx}") + return + + # 计算当前组的配置完成标志值：2^group_idx + config_done_value = 1 << group_idx + config_done_hex = f'0x{config_done_value:02x}' + + # 读取当前配置完成寄存器的值，进行或运算以保留其他组的标志 + try: + # 如果需要保留其他组的标志，这里需要先读取当前值 + # current_value = self._read_register(self.get_register_addr('COEF_CONFIG_DONE')) + # new_value = current_value | config_done_value + + # 简化版本：直接写入当前组的标志 + self.write_register( + self.get_register_addr('COEF_CONFIG_DONE'), + config_done_hex + ) + + # self.logger.info(f"系数组 {group_idx} 配置完成标志已设置: {config_done_hex}") + + except Exception as e: + self.logger.error(f"设置系数组 {group_idx} 配置完成标志失败: {e}") + raise + + def write_registers_batch(self, register_values): + """ + 批量写入寄存器 + + 参数: + register_values: [(address, value), ...] 或 {address: value, ...} + """ + if isinstance(register_values, dict): + register_values = register_values.items() + + for address, value in register_values: + try: + self.mk.rw_once('w', address, value, self.config_file) + except Exception as e: + self.logger.error(f"Failed to write register {address}: {e}") + raise + + def write_register(self, address, value): + """写入单个寄存器""" + try: + self.mk.rw_once('w', address, value, self.config_file) + except Exception as e: + self.logger.error(f"Failed to write register {address}: {e}") + raise + + + + + def _freq2hex(self, freq): + fs = 750 + fcw = int(freq / fs / 4 * 2 ** 32) + return int(fcw) + + def _deg2hex(self, deg): + return int(deg / 360 * (2 ** 16 - 1)) + + # def _system_reg_config(self, **kwargs): + # 中断屏蔽寄存器 + # mk_instance.rw_once('w', '0x14', '0x10000000', config.config_file) + + def _general_reg_config(self, **kwargs): + ctrl_registers = [] + # 自定义寄存器配置支持（元组/字典/列表三种格式） + if 'custom_registers' in kwargs: + custom_registers = kwargs.pop('custom_registers') + first_item = custom_registers[0] + # 元组格式：[(addr, val), ...] 批量写入 + if isinstance(first_item, tuple): + self.write_registers_batch(custom_registers) + # 字典格式：[{"addr": addr, "values": val}, ...] 单条写入 + elif isinstance(first_item, dict): + for item in custom_registers: + addr = item['addr'] + values = item['values'] + self.write_register(addr, values) + # 列表格式：[[addr, val], ...] 单条写入 + elif isinstance(first_item, list): + for item in custom_registers: + addr = item[0] + values = item[1] + self.write_register(addr, values) + + # 芯片工作模式配置 + if 'chip_mode' in kwargs: + # TODO: 部分模式可以合并，双频点与单音NCO + chip_mode = kwargs.pop('chip_mode') + if chip_mode == 'RAMP': + self._ramp_config(**kwargs) + elif chip_mode == 'AWG': + self._awg_config(**kwargs) + def _ramp_config(self, **kwargs): + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODDOTR'], 8) # 切换到RAMP输出 + ramp_ctrl = kwargs.pop('ramp_ctrl') + if ramp_ctrl == 'MCU': # RAMP连到 mcu_regfile + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPENR'], 1 << 30) + # 之后来用汇编操作RAMP四个参数寄存器 + elif ramp_ctrl == 'SPI': # RAMP连到 ctrl_regfile + ramp_spi_registers = [] + fixed_enable = kwargs.pop('fixed_enable') + if fixed_enable: # 打开固定值使能位，把值填进去就好 + fixed_value = kwargs.pop('fixed_value') + ramp_spi_registers += [1 << 15 | fixed_value << 16] + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPFIXR'], # 常数寄存器 + ramp_spi_registers) + else: + ramp_spi_registers += [0 << 15] # 不是固定值模式，常数寄存器给0就好 + height = kwargs.pop('height', 0) + length = kwargs.pop('step_time', 0) + ramp_spi_registers += [height << 16] + ramp_spi_registers += [length] + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPFIXR'], + ramp_spi_registers) + # 必须最后配使能 + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['SPI_RAMPENR'], 1 << 31 | 0 << 30) + + + + + def _awg_config(self, **kwargs): + #数据选择寄存器300108配置开始 + # 模式与寄存器数值的映射字典 (Bit 2 和 Bit[1:0]) + mode_map = { + 'nco': 6, + 'nco_fm': 7, + 'env': 4, + 'mod': 5 + } + # 1. 在内存中先计算 mode 对应的基础寄存器值 + mode = kwargs.pop('mode', None) + moddotr_val = mode_map.get(mode, 0) # 如果 mode 不在字典里，默认基础值为 0 + # 2. DSP（拖尾矫正）开关配置 + tail_en = kwargs.pop('tail_en', False) + if tail_en: + coefficients = self._calculate_tc_coefficients(**kwargs) + # 拼接系数列表 + tc_coef_registers = ( + coefficients['alpha_re'] + + coefficients['alpha_im'] + + coefficients['beta_re'] + + coefficients['beta_im'] + ) + self.write_register(addr_base['TCCO0_BASE'] + reg_define['tc_reg']['TCPARR0'], tc_coef_registers) + tccdr_addr = addr_base['TCCO0_BASE'] + reg_define['tc_reg']['TCCDR'] + for i in range(8): + self.write_register(tccdr_addr, 1 << i) + # 如果开启了 tail_en，在内存里直接给第 4 位 (Bit 3) 置 1 + moddotr_val &= ~4 #把[2]变0 + + # 3. 所有逻辑判断完毕后，只触发一次物理写操作！ + moddotr_addr = addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODDOTR'] + self.write_register(moddotr_addr, moddotr_val) + + #调制使能寄存器300104配置开始 + amp_mod_enable = kwargs.pop('amp_mod_enSable', False) + freq_mod_enable = kwargs.pop('freq_mod_enable', False) + bias_enable = kwargs.pop('bias_enable', False) + # 低电平使能逻辑：True(开启) -> 0，False(关闭) -> 1 + mod_enable = ( + (int(not bias_enable) << 0) # Bit 0: Bias (低电平有效) + | (int(not freq_mod_enable) << 1) # Bit 1: Freq (加括号，先取非再左移 1 位) + | (int(not amp_mod_enable) << 2) # Bit 2: Amp (加括号，先取非再左移 2 位) + ) + self.write_register(addr_base['CTRL0_BASE'] + reg_define['ctrl_reg']['MODENR'], mod_enable) + + #mcu_regfile配置开始 + mcu_registers = [] + fcw_list = kwargs.pop('fcw', 0) + mcu_reg_clr = kwargs.pop('mcu_reg_clr', 0) + pcw_list = kwargs.pop('pcw', 0) + fcw = int(fcw_list[0] / fs / 4 * 2 ** 32) + for fcw in fcw_list: + mcu_registers.append(int(fcw / fs / 4 * 2 ** 32)) + if mcu_reg_clr: + mcu_registers += [1 << 31] + else: + mcu_registers += [0 << 31] + for pcw in pcw_list: + mcu_registers.append(int(pcw / 360 * (2 ** 16 - 1)) << 16) + rz_pha = kwargs.pop('rz_pha', 0) + mcu_registers.append(int(rz_pha / 360 * (2 ** 16 - 1))) + #幅度 + ff_amp_list = kwargs.pop('ff_amp', 0) + fm_amp_list = kwargs.pop('fm_amp', 0) + for ff, fm in zip(ff_amp_list, fm_amp_list): + mcu_registers.append(((ff & 0xFFFF) << 16) | (fm & 0xFFFF)) + #偏置 + bias_list = kwargs.pop('bias', 0) + for bias in bias_list: + mcu_registers.append(bias << 16) + self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['CWFR0'], mcu_registers) + #FMER + fm_en = kwargs.pop('fm_en', False) + if fm_en: + self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['FMER'], 1 << 31) + elif not fm_en: + self.write_register(addr_base['DTCM0_BASE'] + reg_define['mcu_reg']['FMER'], 0 << 31) + #mcu_regfile配置到此完成 + return None + + + def config_chip_reg(mk_instance, **kwargs): + config = ZChipConfig(mk_instance, **kwargs) + config._general_reg_config(**kwargs) diff --git a/Z_case_Generator_V2.0/__pycache__/make_case.cpython-311.pyc b/Z_case_Generator_V2.0/__pycache__/make_case.cpython-311.pyc new file mode 100644 index 0000000..1ef93ce Binary files /dev/null and b/Z_case_Generator_V2.0/__pycache__/make_case.cpython-311.pyc differ diff --git a/Z_case_Generator_V2.0/__pycache__/make_inst.cpython-311.pyc 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b/Z_case_Generator_V2.0/env_gen/__pycache__/flattop.cpython-311.pyc differ diff --git a/Z_case_Generator_V2.0/env_gen/accz.py b/Z_case_Generator_V2.0/env_gen/accz.py new file mode 100644 index 0000000..7028d5c --- /dev/null +++ b/Z_case_Generator_V2.0/env_gen/accz.py @@ -0,0 +1,28 @@ +import numpy as np +import matplotlib.pyplot as plt + +# accz +T = 100 # ns +A = 0.8 # 归一化幅度 +P = 0.16 +omega_d = 100e6 # Hz +theta = 0 +a2 = 0.1 +phi = 0 +sample_rate = 1e9 # Hz + +N = int(100 / (1/sample_rate * 1e9)) # 采样点个数 +A = A * 2**15 + +# 包络函数 +t = np.linspace(0, N, N+1) +env = A/(np.sqrt(1 + P**2)) * (np.sin(np.pi * t / N) + P * np.sin(3*np.pi * t / N)) + +# 载波调制 +f = env * (np.cos(omega_d * t + theta) + a2 * np.cos(2*omega_d*t + 2*theta + phi)) +fint16 = np.int16(f) +#np.savetxt(r'D:\SynologyDrive\SynologyDrive\Work\SQC2.1\gene_wave_on_board\code\acczdata.txt',fint16,'%d') + +plt.figure() +plt.plot(t,fint16) +plt.show() \ No newline at end of file diff --git a/Z_case_Generator_V2.0/env_gen/accz_gen.py b/Z_case_Generator_V2.0/env_gen/accz_gen.py new file mode 100644 index 0000000..023e4cc --- /dev/null +++ b/Z_case_Generator_V2.0/env_gen/accz_gen.py @@ -0,0 +1,19 @@ +import numpy as np +import matplotlib.pyplot as plt + +def accz_wave(T=100, A=0.8, P=0.16, omega_d=100e6, theta=0, a2=0.1, phi=0, sample_rate=1e9, plot=False): + N = int(T / (1/sample_rate * 1e9)) + A_scaled = A * 2**15 + t = np.linspace(0, N, N) + env = A_scaled/(np.sqrt(1 + P**2)) * (np.sin(np.pi * t / N) + P * np.sin(3*np.pi * t / N)) + f = env * (np.cos(omega_d * t + theta) + a2 * np.cos(2*omega_d*t + 2*theta + phi)) + fint16 = np.int16(f) + if plot: + plt.figure() + plt.plot(t, env) + plt.show() + return env + +# 示例：外部调用 +# env = accz_wave(T=200, A=1.0, plot=True) +# print(env) \ No newline at end of file diff --git a/Z_case_Generator_V2.0/env_gen/acz.py b/Z_case_Generator_V2.0/env_gen/acz.py new file mode 100644 index 0000000..dc4cb50 --- /dev/null +++ b/Z_case_Generator_V2.0/env_gen/acz.py @@ -0,0 +1,208 @@ +import numpy as np +import math +from typing import List +import os +import matplotlib.pyplot as plt + +class Interp1d: + def __init__(self, xs : List[float], ys : List[float]): + xs, ys = np.array(xs), np.array(ys) + # ascending order + inds = np.argsort(xs) + self.xs, self.ys = xs[inds], ys[inds] + self.len = len(self.xs) + + def __call__(self, x): + lowerboundp = 0 + # optain the lowerbound + for i, xi in enumerate(self.xs): + if x >= xi: + lowerboundp = i + else: + break + if lowerboundp < self.len - 1: + upperboundp = lowerboundp + 1 + else: + lowerboundp, upperboundp = self.len - 2, self.len - 1 + + x0, y0, x1, y1 = self.xs[lowerboundp], self.ys[lowerboundp], self.xs[upperboundp], self.ys[upperboundp] + if x1 == x0: + return (y0 + y1) / 2.0 + + return y0 + (x-x0)/(x1-x0)*(y1-y0) + + + + +def linspace(start : float, end : float, n : int): + samples = [] + step = (end - start) / (n-1) + for i in range(n): + samples.append(start + float(i)*step) + return samples + +def zeros(n : int): + return [0] * n + +def aczwave(amplitude : float, length : int, + carrierFreq : float, carrierPhase : float, dragAlpha : float, + thf : float, thi : float, lam2 : float, lam3 : float): + + t = linspace(0, 1, length) + han2 = [] + for k, x in enumerate(t): + han2.append( + (1-lam3)*(1-math.cos(2.0*math.pi*x)) + + lam2*(1-math.cos(4*math.pi*x)) + + lam3*(1-math.cos(6*math.pi*x)) + ) + maxHan2 = max(han2) + + ths1 = [] + for k in range(length): + ths1.append( + thi + (thf-thi)*han2[k]/maxHan2 + ) + t1u = zeros(length) + for k, v in enumerate(t1u): + if k < (length - 1): + t1u[k+1] = v + math.sin(ths1[k])/float(length-1) + + for k, v in enumerate(t): + t[k] = v * t1u[length-1] + + th = Interp1d(t1u, ths1) + th0 = 1.0 / math.tan(th(t[0])) + + thval = [] + for k in range(length): + thval.append( + 1.0/math.tan(th(t[k])) - th0 + ) + thmin = min(thval) + + samples = [] + for k in range(length): + env = thval[k] * amplitude / thmin + samples.append(complex(env, 0)) + + return samples + + +def test(): + amplitude = 26214 + length = 30 + carrierFreq = 0 + carrierPhase = 0.000000 + dragAlpha = 0.000000 + thf = 0.864 + thi = 0.05 + lam2 = -0.18 + lam3 = 0.04 + + data = aczwave( + amplitude, length, carrierFreq, + carrierPhase, dragAlpha, + thf, thi, lam2, lam3, + ) + for c in data: + print(c.real, c.imag) + return data + + +class Benchmark: + def __init__(self, num_samplings : int): + self.data_dir = "data" + self.num_samplings = num_samplings + self.params_dict = {} + self.gt_dict = {} + self.load_params() + self.load_gt() + + def load_params(self): + for i in range(self.num_samplings): + file = os.path.join(self.data_dir, "aczgo_param_{}.log".format(i)) + with open(file, 'r') as f: + lines = f.readlines() + params = {} + for line in lines: + key, value = line.split(", ") + if key=="length": + value = int(value) + else: + value = float(value) + params[key] = value + + self.params_dict[i] = params + + def eval(self, idx): + params = self.params_dict[idx] + + amplitude = params["amplitude"] + length = params["length"] + carrierFreq = params["carrierFreq"] + carrierPhase = params["carrierPhase"] + dragAlpha = params["dragAlpha"] + thf = params["thf"] + thi = params["thi"] + lam2 = params["lam2"] + lam3 = params["lam3"] + + data = aczwave( + amplitude, length, carrierFreq, + carrierPhase, dragAlpha, + thf, thi, lam2, lam3, + ) + xs, ys = [], [] + for c in data: + xs.append(c.real) + ys.append(c.imag) + + return (xs, ys) + + def load_gt(self): + for i in range(self.num_samplings): + file = os.path.join(self.data_dir, "aczgo_result_{}.log".format(i)) + xs, ys = [], [] + with open(file, 'r') as f: + lines = f.readlines() + for line in lines: + x, y = line.split(", ") + x, y = float(x), float(y) + xs.append(x) + ys.append(y) + self.gt_dict[i] = (xs, ys) + + def test(self, idx): + def check_valid(vs): + return all(map(lambda x:not np.isnan(x) and not np.isinf(x), vs)) + def max_ab_dis(xs, bxs): + return np.abs(np.array(bxs) - np.array(xs)).max() + + + (bxs, bys) = self.gt_dict[idx] + if check_valid(bxs) and check_valid(bys): + xs, ys = self.eval(idx) + return (max_ab_dis(xs, bxs), max_ab_dis(ys, bys)) + else: + return "not valid" + + def test_all(self): + for i in range(self.num_samplings): + print(self.test(i)) + + +if __name__ == "__main__": + b = Benchmark(11) + print(b.test_all()) + + + +# data = test() +# +# np.savetxt('D:/Work/TailCorr/acz_750.csv', data, delimiter=' ') +# plt.figure() +# plt.plot(data) +# plt.show() + + diff --git a/Z_case_Generator_V2.0/env_gen/flattop.py b/Z_case_Generator_V2.0/env_gen/flattop.py new file mode 100644 index 0000000..54dba31 --- /dev/null +++ b/Z_case_Generator_V2.0/env_gen/flattop.py @@ -0,0 +1,75 @@ + +import numpy as np +from scipy.special import erf + +def flattop(A, edge, length, fsn): + ''' + 生成平顶包络函数 (Python版本) + + Parameters: + ----------- + A : float + 幅度 + edge : float + 边沿时间参数 + length : int + 长度（采样点数） + fsn : float + 采样频率 + + Returns: + -------- + numpy.ndarray + 平顶包络波形 + ''' + Ts = 0 + r_sigma = 0.21230 + + T = length / fsn + t = np.arange(0, length + 2) / fsn + + mu = 0.5 * edge + sigma = r_sigma * (edge - 1) + p = T - 1 - edge + + x1 = (t - mu - Ts) / (np.sqrt(2) * sigma) + x2 = (t - mu - p + Ts) / (np.sqrt(2) * sigma) + + f = A / 2 * (erf(x1) - erf(x2)) + # f_padded = np.pad(f, (1, 1), mode='constant', constant_values=0) + + return f +""" +# 使用示例 +if __name__ == "__main__": + # 测试参数 + A = 1.0 # 幅度 + edge = 0.1 # 边沿时间 + length = 1000 # 长度 + fsn = 10000 # 采样频率 + + # 生成平顶包络 + envelope = flattop(A, edge, length, fsn) + + print(f"生成的包络长度: {len(envelope)}") + print(f"最大值: {np.max(envelope):.6f}") + print(f"最小值: {np.min(envelope):.6f}") + + # 可选：绘图显示 + try: + import matplotlib.pyplot as plt + + plt.figure(figsize=(10, 6)) + time_axis = np.arange(len(envelope)) / fsn + plt.plot(time_axis, envelope, 'b-', linewidth=2) + plt.xlabel('时间 (s)') + plt.ylabel('幅度') + plt.title('平顶包络波形') + plt.grid(True, alpha=0.3) + plt.tight_layout() + plt.show() + + except ImportError: + print("matplotlib 未安装，跳过绘图") + +""" \ No newline at end of file diff --git a/Z_case_Generator_V2.0/make_case.py b/Z_case_Generator_V2.0/make_case.py new file mode 100644 index 0000000..337de33 --- /dev/null +++ b/Z_case_Generator_V2.0/make_case.py @@ -0,0 +1,93 @@ +from ctypes import Union +import numpy as np +import random + +class make_case(object): + + def __init__( + self + ): + self = 0 + + def data_gen( + self, + mode = 'random', + length = 1, + params = {} + ): + + match mode: + case 'random': + data = [random.randint(0,2**32) for _ in range(length)] + case 'ones': + data = (2**32-1)*np.ones(length) + case 'amp': + amp = params['amp'] + amp = int(amp,0) if isinstance(amp, str) else int(amp) + data = amp*np.ones(length) + case 'zeros': + data = np.zeros(length) + case 'value': + value = params['value'] + if np.size(value) != length: + print("Warnning: Length Mismatch") + elif length ==1: + data = int(value,0) if isinstance(value, str) else int(value) + else: + data = np.zeros(length) + for i in range(0,length): + data[i] = int(value[i],0) if isinstance(value[i], str) else int(value[i]) + case 'acc': + ini_data = params['ini_data'] + ini_data = int(ini_data,0) if isinstance(ini_data, str) else int(ini_data) + step_size = params['step_size'] + step_size = int(step_size,0) if isinstance(step_size, str) else int(step_size) + data = np.zeros(length) + for i in range(0,length): + data[i] = ini_data + i*step_size + case 'rd_file': + file_name = params['file_name'] + with open(file_name, "r") as f: + data_bin = f.read() + data_bin = data_bin.split('\n') + data = [] + for d in data_bin: + data.append((int(d,2))) + return data + + def rw_once( + self, + op = 'w', + addr = 0x1F00044, + data = [0], + file_name = 'case.txt', + chip_id = 0, + exaddr = 1, + ard_flag = 0 + ): + + with open(file_name, "a") as f: + cmd = 1 if (op=='r') or (op==1) else 0 + if isinstance(addr, str): + addr = int(addr,0) + else: + addr = int(addr) + f.write(f"{((int(cmd)<<31) | (int(ard_flag)<<30) | (int(chip_id)<<25) | (addr)):08x}\n") + f.write(f"{((int(exaddr)<<20) | (int(np.size(data)*4))):08x}\n") + + if op == 'w': + if np.size(data) == 1: + if isinstance(data, str): + dt = int(data,0) + else: + dt = int(np.round(data)) + f.write(f"{(dt if dt>=0 else 2**32+dt):08x}\n") + else: + for i in range(0,np.size(data)): + if isinstance(data[i], str): + dt = int(data[i],0) + else: + dt = int(np.round(data[i])) + f.write(f"{(dt if dt>=0 else 2**32+dt):08x}\n") + f.write('\n') + diff --git a/Z_case_Generator_V2.0/make_inst.py b/Z_case_Generator_V2.0/make_inst.py new file mode 100644 index 0000000..fa9d79e --- /dev/null +++ b/Z_case_Generator_V2.0/make_inst.py @@ -0,0 +1,319 @@ +import numpy as np + +class make_inst(object): + + def parse_instruction(self, instruction, labels, pc): + # 去掉所有逗号 + instruction = instruction.replace(',', ' ') + parts = instruction.split() + opcode = parts[0].upper().strip() + + if opcode.endswith(':'): + # 处理标签 + label_name = opcode[:-1] + labels[label_name] = pc + return None + + operands = [op.strip() for op in parts[1:]] + + def parse_immediate(imm_str): + try: + if imm_str.startswith('0x') or imm_str.startswith('0X'): + return int(imm_str, 16) + elif imm_str.startswith('0b') or imm_str.startswith('0B'): + return int(imm_str, 2) + elif imm_str.startswith('-0x') or imm_str.startswith('-0X'): + return -int(imm_str[1:], 16) + elif imm_str.startswith('-0b') or imm_str.startswith('-0B'): + return -int(imm_str[1:], 2) + elif imm_str.startswith('-'): + return -int(imm_str[1:], 10) + else: + return int(imm_str, 10) + except ValueError: + raise ValueError(f"Invalid immediate value: {imm_str}") + + if opcode == 'LUI': + rd, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + return format((self.opcode_map[opcode]) | (imm & 0xFFFFF) << 12 | (rd << 7), '032b') + + elif opcode == 'AUIPC': + rd, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + return format((self.opcode_map[opcode]) | (imm & 0xFFFFF) << 12 | (rd << 7), '032b') + + elif opcode == 'JAL': + rd, label_or_imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + if label_or_imm.lstrip('-').isdigit() or label_or_imm.startswith(('0x', '0X', '0b', '0B', '-0x', '-0X', '-0b', '-0B')): + imm = parse_immediate(label_or_imm) + else: + imm = labels.get(label_or_imm.upper().strip(), 0) - pc + imm_bits = (((imm >> 20) & 0x1) << 19) | (((imm >> 1) & 0x3FF) << 9) | (((imm >> 11) & 0x1) << 8) | ((imm >> 12) & 0xFF) + return format((self.opcode_map[opcode]) | (imm_bits) << 12 | (rd << 7), '032b') + + elif opcode == 'JALR': + rd = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (imm & 0xFFF) << 20 | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['BEQ', 'BNE', 'BLT', 'BGE', 'BLTU', 'BGEU']: + rs1, rs2, label_or_imm = operands + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + if label_or_imm.lstrip('-').isdigit() or label_or_imm.startswith(('0x', '0X', '0b', '0B', '-0x', '-0X', '-0b', '-0B')): + imm = parse_immediate(label_or_imm) + else: + imm = labels.get(label_or_imm.upper().strip(), 0) - pc + imm_high_bits = (((imm >> 12) & 0x1) << 6) | (((imm >> 5 ) & 0x3F)) + imm_low_bits = (((imm >> 1 ) & 0xF) << 1) | (((imm >> 11) & 0x1 )) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (imm_high_bits << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (imm_low_bits << 7), '032b') + + elif opcode in ['LB', 'LH', 'LW', 'LBU', 'LHU']: + rd = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['SB', 'SH', 'SW']: + rs2 = operands[0] + operands[1] = operands[1].rstrip(')') + imm, rs1 = operands[1].split('(') + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | (((imm >> 5) & 0x7F) << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | ((imm & 0x1F) << 7), '032b') + + elif opcode in ['ADDI', 'SLTI', 'SLTIU', 'XORI', 'ORI', 'ANDI']: + rd, rs1, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['SLLI', 'SRLI', 'SRAI']: + rd, rs1, shamt = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + shamt = parse_immediate(shamt) + funct3 = self.opcode_funct3_map[opcode] + funct7 = self.opcode_funct7_map[opcode] + return format((self.opcode_map[opcode]) | (funct7 << 25) | ((shamt & 0x1F) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['ADD', 'SUB', 'SLL', 'SLT', 'SLTU', 'XOR', 'SRL', 'SRA', 'OR', 'AND']: + rd, rs1, rs2 = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + rs2 = int(rs2[1:]) # 去掉寄存器名称前的 'x' + funct3 = self.opcode_funct3_map[opcode] + funct7 = self.opcode_funct7_map[opcode] + return format((self.opcode_map[opcode]) | (funct7 << 25) | (rs2 << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['WAIT', 'SEND', 'SENDC']: + rd, rs1, imm = operands + rd = int(rd[1:]) # 去掉寄存器名称前的 'x' + rs1 = int(rs1[1:]) # 去掉寄存器名称前的 'x' + imm = parse_immediate(imm) + funct3 = self.opcode_funct3_map[opcode] + return format((self.opcode_map[opcode]) | ((imm & 0xFFF) << 20) | (rs1 << 15) | (funct3 << 12) | (rd << 7), '032b') + + elif opcode in ['EXIT']: + return format((self.opcode_map[opcode]), '032b') + + elif opcode in ['EXIT_IR']: + return '00000000000000000001000000101011' + + else: + raise ValueError(f"Unsupported opcode: {opcode}") + + def write(self, instructions, file_name, exaddr = 1, chip_id = 0, channel_id = 0, pc_start = 0, ard_flag = 0, show = False): + if instructions == "": + pass + else: + labels = {} + binary_instructions = [] + + # 将整段汇编代码拆成多条指令组成的字符串数组 + inst_list = instructions.split('\n') + instructions = [] + for this_inst in inst_list: + this_inst = this_inst.split('#') + if this_inst[0].strip() != '': + instructions.append(this_inst[0].strip()) + + # 第一遍扫描：记录标签位置 + pc = pc_start + for instr in instructions: + binary = self.parse_instruction(instr, labels, pc) + if binary is not None: + binary_instructions.append(binary) + pc += 4 + else: + # 如果是标签，不增加pc + pass + + # 第二遍扫描：生成最终的二进制代码 + pc = pc_start + final_binary_instructions = [] + for instr in instructions: + binary = self.parse_instruction(instr, labels, pc) + if binary is not None: + final_binary_instructions.append(binary) + if show: + print(f"{instr}: {binary}") + pc += 4 + else: + # 如果是标签，不增加pc + pass + + with open(file_name, "a") as f: + base_addr = 0x010_0000 + pc_start + channel_id * 0x060_0000 + length = np.size(final_binary_instructions) + f.write(f"{((ard_flag << 30) | (chip_id << 25) | (base_addr)):08x}\n") + f.write(f"{((exaddr << 20) | (length<<2)):08x}\n") + for binary_instr in final_binary_instructions: + f.write(f"{int(binary_instr,2):08x}\n") + f.write("\n") + + return final_binary_instructions + + opcode_map = { + 'LUI': 0x37, + 'AUIPC': 0x17, + 'JAL': 0x6F, + 'JALR': 0x67, + 'BEQ': 0x63, + 'BNE': 0x63, + 'BLT': 0x63, + 'BGE': 0x63, + 'BLTU': 0x63, + 'BGEU': 0x63, + 'LB': 0x03, + 'LH': 0x03, + 'LW': 0x03, + 'LBU': 0x03, + 'LHU': 0x03, + 'SB': 0x23, + 'SH': 0x23, + 'SW': 0x23, + 'ADDI': 0x13, + 'SLTI': 0x13, + 'SLTIU': 0x13, + 'XORI': 0x13, + 'ORI': 0x13, + 'ANDI': 0x13, + 'SLLI': 0x13, + 'SRLI': 0x13, + 'SRAI': 0x13, + 'ADD': 0x33, + 'SUB': 0x33, + 'SLL': 0x33, + 'SLT': 0x33, + 'SLTU': 0x33, + 'XOR': 0x33, + 'SRL': 0x33, + 'SRA': 0x33, + 'OR': 0x33, + 'AND': 0x33, + 'WAIT': 0x0B, + 'SEND': 0x0B, + 'SENDC': 0x0B, + 'EXIT': 0x2B, + } + + opcode_funct3_map = { + 'JALR': 0x0, + 'BEQ': 0x0, + 'BNE': 0x1, + 'BLT': 0x4, + 'BGE': 0x5, + 'BLTU': 0x6, + 'BGEU': 0x7, + 'LB': 0x0, + 'LH': 0x1, + 'LW': 0x2, + 'LBU': 0x4, + 'LHU': 0x5, + 'SB': 0x0, + 'SH': 0x1, + 'SW': 0x2, + 'ADDI': 0x0, + 'SLTI': 0x2, + 'SLTIU': 0x3, + 'XORI': 0x4, + 'ORI': 0x6, + 'ANDI': 0x7, + 'SLLI': 0x1, + 'SRLI': 0x5, + 'SRAI': 0x5, + 'ADD': 0x0, + 'SUB': 0x0, + 'SLL': 0x1, + 'SLT': 0x2, + 'SLTU': 0x3, + 'XOR': 0x4, + 'SRL': 0x5, + 'SRA': 0x5, + 'OR': 0x6, + 'AND': 0x7, + 'WAIT': 0x0, + 'SEND': 0x2, + 'SENDC': 0x3, + 'EXIT': 0x0, + } + + opcode_funct7_map = { + 'JALR': 0x00, + 'BEQ': 0x00, + 'BNE': 0x00, + 'BLT': 0x00, + 'BGE': 0x00, + 'BLTU': 0x00, + 'BGEU': 0x00, + 'LB': 0x00, + 'LH': 0x00, + 'LW': 0x00, + 'LBU': 0x00, + 'LHU': 0x00, + 'SB': 0x00, + 'SH': 0x00, + 'SW': 0x00, + 'ADDI': 0x00, + 'SLTI': 0x00, + 'SLTIU': 0x00, + 'XORI': 0x00, + 'ORI': 0x00, + 'ANDI': 0x00, + 'SLLI': 0x00, + 'SRLI': 0x00, + 'SRAI': 0x20, + 'ADD': 0x00, + 'SUB': 0x20, + 'SLL': 0x00, + 'SLT': 0x00, + 'SLTU': 0x00, + 'XOR': 0x00, + 'SRL': 0x00, + 'SRA': 0x20, + 'OR': 0x00, + 'AND': 0x00, + 'WAIT': 0x00, + 'SEND': 0x00, + 'SENDC': 0x00, + 'EXIT': 0x00, + } \ No newline at end of file diff --git a/Z_case_Generator_V2.0/reg_define.py b/Z_case_Generator_V2.0/reg_define.py new file mode 100644 index 0000000..c24eb3e --- /dev/null +++ b/Z_case_Generator_V2.0/reg_define.py @@ -0,0 +1,289 @@ +# TODO: 寄存器统一由excel表格维护 +# TODO: 寄存由excel表格生成 +reg_define = { + 'sys_reg': { + 'IDR': 0x00, + 'VIDR': 0x04, + 'DATER': 0x08, + 'VERR': 0x0C, + 'TESTR': 0x10, + 'IMR': 0x14, + 'ISR': 0x18, + 'SFRTR': 0x1C, + 'SFRR': 0x20, + 'CH0RSTR': 0x24, + 'CH1RSTR': 0x28, + 'CH2RSTR': 0x2C, + 'CH3RSTR': 0x30, + 'DBGCFGR': 0x34, + 'MISR': 0x40, + 'SYNCR': 0x44, + 'MSDENR': 0x48, + 'MSDPCNTR': 0x4C, + }, + 'ctrl_reg': { + 'MCUPARAR0': 0x00, + 'MCUPARAR1': 0x04, + 'MCUPARAR2': 0x08, + 'MCUPARAR3': 0x0C, + 'MCURESR0': 0x10, + 'MCURESR1': 0x14, + 'MCURESR2': 0x18, + 'MCURESR3': 0x1C, + 'RTIMR': 0x98, + 'ICNTR': 0x9C, + 'FSIR': 0xA0, + 'MODMR': 0x100, + 'MODENR': 0x104, + 'MODDOTR': 0x108, + 'MIXODFR': 0x10C, + 'STR': 0x110, + 'NCOAOR': 0x114, + 'SPI_RAMPFIXR': 0x118, + 'SPI_RAMPSR': 0x11C, + 'SPI_RAMPIFSR': 0x120, + 'SPI_RAMPENR': 0x124, + 'TSTIMER': 0x130, + 'TSITVLR': 0x134, + 'TSENR': 0x138, + 'TSVALR': 0x13C, + }, + 'mcu_reg': { + 'CWFR0': 0x40, + 'CWFR1': 0x44, + 'CWFR2': 0x48, + 'CWFR3': 0x4C, + 'CWPRR': 0x50, + 'GAPR0': 0x54, + 'GAPR1': 0x58, + 'GAPR2': 0x5C, + 'GAPR3': 0x60, + 'GAPR4': 0x64, + 'GAPR5': 0x68, + 'GAPR6': 0x6C, + 'GAPR7': 0x70, + 'LCPR': 0x74, + 'AMPR0': 0x78, + 'AMPR1': 0x7C, + 'AMPR2': 0x80, + 'AMPR3': 0x84, + 'BIASR0': 0x88, + 'BIASR1': 0x8C, + 'BIASR2': 0x90, + 'BIASR3': 0x94, + 'RTIMR': 0x98, # Note: Same as in ctrl_reg + 'ICNTR': 0x9C, # Note: Same as in ctrl_reg + 'FSIR': 0xA0, # Note: Same as in ctrl_reg + 'DCBVR': 0xA4, + 'FMER': 0xB4, + 'MCU_RAMPFIXR': 0xB8, + 'MCU_RAMPSR': 0xBC, + 'MCU_RAMPIFSR': 0xC0, + 'MCU_RAMPENR': 0xC4, + 'PRNGSDR': 0xC8, + 'PRNGRESR': 0xCC, + 'MULTR0': 0xD0, + 'MULTR1': 0xD4, + 'DTFR': 0xD8, + }, + 'tc_reg': { + 'TCPARR0': 0x000, + 'TCPARR1': 0x004, + 'TCPARR2': 0x008, + 'TCPARR3': 0x00C, + 'TCPARR4': 0x010, + 'TCPARR5': 0x014, + 'TCPARR6': 0x018, + 'TCPARR7': 0x01C, + 'TCPAIR0': 0x020, + 'TCPAIR1': 0x024, + 'TCPAIR2': 0x028, + 'TCPAIR3': 0x02C, + 'TCPAIR4': 0x030, + 'TCPAIR5': 0x034, + 'TCPAIR6': 0x038, + 'TCPAIR7': 0x03C, + 'TCPBRR0': 0x040, + 'TCPBRR1': 0x044, + 'TCPBRR2': 0x048, + 'TCPBRR3': 0x04C, + 'TCPBRR4': 0x050, + 'TCPBRR5': 0x054, + 'TCPBRR6': 0x058, + 'TCPBRR7': 0x05C, + 'TCPBIR0': 0x060, + 'TCPBIR1': 0x064, + 'TCPBIR2': 0x068, + 'TCPBIR3': 0x06C, + 'TCPBIR4': 0x070, + 'TCPBIR5': 0x074, + 'TCPBIR6': 0x078, + 'TCPBIR7': 0x07C, + 'TCBPR': 0x080, + 'TCCER': 0x084, + 'TCOVR': 0x088, + 'TCCDR': 0x08C, + }, + 'pll_reg': { + 'INTPLL_REFCTRL' : 0x00, + 'INTPLL_PCNT' : 0x04, + 'INTPLL_PFDCTRL' : 0x08, + 'INTPLL_SPDCTRL' : 0x0C, + 'INTPLL_PTATCTRL' : 0x10, + 'INTPLL_SELCTRL' : 0x14, + 'INTPLL_VCOCTRL' : 0x18, + 'INTPLL_TCCTRL' : 0x1C, + 'INTPLL_AFCCTRL' : 0x20, + 'INTPLL_AFCFBCTRL': 0x24, + 'INTPLL_AFCLDCNT' : 0x28, + 'INTPLL_DIVRSTSEL': 0x2C, + 'INTPLL_TESTCLK' : 0x30, + 'INTPLL_DIGCLKSEL': 0x34, + 'INTPLL_STATUS' : 0x38, + 'INTPLL_SYNC' : 0x3C, + 'INTPLL_UPDATE' : 0x40, + 'INTPLL_CLKRXPD' : 0x44, + 'INTPLL_RESV' : 0x48, + 'CCALRSTR' : 0x4C, + 'CCALATENR' : 0x50, + 'CCALSELALNR' : 0x54, + 'CCALDCCQECR' : 0x58, + 'CCALQECCT0R' : 0x5C, + 'CCALQECCT1R' : 0x60, + 'CCALDCCCT0R' : 0x64, + 'CCALDCCCT1R' : 0x68, + 'DIVSYNCDCR' : 0x6C, + 'SYNCCLRENR' : 0x70, + 'CCALDCCCT2R' : 0x74, + 'CCALSTR' : 0x78, + } +} + +# Usage example: +# value = reg_define['sys_reg']['DATER'] # Gets 0x00 +# print(f"IDR value: {value}") +# import reg_define + +# 预定义的TC系数组 +TC_COEFFICIENT_SETS = { + 'default': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': '默认TC系数组' + }, + 'coef1': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'lsw - coef1' + }, + 'coef2': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/300, -1/500, 0, 0, 0, 0, 0], + 'description': 'lsw - coef2' + }, + 'coef3': { + 'amp_real': [0.025, 0.009, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0.012, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/650, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/300, -1/500, 0, 0, 0, 0, 0], + + 'description': 'lsw - coef3' + }, + 'coef4': { + 'amp_real': [0.025, 0.015, 0.0002, 0.2, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-1/250, -1/2000, -1/1600, -1/20, 0, 0, 0, 0], + 'time_imag': [0, -1/15, -1/50, 0, 0, 0, 0, 0], + 'description': 'lsw - coef4' + }, + 'coef5': { + 'amp_real': [0.0281, 0.0024, 0.0021, 0.0011, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0033, -0.0027, -0.0027, -0.0002, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef5' + }, + 'coef6': { + 'amp_real': [0.0314, 0.0132, 0.0055, 0.0017, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0002, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef6' + }, + 'coef7': { + 'amp_real': [0, 0.0282, 0, 0.0130, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0193, -0.0051, -0.0012, -0.0020, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'czy - coef7' + }, + 'coef8': { + 'amp_real': [0.0314*1, 0.0132*1, 0.0055*1, 0.0017*1, 0.0282*1, 0.0130*1, 0.0024*1, 0.0021*1], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0002, -0.0051, -0.0020, -0.0027, -0.0027], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': 'thfu - coef8' + }, + 'coef9': { + 'amp_real': [0.0314*1, 0.0132*1, 0.0055*1, 0.0017*1, 0.0282*1, 0.0130*1, 0.0024*1, 0.0021*1], + 'amp_imag': [0.012, 0.012, 0.012, 0.012, 0.012, 0.012, 0.012, 0.012], + 'time_real': [-0.0096, -0.0021, -0.0009, -0.0011, -0.0051, -0.0020, -0.0027, -0.0027], + 'time_imag': [-1/300, -1/500, -1/15, -1/20, -1/100, -1/200, -1/400, -1/800], + 'description': 'thfu - coef9' + }, + 'custom': { + 'amp_real': [0, 0, 0, 0, 0, 0, 0, 0], + 'amp_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_real': [0, 0, 0, 0, 0, 0, 0, 0], + 'time_imag': [0, 0, 0, 0, 0, 0, 0, 0], + 'description': '自定义系数组 - 需要手动设置' + } +} + + +#### regfile base address #### +addr_base = { + 'SYST_BASE': 0x0000000, + 'ITCM0_BASE': 0x0100000, + 'DTCM0_BASE': 0x0200000, + 'CTRL0_BASE': 0x0300000, + 'TCCO0_BASE': 0x0301000, + 'ENVI0_BASE': 0x0400000, + 'ENVM0_BASE': 0x0500000, + 'DACR0_BASE': 0x0600000, + 'DCBI0_BASE': 0x0601000, + 'ITCM1_BASE': 0x0700000, + 'DTCM1_BASE': 0x0800000, + 'CTRL1_BASE': 0x0900000, + 'TCCO1_BASE': 0x0901000, + 'ENVI1_BASE': 0x0A00000, + 'ENVM1_BASE': 0x0B00000, + 'DACR1_BASE': 0x0C00000, + 'DCBI1_BASE': 0x0C01000, + 'ITCM2_BASE': 0x0D00000, + 'DTCM2_BASE': 0x0E00000, + 'CTRL2_BASE': 0x0F00000, + 'TCCO2_BASE': 0x0F01000, + 'ENVI2_BASE': 0x1000000, + 'ENVM2_BASE': 0x1100000, + 'DACR2_BASE': 0x1200000, + 'DCBI2_BASE': 0x1201000, + 'ITCM3_BASE': 0x1300000, + 'DTCM3_BASE': 0x1400000, + 'CTRL3_BASE': 0x1500000, + 'TCCO3_BASE': 0x1501000, + 'ENVI3_BASE': 0x1600000, + 'ENVM3_BASE': 0x1700000, + 'DACR3_BASE': 0x1800000, + 'DCBI3_BASE': 0x1801000, + 'DBGM_BASE': 0x1900000, + 'INTP_BASE': 0x1F00000 +} + +fs = 750 #MHz \ No newline at end of file diff --git a/Z_case_Generator_V2.0/z_case_gen.ipynb b/Z_case_Generator_V2.0/z_case_gen.ipynb new file mode 100644 index 0000000..15c3cb6 --- /dev/null +++ b/Z_case_Generator_V2.0/z_case_gen.ipynb @@ -0,0 +1,1171 @@ +{ + "cells": [ + { + "cell_type": "code", + "id": "initial_id", + "metadata": { + "collapsed": true, + "ExecuteTime": { + "end_time": "2026-07-25T14:48:43.562732Z", + "start_time": "2026-07-25T14:48:43.450725Z" + } + }, + "source": [ + "# _配置\n", + "# TODO: 完整的定向case测试集\n", + "# TODO: 产生case的可以结合数据库做一个GUI，使其使用更为方便\n", + "%load_ext autoreload \n", + "%autoreload 2\n", + "import sys\n", + "import os\n", + "import numpy as np\n", + "from make_case import *\n", + "from make_inst import *\n", + "from ZChipConfig import *\n", + "from AssemblyTemplateManager import *\n", + "from EnvelopeGenerator import *\n", + "from reg_define import addr_base\n", + "from reg_define import *\n", + "from ParamsManager import ParamsManager\n", + "from itertools import product\n", + "from pathlib import Path\n", + "mk = make_case()\n", + "mk_instr = make_inst()\n", + "#### envelop making parameter ####\n", + "fs = 750 #MHz\n", + "amp_max = 32767 #LSB\n", + "params = {}\n", + "params.update({'Sample_Frequency': fs})\n", + "params.update({'Fix_Dot_Num': False})\n", + "params.update({'Dot_Num': 0})\n", + "params.update({'Time_Length': 100}) #ns\n", + "params.update({'Amplitude': amp_max})\n", + "params.update({'Flattop_Margin_Prop': 0.1})\n", + "params.update({'Cosine_Type': 'Single_Priod'})\n", + "params.update({'Cosine_Iniphase': 0})\n", + "params.update({'Cosine_Frequency': 100}) #MHz\n", + "\n", + "#### regfile total length ####\n", + "SYST_LEN = 18\n", + "ITCM_LEN = 8192\n", + "DTCM_LEN = 8192\n", + "CTRL_LEN = 27\n", + "TCCO_LEN = 36\n", + "ENVI_LEN = 64\n", + "ENVM_Z_LEN = 16384\n", + "DACR_LEN = 38\n", + "DBGM_LEN = 2048\n", + "INTP_LEN = 31\n", + "\n", + "#### special address cases ####\n", + "SYST_SEG0_BASE = '0x0000000'\n", + "SYST_SEG0_LEN = 14\n", + "SYST_SEG1_BASE = '0x0000040'\n", + "SYST_SEG1_LEN = 1\n", + "\n", + "CTRL0_SEG0_BASE = '0x0300000'\n", + "CTRL1_SEG0_BASE = '0x0900000'\n", + "CTRL2_SEG0_BASE = '0x0F00000'\n", + "CTRL3_SEG0_BASE = '0x1500000'\n", + "CTRL_SEG0_LEN = 41\n", + "CTRL0_SEG1_BASE = '0x0300100'\n", + "CTRL1_SEG1_BASE = '0x0900100'\n", + "CTRL2_SEG1_BASE = '0x0F00100'\n", + "CTRL3_SEG1_BASE = '0x1500100'\n", + "CTRL_SEG1_LEN = 17\n", + "\n", + "four_channel = False\n", + "\n", + "from pathlib import Path\n", + "\n", + "def run_case(params, base_dir=\"..\", save_json=True, write_hw=True):\n", + " \"\"\"\n", + " 通用执行函数：自动判断模式并按需调用 configure_chip_output, env_config, instruction_config\n", + " \"\"\"\n", + " folder_name = params.get('FolderName', 'RAMP')\n", + " case_name = params['CaseName']\n", + " \n", + " # 1. 统一构建输出路径 (指向上一层目录)\n", + " out_dir = Path(base_dir) / folder_name\n", + " config_file_path = out_dir / f\"{case_name}_HEX.txt\"\n", + " params['config_file'] = str(config_file_path)\n", + " \n", + " # 2. 自动创建目录并初始化保存器\n", + " pm = ParamsManager(out_dir)\n", + " \n", + " # 7. 保存最终的 JSON 配置文件 (此时包含了 env_config 补充完整的数据)\n", + " if save_json:\n", + " pm.save(params, case_name)\n", + " \n", + " # 3. 基础芯片输出配置 (所有用例默认都会执行)\n", + " config_chip_reg(mk, **params)\n", + " print(\"执行config_chip_reg\")\n", + " \n", + " # 4. 自动识别并执行包络配置 (当 params 包含 envelope_configs 或 env_amp 时自动触发)\n", + " if 'envelope_configs' in params or 'envelope_type' in params or 'amp' in params:\n", + " if 'env_config' in globals():\n", + " env_config(mk, **params)\n", + " print(\"执行了env_config\")\n", + " \n", + " # 5. 自动识别并执行指令配置 (当 params 包含 instr_type 时自动触发)\n", + " if 'instr_type' in params:\n", + " instruction_config(mk, mk_instr, **params)\n", + " print(\"执行了instruction_config\")\n", + " \n", + " # 6. 基础硬件寄存器下发\n", + " if write_hw:\n", + " mk.rw_once('w', addr_base['ENVM0_BASE'], 0, params['config_file'])\n", + " if params.pop('ramp_ctrl') != 'MCU':\n", + " mk.rw_once('w', addr_base['ITCM0_BASE'], '0x2B', params['config_file'])\n", + " \n", + "\n", + " \n", + " print(f\" 生成：{config_file_path.resolve()}\")\n", + " return None" + ], + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "The autoreload extension is already loaded. To reload it, use:\n", + " %reload_ext autoreload\n" + ] + } + ], + "execution_count": 36 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:18:13.898053Z", + "start_time": "2026-07-20T07:18:13.810352Z" + } + }, + "cell_type": "code", + "source": [ + "# load params\n", + "FolderName = 'D:/yangshenbo/workspace/temporary/case'\n", + "CaseName = 'AWG_ENV'\n", + "pm = ParamsManager(FolderName)\n", + "params = pm.load(CaseName)\n", + "configure_chip_output(mk, **params)\n", + "env_config(mk, **params)\n", + "instruction_config(mk, mk_instr, **params)" + ], + "id": "dd0c2d05a0afc9b6", + "outputs": [], + "execution_count": 103 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-25T14:54:26.026424Z", + "start_time": "2026-07-25T14:54:25.883879Z" + } + }, + "cell_type": "code", + "source": [ + "#general_send_wait这个汇编模板的 SEND_WAIT效果示例。\n", + "# AWG通用模板\n", + "run_case({\n", + " 'chip_mode':'AWG', #分为AWG和RAMP模式\n", + " 'mode':'mod', #可选nco nco_fm env mod四种模式\n", + " 'tail_en': False, #拖尾矫正开关\n", + " 'inner_sync': True, #内部触发，应该是软触发，写一个寄存器，就能触发\n", + " 'amp_mod_enable': True, #调幅的开关，mod调制模式下起作用。\n", + " 'freq_mod_enable': True, #nco的开关\n", + " 'bias_enable': True, #必开的开关，AWG模式下，偏置必须打开，否则AWG输出保持为0.\n", + " \n", + " 'fcw': [100, 200, 300, 400], # MHz\n", + " 'mcu_reg_clr': True,\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_ff_pha': 0,\n", + " 'rz_fm_pha': 45,\n", + " 'ff_amp': [32767, 32767, 32767, 32767],\n", + " 'fm_amp': [32767, 32767, 32767, 32767],\n", + " 'bias': [1, 2, 3, 4],\n", + " 'fm_en' :False, #nco_fm的开关，在nco_fm模式时，必须打开,不然nco_fm不工作，就是一条直线. mod的模式下开启fm_en,同时打开nco，就能看到两个正弦波叠加啊\n", + " 'instr_type': 'general_send_wait', #调用汇编搬移上面的数据到mcu_regfile,同时配合下面参数执行指令.AWG固定用这个模板，不用改。\n", + " 'send_interval': [100, 150, 200, 250, 300, 350, 400,450,500],\n", + " 'cycle_num': 1, #0代表无限循环，如果要想扫参，那么这个波形序列就不能无限循环播放\n", + " 'codeword_configs': [\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 0},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 1},\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 2},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 3},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 4},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 5},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 6},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 7},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 8},\n", + " ],\n", + " 'sweep_config': {\n", + " 'sweep_num': 0, # 外层循环：如果是0，则代表不扫参，只搬移一次的23个寄存器。如果是 1，代表重载1次寄存器（加上最初的那次，共两次）.\n", + " 'offsets': [0x78, 0x40], # 告诉硬件：本次扫描要修改哪几个寄存器的偏移地址，比如要重载2个寄存器，0x78 = AMPR0 (幅度), 0x40 = CWFR0 (频率) \n", + " 'steps': [3000, int(100 / fs / 4 * 2 ** 32)] # 幅度每次 +3000；频率每次 100MHz (支持负数，Python会自动转32位补码给MCU) ，所以第一次载入是载入初始值，第二次就是原值+steps,第三次就是上一次的值+steps \n", + " },\n", + " 'envelope_configs': [ #包络配置\n", + " {'envelope_type': 'rect_hold', 'amp': 32767},\n", + " {'envelope_type': 'flattop_hold', 'amp': 32767, 'edge_time': 3.5, 'wave_time': 30},\n", + " {'envelope_type': 'acz', 'amp': 32767, 'wave_time': 12 * 4},\n", + " {'envelope_type': 'accz', 'wave_time': 12 * 4},\n", + " {'envelope_type': 'cosine', 'amp': 32767, 'wave_time': 12 * 25},\n", + " {'envelope_type': 'rect', 'amp': 32767, 'wave_time': 12},\n", + " {'envelope_type': 'flattop', 'amp': 32767, 'edge_time': 2, 'wave_time': 22},\n", + " ],\n", + " 'FolderName': 'General',\n", + " 'CaseName': 'env',\n", + "})" + ], + "id": "47c22172d77fc331", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行config_chip_reg\n", + "执行了env_config\n", + "执行了instruction_config\n" + ] + }, + { + "ename": "KeyError", + "evalue": "'ramp_ctrl'", + "output_type": "error", + "traceback": [ + "\u001B[1;31m---------------------------------------------------------------------------\u001B[0m", + "\u001B[1;31mKeyError\u001B[0m Traceback (most recent call last)", + "Input \u001B[1;32mIn [38]\u001B[0m, in \u001B[0;36m\u001B[1;34m()\u001B[0m\n\u001B[0;32m 1\u001B[0m \u001B[38;5;66;03m#general_send_wait这个汇编模板的 SEND_WAIT效果示例。\u001B[39;00m\n\u001B[0;32m 2\u001B[0m \u001B[38;5;66;03m# AWG通用模板\u001B[39;00m\n\u001B[1;32m----> 3\u001B[0m \u001B[43mrun_case\u001B[49m\u001B[43m(\u001B[49m\u001B[43m{\u001B[49m\n\u001B[0;32m 4\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mchip_mode\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mAWG\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#分为AWG和RAMP模式\u001B[39;49;00m\n\u001B[0;32m 5\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mmode\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mmod\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#可选nco nco_fm env mod四种模式\u001B[39;49;00m\n\u001B[0;32m 6\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mtail_en\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mFalse\u001B[39;49;00m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#拖尾矫正开关\u001B[39;49;00m\n\u001B[0;32m 7\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43minner_sync\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mTrue\u001B[39;49;00m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#内部触发，应该是软触发，写一个寄存器，就能触发\u001B[39;49;00m\n\u001B[0;32m 8\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mamp_mod_enable\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mTrue\u001B[39;49;00m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#调幅的开关，mod调制模式下起作用。\u001B[39;49;00m\n\u001B[0;32m 9\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mfreq_mod_enable\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mTrue\u001B[39;49;00m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#nco的开关\u001B[39;49;00m\n\u001B[0;32m 10\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mbias_enable\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mTrue\u001B[39;49;00m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m#必开的开关，AWG模式下，偏置必须打开，否则AWG输出保持为0.\u001B[39;49;00m\n\u001B[0;32m 11\u001B[0m \u001B[43m \u001B[49m\n\u001B[0;32m 12\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mfcw\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[43m[\u001B[49m\u001B[38;5;241;43m100\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m200\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m300\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m400\u001B[39;49m\u001B[43m]\u001B[49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m# MHz\u001B[39;49;00m\n\u001B[0;32m 13\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mmcu_reg_clr\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;28;43;01mTrue\u001B[39;49;00m\u001B[43m,\u001B[49m\n\u001B[0;32m 14\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mpcw\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[43m[\u001B[49m\u001B[38;5;241;43m0\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m30\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m45\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m90\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m120\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m135\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m150\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m180\u001B[39;49m\u001B[43m]\u001B[49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;66;43;03m# Deg \u001B[39;49;00m\n\u001B[0;32m 15\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mrz_ff_pha\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m0\u001B[39;49m\u001B[43m,\u001B[49m\n\u001B[0;32m 16\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mrz_fm_pha\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m45\u001B[39;49m\u001B[43m,\u001B[49m\n\u001B[0;32m 17\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mff_amp\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[43m[\u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m]\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 18\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mfm_amp\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[43m[\u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m]\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 19\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mbias\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[43m[\u001B[49m\u001B[38;5;241;43m1\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m2\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m 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\u001B[49m\u001B[43m{\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43menvelope_type\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mcosine\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mamp\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mwave_time\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m12\u001B[39;49m\u001B[43m \u001B[49m\u001B[38;5;241;43m*\u001B[39;49m\u001B[43m \u001B[49m\u001B[38;5;241;43m25\u001B[39;49m\u001B[43m}\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 46\u001B[0m \u001B[43m \u001B[49m\u001B[43m{\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43menvelope_type\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mrect\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mamp\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mwave_time\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m12\u001B[39;49m\u001B[43m}\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 47\u001B[0m \u001B[43m \u001B[49m\u001B[43m{\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43menvelope_type\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mflattop\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mamp\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m32767\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43medge_time\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m2\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mwave_time\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;241;43m22\u001B[39;49m\u001B[43m}\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 48\u001B[0m \u001B[43m \u001B[49m\u001B[43m]\u001B[49m\u001B[43m,\u001B[49m\n\u001B[0;32m 49\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mFolderName\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mGeneral\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\n\u001B[0;32m 50\u001B[0m \u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mCaseName\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m:\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43menv\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\n\u001B[0;32m 51\u001B[0m \u001B[43m}\u001B[49m\u001B[43m)\u001B[49m\n", + "Input \u001B[1;32mIn [36]\u001B[0m, in \u001B[0;36mrun_case\u001B[1;34m(params, base_dir, save_json, write_hw)\u001B[0m\n\u001B[0;32m 103\u001B[0m \u001B[38;5;28;01mif\u001B[39;00m write_hw:\n\u001B[0;32m 104\u001B[0m mk\u001B[38;5;241m.\u001B[39mrw_once(\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mw\u001B[39m\u001B[38;5;124m'\u001B[39m, addr_base[\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mENVM0_BASE\u001B[39m\u001B[38;5;124m'\u001B[39m], \u001B[38;5;241m0\u001B[39m, params[\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mconfig_file\u001B[39m\u001B[38;5;124m'\u001B[39m])\n\u001B[1;32m--> 105\u001B[0m \u001B[38;5;28;01mif\u001B[39;00m \u001B[43mparams\u001B[49m\u001B[38;5;241;43m.\u001B[39;49m\u001B[43mpop\u001B[49m\u001B[43m(\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mramp_ctrl\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m)\u001B[49m \u001B[38;5;241m!=\u001B[39m \u001B[38;5;124m'\u001B[39m\u001B[38;5;124mMCU\u001B[39m\u001B[38;5;124m'\u001B[39m:\n\u001B[0;32m 106\u001B[0m mk\u001B[38;5;241m.\u001B[39mrw_once(\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mw\u001B[39m\u001B[38;5;124m'\u001B[39m, addr_base[\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mITCM0_BASE\u001B[39m\u001B[38;5;124m'\u001B[39m], \u001B[38;5;124m'\u001B[39m\u001B[38;5;124m0x2B\u001B[39m\u001B[38;5;124m'\u001B[39m, params[\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mconfig_file\u001B[39m\u001B[38;5;124m'\u001B[39m])\n\u001B[0;32m 110\u001B[0m \u001B[38;5;28mprint\u001B[39m(\u001B[38;5;124mf\u001B[39m\u001B[38;5;124m\"\u001B[39m\u001B[38;5;124m 生成：\u001B[39m\u001B[38;5;132;01m{\u001B[39;00mconfig_file_path\u001B[38;5;241m.\u001B[39mresolve()\u001B[38;5;132;01m}\u001B[39;00m\u001B[38;5;124m\"\u001B[39m)\n", + "\u001B[1;31mKeyError\u001B[0m: 'ramp_ctrl'" + ] + } + ], + "execution_count": 38 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-25T14:48:51.544566Z", + "start_time": "2026-07-25T14:48:51.434531Z" + } + }, + "cell_type": "code", + "source": [ + "# RAMP 通用模板\n", + "#RAMP SPI控制\n", + "run_case({\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'SPI',\n", + " 'fixed_enable': True, #是固定值还是斜坡模式\n", + " 'fixed_value': 22767, #固定值模式生效\n", + " 'height': 512, 'step_time': 34 , #斜坡模式生效 ，step_time就是台阶宽度\n", + " \n", + " 'FolderName': 'RAMP',\n", + " 'CaseName': f\"RAMP_SPI\"\n", + "})\n", + "#RAMP MCU控制时,斜坡模式\n", + "run_case({\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'MCU',\n", + " #是固定值还是斜坡模式，如过是斜坡模式，则要指令选ramp_step\n", + " 'instr_type': 'ramp_step', #可选ramp_step或ramp_fixed. mcu执行不同指令操作模板，实现台阶或斜坡这两种模式\n", + " 'ensemble_num' : 2, #大循环次数\n", + " 'param_num' :2, # 循环中参数个数，和列表个数一致\n", + " 'height': [128,256], \n", + " 'step_time': [50,50], \n", + " \n", + " 'FolderName': 'RAMP',\n", + " 'CaseName': f\"RAMP_MCU_STEP\"\n", + "})\n", + "\n", + "#RAMP MCU控制时,固定值模式\n", + "run_case({\n", + " 'chip_mode': 'RAMP',\n", + " 'ramp_ctrl':'MCU',\n", + " #是固定值还是斜坡模式，如果是固定值模式，则指令选ramp_fixed\n", + " 'instr_type': 'ramp_fixed', #可选ramp_step或ramp_fixed. mcu执行不同指令操作模板，实现台阶或斜坡这两种模式\n", + " 'fixed_value': [1<<15] + [1<<15 | 1<\u001B[1;34m()\u001B[0m\n\u001B[0;32m 3\u001B[0m pm_load \u001B[38;5;241m=\u001B[39m ParamsManager(\u001B[38;5;124m'\u001B[39m\u001B[38;5;124m../AWG\u001B[39m\u001B[38;5;124m'\u001B[39m)\n\u001B[0;32m 5\u001B[0m \u001B[38;5;28;01mfor\u001B[39;00m pcw \u001B[38;5;129;01min\u001B[39;00m phase_list:\n\u001B[1;32m----> 6\u001B[0m params \u001B[38;5;241m=\u001B[39m \u001B[43mpm_load\u001B[49m\u001B[38;5;241;43m.\u001B[39;49m\u001B[43mload\u001B[49m\u001B[43m(\u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mAWG_NCO\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m)\u001B[49m\n\u001B[0;32m 7\u001B[0m params[\u001B[38;5;124m'\u001B[39m\u001B[38;5;124mpcw\u001B[39m\u001B[38;5;124m'\u001B[39m][\u001B[38;5;241m0\u001B[39m] \u001B[38;5;241m=\u001B[39m pcw\n\u001B[0;32m 8\u001B[0m params\u001B[38;5;241m.\u001B[39mupdate({\n\u001B[0;32m 9\u001B[0m \u001B[38;5;124m'\u001B[39m\u001B[38;5;124mFolderName\u001B[39m\u001B[38;5;124m'\u001B[39m: \u001B[38;5;124m'\u001B[39m\u001B[38;5;124mAWG_ffNCO_pha_scan\u001B[39m\u001B[38;5;124m'\u001B[39m,\n\u001B[0;32m 10\u001B[0m \u001B[38;5;124m'\u001B[39m\u001B[38;5;124mCaseName\u001B[39m\u001B[38;5;124m'\u001B[39m: \u001B[38;5;124mf\u001B[39m\u001B[38;5;124m\"\u001B[39m\u001B[38;5;124mtc_ffnco_pha_scan_\u001B[39m\u001B[38;5;132;01m{\u001B[39;00mpcw\u001B[38;5;132;01m}\u001B[39;00m\u001B[38;5;124mdeg\u001B[39m\u001B[38;5;124m\"\u001B[39m,\n\u001B[0;32m 11\u001B[0m })\n", + "File \u001B[1;32mD:\\recent_work\\Z-Chip _case_generator\\A_Case_Generator\\ParamsManager.py:30\u001B[0m, in \u001B[0;36mParamsManager.load\u001B[1;34m(self, filename)\u001B[0m\n\u001B[0;32m 26\u001B[0m filename \u001B[38;5;241m=\u001B[39m filename \u001B[38;5;241m+\u001B[39m \u001B[38;5;124m'\u001B[39m\u001B[38;5;124m.json\u001B[39m\u001B[38;5;124m'\u001B[39m\n\u001B[0;32m 28\u001B[0m filepath \u001B[38;5;241m=\u001B[39m os\u001B[38;5;241m.\u001B[39mpath\u001B[38;5;241m.\u001B[39mjoin(\u001B[38;5;28mself\u001B[39m\u001B[38;5;241m.\u001B[39mparams_dir, filename)\n\u001B[1;32m---> 30\u001B[0m \u001B[38;5;28;01mwith\u001B[39;00m \u001B[38;5;28;43mopen\u001B[39;49m\u001B[43m(\u001B[49m\u001B[43mfilepath\u001B[49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mr\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m,\u001B[49m\u001B[43m \u001B[49m\u001B[43mencoding\u001B[49m\u001B[38;5;241;43m=\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[38;5;124;43mutf-8\u001B[39;49m\u001B[38;5;124;43m'\u001B[39;49m\u001B[43m)\u001B[49m \u001B[38;5;28;01mas\u001B[39;00m f:\n\u001B[0;32m 31\u001B[0m params \u001B[38;5;241m=\u001B[39m json\u001B[38;5;241m.\u001B[39mload(f)\n\u001B[0;32m 32\u001B[0m \u001B[38;5;28;01mreturn\u001B[39;00m params\n", + "\u001B[1;31mFileNotFoundError\u001B[0m: [Errno 2] No such file or directory: '../AWG\\\\AWG_NCO.json'" + ] + } + ], + "execution_count": 27 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T09:58:53.153981Z", + "start_time": "2026-07-20T09:58:53.070674Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_FM_NCO\n", + "run_case({\n", + " 'chip_mode': 'AWG_FM_NCO',\n", + " 'instr_type': 'awg_fm_nco',\n", + " 'fcw': [100, 200, 300, 400], # MHz\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_pha': 0,\n", + " 'code_clr': [True] * 4,\n", + " 'mcu_reg_clr': True,\n", + " 'envelope_configs': [\n", + " {'envelope_type': 'rect_hold', 'amp': 32767}, \n", + " ],\n", + " 'codeword_configs': [\n", + " {'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 0},\n", + " ],\n", + " 'instr_show': False,\n", + " 'FolderName': 'AWG',\n", + " 'CaseName': 'AWG_FM_NCO',\n", + "})" + ], + "id": "1edc534637d8aed5", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG\\AWG_FM_NCO_HEX.txt\n" + ] + } + ], + "execution_count": 122 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T04:51:31.802180Z", + "start_time": "2026-07-20T04:51:31.703519Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_FMNCO_freq_scan\n", + "freq_list = [0.05, 50, 250, 500, 750]\n", + "pm_load = ParamsManager('../AWG')\n", + "\n", + "for fcw in freq_list:\n", + " params = pm_load.load('AWG_FM_NCO')\n", + " params['fcw'][0] = fcw\n", + " params.update({\n", + " 'FolderName': 'AWG_fmNCO_freq_scan',\n", + " 'CaseName': f\"tc_fmnco_freq_scan_{fcw}MHz\",\n", + " })\n", + " run_case(params)" + ], + "id": "fc315ff504df041b", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_fmNCO_freq_scan\\tc_fmnco_freq_scan_0.05MHz_HEX.txt\n", + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_fmNCO_freq_scan\\tc_fmnco_freq_scan_50MHz_HEX.txt\n", + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_fmNCO_freq_scan\\tc_fmnco_freq_scan_250MHz_HEX.txt\n", + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_fmNCO_freq_scan\\tc_fmnco_freq_scan_500MHz_HEX.txt\n", + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_fmNCO_freq_scan\\tc_fmnco_freq_scan_750MHz_HEX.txt\n" + ] + } + ], + "execution_count": 93 + }, + { + "metadata": {}, + "cell_type": "code", + "outputs": [], + "execution_count": null, + "source": [ + "# AWG_FMNCO_phase_scan\n", + "phase_list = [0, 0.05, 5, 22.5, 45, 67.5, 90, 112.5, 135, 157.5, 180]\n", + "pm_load = ParamsManager('../AWG')\n", + "\n", + "for pcw in phase_list:\n", + " params = pm_load.load('AWG_FM_NCO')\n", + " params['pcw'][0] = pcw\n", + " params.update({\n", + " 'FolderName': 'AWG_fmNCO_pha_scan',\n", + " 'CaseName': f\"tc_fmnco_pha_scan_{pcw}deg\",\n", + " })\n", + " \n", + " run_case(params)" + ], + "id": "9c6fa8c1da53a8ae" + }, + { + "metadata": {}, + "cell_type": "markdown", + "source": [ + "### AWG 直通包络与调制模式 (`AWG_ENV` / `AWG_MOD`)\n", + "\n", + "用于输出复杂的包络信号或调制信号。通过灵活的开关控制幅度、频率与偏置，可实现跳频扫描、相位扫描等动态测试 Case。 \n", + "\n", + "| **核心配置参数** | **参数类型/示例** | **参数详细含义及作用** |\n", + "| ---------------------------- | -------------------------- |--------------------------------------------------------------------------------------------------------------|\n", + "| **`amp_mod_enable`** | 布尔值 (`true`/`false`) | **幅度调制使能**：为 `true` 时，开启幅度控制，Python 会将幅度相关数组搬移至 DTCM 并控制 `300104` 寄存器。 |\n", + "| **`freq_mod_enable`** | 布尔值 (`true`/`false`) | **频率调制使能**：为 `true` 时，开启频率调制，也就是打开NCO,Python会自动获取频率相关参数写到DTCM中，控制 `300104` 寄存器。 |\n", + "| **`bias_enable`** | 布尔值 (`true`/`false`) | **偏置调制使能**：为true时，开启频率调制，获取直流偏置（Bias）参数写到DTCM中。 |\n", + "| **`fm_enable`** | 布尔值 (`true`/`false`) | **双音频调制使能**：若为 `true`，底层将在 DTCM 中对应mcu_regfile的双音频点使能寄存器上写入 1。 |\n", + "| **`envelope_configs`** | 结构体数组 | **包络形态形态库**：可以配置多种包络类型（如 `rect`、`flattop`、`cosine` 等），包含每种包络的幅值 `amp`、脉宽 `wave_time` 以及上升/下降沿时间 `edge_time`。 |\n", + "| **`ff_amp` / `fm_amp`** | 数组 (如 `[32767, 32767]`) | **单音NCO幅度 /双音NCO幅度列表**：提供给幅度调制器使用，幅度数组控制字，低16位是基频NCO的幅度，高16位给倍频的NCO的幅度。 |\n", + "| **`bias`** | 数组 (如 `[0, 0, 0, 0]`) | **偏置参数列表**：对应偏置通道的一组偏置控制字。 |\n", + "| **`rz_ff_pha` / `rz_fm_pha`** | 整数 (如 `0`, `45`) | **附加相位寄存器**：低16位是基频NCO的附加相位 ，高16位给倍频的NCO的附加相位。 |\n", + "| **`env_start`** | 整数 (如 `0`, `4`) | **包络起始索引**：MCU参数。指示 MCU 在开始发送脉冲串时，从 `codeword_configs`（或包络库）的第几个索引位置开始读取配置并进行发射。 |\n", + "| **`env_num`** | 整数 | **单轮发射的包络个数**：MCU参数。指示在内层循环中，**一轮需要连续发射多少个脉冲波形**。例如填 `4` 就会顺序把 `env_start` 往后的 4 个包络打出去。 |\n", + "| **`cycle_num`** | 整数 (如 `0`) | **大循环次数（轮数）**：MCU参数。指示这一整套脉冲波形串（包含 `env_num` 个包络的波形）整体需要**重复循环打多少大轮**。通常填 `0` 可能代表无限持续循环发射。 |\n", + "| **`codeword_configs`** | 结构体数组 | **码字**：MCU参数。可以放多个码字数组，一个码字对应一个波形，可以实现扫频，扫相，扫幅序列。 |\n", + "| **`send_interval`** | 数组 (如 `[175, 175]`) | **发送时间间隔**：MCU参数。定义了序列中**每一个脉冲发射完毕后，硬件需要等待多少个时钟周期**才允许发射下一个脉冲。内层循环里，每一个包络（脉冲）发送完毕后的等待间隔。 |" + ], + "id": "43eac70b7b0501a0" + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:36:39.733821Z", + "start_time": "2026-07-20T07:36:39.642577Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_ENV_HOLD\n", + "amp = 32767\n", + "wait_num = 100\n", + "send_time = 0\n", + "\n", + "run_case({\n", + " 'chip_mode': 'AWG_ENV',\n", + " 'instr_type': 'awg_env',\n", + " 'amp': amp,\n", + " 'envelope_configs': [\n", + " {'envelope_type': 'rect_hold', 'amp': 32767},\n", + " {'envelope_type': 'flattop_hold', 'amp': 32767, 'edge_time': 3.5, 'wave_time': 30},\n", + " ],\n", + " 'wait_num': wait_num,\n", + " 'send_time': send_time,\n", + " 'instr_show': False,\n", + " 'FolderName': '2509_Test/ENV',\n", + " 'CaseName': f\"AWG_ENV_rect_amp_{amp}_wait_{wait_num}_send_{send_time}\",\n", + "})" + ], + "id": "77fbf58eacb031f7", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\2509_Test\\ENV\\AWG_ENV_rect_amp_32767_wait_100_send_0_HEX.txt\n" + ] + } + ], + "execution_count": 106 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:25:06.777016Z", + "start_time": "2026-07-20T07:25:06.690830Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_MOD_NCO\n", + "#没什么用的CASE，汇编模板awg_mod_nco发了两个码字一个是波形保持，一个是波形不保持，NCO清零也有区别，不知道是测什么的。\n", + "fcw_0 = 100\n", + "\n", + "params = {\n", + " 'chip_mode': 'AWG_MOD',\n", + " 'instr_type': 'awg_mod_nco',\n", + " 'env_amp': 32767,\n", + " 'amp_mod_enable': True,\n", + " 'freq_mod_enable': True,\n", + " 'bias_enable': True,\n", + " 'fm_enable': False,\n", + " 'fcw': [fcw_0, 200, 300, 400], # MHz\n", + " 'mcu_reg_clr': True,\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_ff_pha': 0,\n", + " 'rz_fm_pha': 45,\n", + " 'ff_amp': [16384, 32767, 32767, 32767],\n", + " 'fm_amp': [32767, 32767, 32767, 32767],\n", + " 'bias': [0, 0, 0, 0],\n", + " 'instr_show': False,\n", + " 'FolderName': '2509_Test/MOD',\n", + " 'CaseName': f\"AWG_MOD_NCO_freq_{fcw_0}MHz\",\n", + "}\n", + "\n", + "# 1. 先用 run_case 执行通用逻辑（配置芯片、触发 instruction_config、保存 JSON）\n", + "# 设 write_hw=False 避免触发默认的 rw_once\n", + "run_case(params, write_hw=False)\n", + "\n", + "# 2. 补上该模式特有的寄存器写入操作\n", + "env_amp = params['env_amp']\n", + "mk.rw_once('w', addr_base['ENVM0_BASE'], [env_amp << 16 | env_amp] * 2, params['config_file'])\n", + "mk.rw_once('w', addr_base['ENVI0_BASE'], [4], params['config_file'])" + ], + "id": "83a2c98dd434fe71", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\2509_Test\\MOD\\AWG_MOD_NCO_freq_100MHz_HEX.txt\n" + ] + } + ], + "execution_count": 105 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T09:08:37.387229Z", + "start_time": "2026-07-20T09:08:37.293651Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_ENV\n", + "run_case({\n", + " 'chip_mode': 'AWG_ENV',\n", + " 'instr_type': 'general_send_wait',\n", + " 'inner_sync': True,\n", + " 'envelope_configs': [\n", + " {'envelope_type': 'rect_hold', 'amp': 32767},\n", + " {'envelope_type': 'flattop_hold', 'amp': 32767, 'edge_time': 3.5, 'wave_time': 30},\n", + " {'envelope_type': 'acz', 'amp': 32767, 'wave_time': 12 * 4},\n", + " {'envelope_type': 'accz', 'wave_time': 12 * 4},\n", + " {'envelope_type': 'cosine', 'amp': 32767, 'wave_time': 12 * 25},\n", + " {'envelope_type': 'rect', 'amp': 32767, 'wave_time': 12},\n", + " {'envelope_type': 'flattop', 'amp': 32767, 'edge_time': 2, 'wave_time': 22},\n", + " ],\n", + " 'amp_mod_enable': True,\n", + " 'freq_mod_enable': True,\n", + " 'bias_enable': True,\n", + " 'fm_enable': False,\n", + " 'fcw': [100, 200, 300, 400], # MHz\n", + " 'mcu_reg_clr': False,\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_ff_pha': 0,\n", + " 'rz_fm_pha': 45,\n", + " 'ff_amp': [32767, 32767, 32767, 32767],\n", + " 'fm_amp': [32767, 32767, 32767, 32767],\n", + " 'bias': [0, 0, 0, 0],\n", + " 'env_start': 0,\n", + " 'env_num': 2,\n", + " 'cycle_num': 0,\n", + " 'codeword_configs': [\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 0},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 1},\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 2},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 3},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 4},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 5},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 6},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 7},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 8},\n", + " ],\n", + " 'send_interval': [100, 150, 200, 250, 300, 350, 400,450,500],\n", + " 'instr_show': False,\n", + " 'FolderName': 'AWG_ENV',\n", + " 'CaseName': 'AWG_ENV',\n", + "})" + ], + "id": "da23fc85299e14aa", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG_ENV\\AWG_ENV_HEX.txt\n" + ] + } + ], + "execution_count": 109 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T04:55:43.059023Z", + "start_time": "2026-07-20T04:55:42.972377Z" + } + }, + "cell_type": "code", + "source": [ + "# AWG_MOD\n", + "run_case({\n", + " 'chip_mode': 'AWG_MOD',\n", + " 'instr_type': 'awg_mod',\n", + " 'envelope_configs': [\n", + " {'envelope_type': 'rect_hold', 'amp': 32767},\n", + " {'envelope_type': 'flattop_hold', 'amp': 32767, 'edge_time': 3.5, 'wave_time': 30},\n", + " {'envelope_type': 'acz', 'amp': 32767, 'wave_time': 12 * 4},\n", + " {'envelope_type': 'accz', 'wave_time': 12 * 4},\n", + " {'envelope_type': 'cosine', 'amp': 32767, 'wave_time': 12 * 25},\n", + " {'envelope_type': 'rect', 'amp': 32767, 'wave_time': 12},\n", + " {'envelope_type': 'flattop', 'amp': 32767, 'edge_time': 2, 'wave_time': 22},\n", + " ],\n", + " 'amp_mod_enable': True,\n", + " 'freq_mod_enable': True,\n", + " 'bias_enable': True,\n", + " 'fm_enable': False,\n", + " 'fcw': [100, 200, 300, 400], # MHz\n", + " 'mcu_reg_clr': False,\n", + " 'pcw': [0, 30, 45, 90, 120, 135, 150, 180], # Deg \n", + " 'rz_ff_pha': 0,\n", + " 'rz_fm_pha': 45,\n", + " 'ff_amp': [32767, 32767, 32767, 32767],\n", + " 'fm_amp': [32767, 32767, 32767, 32767],\n", + " 'bias': [0, 0, 0, 0],\n", + " 'env_start': 0,\n", + " 'env_num': 2,\n", + " 'cycle_num': 0,\n", + " 'codeword_configs': [\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 0},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 1},\n", + " {'wave_hold': 1, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 2},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 0, 'env_index': 3},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 4},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 5},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 6},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 7},\n", + " {'wave_hold': 0, 'fcw_index': 0, 'pcw_index': 0, 'code_clr': 1, 'env_index': 8},\n", + " ],\n", + " 'send_interval': [100, 150, 200, 250, 300, 350, 400],\n", + " 'instr_show': False,\n", + " 'FolderName': 'AWG',\n", + " 'CaseName': 'AWG_MOD',\n", + "})" + ], + "id": "786778e573a8c8f4", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了env_config\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\AWG\\AWG_MOD_HEX.txt\n" + ] + } + ], + "execution_count": 98 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:08:14.751425Z", + "start_time": "2026-07-20T07:08:14.622236Z" + } + }, + "cell_type": "code", + "source": [ + "params = {\n", + " 'instr_type': 'mul_16x16',\n", + " 'instr_show': False,\n", + " 'inner_sync': True,\n", + " 'mult_a': [0, 1, 2, 3, 4, 5, 6],\n", + " 'mult_b': [0, 1, 2, 3, 4, 5, 6],\n", + " 'mult_nums': 7,\n", + " 'FolderName': 'MUL',\n", + " 'CaseName': 'MUL_16x16',\n", + "}\n", + "\n", + "run_case(params)" + ], + "id": "7639673cece22d93", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + "执行了instruction_config\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\MUL\\MUL_16x16_HEX.txt\n" + ] + } + ], + "execution_count": 99 + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:08:47.821972Z", + "start_time": "2026-07-20T07:08:47.737074Z" + } + }, + "cell_type": "code", + "source": [ + "# CLK_CONFIG\n", + "params = {\n", + " 'FolderName': 'CONFIG',\n", + " 'CaseName': 'CLK_CONFIG_POS_EDGE_6G',\n", + " 'custom_registers': [\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x5c:x}\", str(0x800)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x58:x}\", str(0x22996)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x50:x}\", str(0x10000)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x74:x}\", str(0xfffe)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x54:x}\", str(0x35020000)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x5d:x}\", str(0x801)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x50:x}\", str(0x10000)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x5c:x}\", str(0x9ff)),\n", + " (f\"0x{addr_base['INTP_BASE'] + 0x74:x}\", str(0xffff)),\n", + " ],\n", + "}\n", + "\n", + "run_case(params)" + ], + "id": "b1eba0e3afa1312f", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\CONFIG\\CLK_CONFIG_POS_EDGE_6G_HEX.txt\n" + ] + } + ], + "execution_count": 100 + }, + { + "metadata": {}, + "cell_type": "code", + "outputs": [], + "execution_count": null, + "source": [ + "# DEM_CONFIG\n", + "params = {\n", + " 'FolderName': 'CONFIG',\n", + " 'CaseName': 'DEM_OFF',\n", + " 'custom_registers': [\n", + " (f\"0x{addr_base['DACR0_BASE'] + 0x30:x}\", [0] * 4),\n", + " ],\n", + "}\n", + "\n", + "run_case(params)" + ], + "id": "5d668223bf2eaf25" + }, + { + "metadata": { + "ExecuteTime": { + "end_time": "2026-07-20T07:09:57.530948Z", + "start_time": "2026-07-20T07:09:57.438172Z" + } + }, + "cell_type": "code", + "source": [ + "# DEBUG_MEM_CLEAR\n", + "params = {\n", + " 'FolderName': 'CONFIG',\n", + " 'CaseName': 'DEBUG_MEM_CLEAR',\n", + " 'custom_registers': [\n", + " (f\"{addr_base['DBGM_BASE']}\", [0] * 2048),\n", + " ],\n", + "}\n", + "\n", + "run_case(params)" + ], + "id": "23f3cb029dfe92ec", + "outputs": [ + { + "name": "stdout", + "output_type": "stream", + "text": [ + "执行了configure_chip_output\n", + " 生成：D:\\recent_work\\Z-Chip _case_generator\\CONFIG\\DEBUG_MEM_CLEAR_HEX.txt\n" + ] + } + ], + "execution_count": 101 + } + ], + "metadata": { + "kernelspec": { + "display_name": "Python 3", + "language": "python", + "name": "python3" + }, + "language_info": { + "codemirror_mode": { + "name": "ipython", + "version": 2 + }, + "file_extension": ".py", + "mimetype": "text/x-python", + "name": "python", + "nbconvert_exporter": "python", + "pygments_lexer": "ipython2", + "version": "2.7.6" + } + }, + "nbformat": 4, + "nbformat_minor": 5 +}