unknown 9dcfcd4028 v01-.v files convert reg to wire;.m files include diff and sqt both less than 1e-4		2024-11-26 20:38:29 +08:00
..
FixRound.v	v01-add round module;intp8 and mult_C using round;Modify the directory structure	2024-11-26 13:34:17 +08:00
IIR_Filter.v	v01-.v files convert reg to wire;.m files include diff and sqt both less than 1e-4	2024-11-26 20:38:29 +08:00
MeanIntp_8.v	v01-add round module;intp8 and mult_C using round;Modify the directory structure	2024-11-26 13:34:17 +08:00
TailCorr_top.v	v01-add round module;intp8 and mult_C using round;Modify the directory structure	2024-11-26 13:34:17 +08:00
diff.v	v01-add round module;intp8 and mult_C using round;Modify the directory structure	2024-11-26 13:34:17 +08:00
mult_C.v	v01-.v files convert reg to wire;.m files include diff and sqt both less than 1e-4	2024-11-26 20:38:29 +08:00
z_dsp.v	v01-z_dsp delay width debug;add z_dsp.m add diff_plot_py.m	2024-11-26 17:57:19 +08:00