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DW02_mult.v
|
add 8 interpolation
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2024-10-08 11:24:32 +08:00 |
|
DW_iir_dc.v
|
v04-IIR based on IP core
|
2024-11-09 17:13:18 +08:00 |
|
DW_mult_pipe.v
|
add 8 interpolation
|
2024-10-08 11:24:32 +08:00 |
|
IIR_Filter.v
|
add 8 interpolation
|
2024-10-08 11:24:32 +08:00 |
|
TailCorr_top.v
|
v04-round
|
2024-11-11 17:17:15 +08:00 |
|
diff.v
|
add 8 interpolation
|
2024-10-08 11:24:32 +08:00 |
|
mult_C.v
|
add 8 interpolation
|
2024-10-08 11:24:32 +08:00 |
|
z_data_mux.v
|
add 8 interpolation
|
2024-10-08 11:24:32 +08:00 |
|
z_dsp.edf
|
v04-synthesis z_dsp
|
2024-11-10 11:14:47 +08:00 |
|
z_dsp.v
|
v04-eliminate warning
|
2024-11-09 17:51:37 +08:00 |
|
z_dsp_en_Test.v
|
Enable of clk_div2 tested on FPGA
|
2024-11-07 10:57:58 +08:00 |
|
z_dsp_wrapper.v
|
v04-synthesis z_dsp
|
2024-11-10 11:14:47 +08:00 |