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TailCorr
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拖尾矫正
8 Commits 4 Branches 0 Tags 22 MiB
Verilog 80.6%
SystemVerilog 13.1%
MATLAB 3.5%
Coq 1.2%
Makefile 1.1%
Other 0.5%
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thfu 6afc50b856 验证使能信号为时钟二分频的可能性 2025-03-08 17:20:21 +08:00
rtl 验证使能信号为时钟二分频的可能性 2025-03-08 17:20:21 +08:00
script_m 增加了matlab中的八倍内插模块，来验证rtl代码的准确性 2025-03-08 17:20:21 +08:00
sim 增加了matlab中的八倍内插模块，来验证rtl代码的准确性 2025-03-08 17:20:21 +08:00
tb 验证使能信号为时钟二分频的可能性 2025-03-08 17:20:21 +08:00