module mult_C(
		 	a,
			b,
			c,
			d,
			Re,
			Im
);

parameter	integer A_width = 8;
parameter	integer B_width = 8;
parameter	integer C_width = 8;
parameter	integer D_width = 8;

input signed [A_width-1:0] a;
input signed [B_width-1:0] b;
input signed [C_width-1:0] c;
input signed [D_width-1:0] d;

output signed [A_width+C_width:0] Re;
output signed [A_width+D_width:0] Im;

wire	signed	[A_width+C_width-1:0]	ac;
wire	signed	[B_width+D_width-1:0]	bd;
wire	signed	[A_width+D_width-1:0]	ad;
wire	signed	[B_width+C_width-1:0]	bc;

DW02_mult	#(A_width,C_width) inst_c1(	.A		(a		),
						.B		(c		),
						.TC		(1'b1		),
						.PRODUCT	(ac		)
				);

DW02_mult	#(B_width,D_width) inst_c2(	.A		(b		),
						.B		(d		),
						.TC		(1'b1		),
						.PRODUCT	(bd		)
				);

DW02_mult	#(A_width,D_width) inst_c3(	.A		(a		),
						.B		(d		),
						.TC		(1'b1		),
						.PRODUCT	(ad		)
				);
DW02_mult	#(B_width,C_width) inst_c4(	.A		(b		),
						.B		(c		),
						.TC		(1'b1		),
						.PRODUCT	(bc		)
				);
assign	Re = ac - bd;
assign	Im = ad + bc;

endmodule