module TB();

initial
begin
     $fsdbDumpfile("TB.fsdb");
     $fsdbDumpvars(0, TB);
end

reg		clk;
reg		rstn;
reg	[15:0]	din_in;	
reg	[21:0]	cnt;


initial	begin

		#0;
		rstn	= 1'b0;
		clk =  1'b0;
		din_in  =	1'b0; 

		#3400;
		rstn	=	 1'b1;
		din_in  =	 1'b1; 

		#6400;
		rstn	=	 1'b1;
		din_in  =	 1'b0; 

end

always #200 clk = ~clk;


always@(posedge clk or negedge rstn)
		if(!rstn)
			cnt	<=	22'd0;
		else
			cnt	<=	cnt + 22'd1;


initial	begin
	wait(cnt[16]==1'b1)
			$finish(0);
end

reg	[47:0]		fcw;


diff		inst_diff
               (
		        .clk			(clk	                ),
		        .rstn			(rstn			),
		        .din			(din_in                 ),                        
		        .dout			(dout_p0                )
                );

endmodule