module TB();
//+FHDR--------------------------------------------------------------------------------------------------------
//  Company: 
//-----------------------------------------------------------------------------------------------------------------
//  File Name             :    tb_TailCorr_en.v
//  Department            :    HFNL
//  Author                :    thfu
//  Author's Tel          :     
//-----------------------------------------------------------------------------------------------------------------
//  Relese History
//  Version     Date            Author          Description
//              2025-03-03      thfu
//-----------------------------------------------------------------------------------------------------------------
//  Keywords            :       
//
//-----------------------------------------------------------------------------------------------------------------
//  Parameter
//
//-----------------------------------------------------------------------------------------------------------------
//  Purpose                 :
//                      
//-----------------------------------------------------------------------------------------------------------------
//  Target Device:        
//  Tool versions:        
//-----------------------------------------------------------------------------------------------------------------
//  Reuse Issues
//  Reset Strategy: 
//  Clock Domains: 
//  Critical Timing:
//  Asynchronous I/F:
//  Synthesizable (y/n): 
//  Other:
//-FHDR--------------------------------------------------------------------------------------------------------


reg    [1 :0]  source_mode;

initial
begin
     $fsdbDumpfile("TB.fsdb");
     $fsdbDumpvars(0, TB);
     $fsdbDumpMDA();
//     $srandom(417492050);
     source_mode  =  2'd3;  //1 for rect;2 for random;3 from matlab
end


reg             rstn;
reg	[31:0]   a_re0;
reg	[31:0]   a_im0;
reg	[31:0]   b_re0;
reg	[31:0]   b_im0;
reg	[31:0]   ab_re0;
reg	[31:0]   ab_im0;
reg	[31:0]   abb_re0;
reg	[31:0]   abb_im0;
reg	[31:0]   ab_pow3_re0;
reg	[31:0]   ab_pow3_im0;
reg	[31:0]   ab_pow4_re0;
reg	[31:0]   ab_pow4_im0;
reg	[31:0]   ab_pow5_re0;
reg	[31:0]   ab_pow5_im0;
reg	[31:0]   ab_pow6_re0;
reg	[31:0]   ab_pow6_im0;
reg	[31:0]   ab_pow7_re0;
reg	[31:0]   ab_pow7_im0;
reg	[31:0]   b_pow8_re0;
reg	[31:0]   b_pow8_im0;
reg	[31:0]   a_re1;
reg	[31:0]   a_im1;
reg	[31:0]   b_re1;
reg	[31:0]   b_im1;
reg	[31:0]   ab_re1;
reg	[31:0]   ab_im1;
reg	[31:0]   abb_re1;
reg	[31:0]   abb_im1;
reg	[31:0]   ab_pow3_re1;
reg	[31:0]   ab_pow3_im1;
reg	[31:0]   ab_pow4_re1;
reg	[31:0]   ab_pow4_im1;
reg	[31:0]   ab_pow5_re1;
reg	[31:0]   ab_pow5_im1;
reg	[31:0]   ab_pow6_re1;
reg	[31:0]   ab_pow6_im1;
reg	[31:0]   ab_pow7_re1;
reg	[31:0]   ab_pow7_im1;
reg	[31:0]   b_pow8_re1;
reg	[31:0]   b_pow8_im1;
reg	[31:0]   a_re2;
reg	[31:0]   a_im2;
reg	[31:0]   b_re2;
reg	[31:0]   b_im2;
reg	[31:0]   ab_re2;
reg	[31:0]   ab_im2;
reg	[31:0]   abb_re2;
reg	[31:0]   abb_im2;
reg	[31:0]   ab_pow3_re2;
reg	[31:0]   ab_pow3_im2;
reg	[31:0]   ab_pow4_re2;
reg	[31:0]   ab_pow4_im2;
reg	[31:0]   ab_pow5_re2;
reg	[31:0]   ab_pow5_im2;
reg	[31:0]   ab_pow6_re2;
reg	[31:0]   ab_pow6_im2;
reg	[31:0]   ab_pow7_re2;
reg	[31:0]   ab_pow7_im2;
reg	[31:0]   b_pow8_re2;
reg	[31:0]   b_pow8_im2;
reg	[31:0]   a_re3;
reg	[31:0]   a_im3;
reg	[31:0]   b_re3;
reg	[31:0]   b_im3;
reg	[31:0]   ab_re3;
reg	[31:0]   ab_im3;
reg	[31:0]   abb_re3;
reg	[31:0]   abb_im3;
reg	[31:0]   ab_pow3_re3;
reg	[31:0]   ab_pow3_im3;
reg	[31:0]   ab_pow4_re3;
reg	[31:0]   ab_pow4_im3;
reg	[31:0]   ab_pow5_re3;
reg	[31:0]   ab_pow5_im3;
reg	[31:0]   ab_pow6_re3;
reg	[31:0]   ab_pow6_im3;
reg	[31:0]   ab_pow7_re3;
reg	[31:0]   ab_pow7_im3;
reg	[31:0]   b_pow8_re3;
reg	[31:0]   b_pow8_im3;
reg	[31:0]   a_re4;
reg	[31:0]   a_im4;
reg	[31:0]   b_re4;
reg	[31:0]   b_im4;
reg	[31:0]   ab_re4;
reg	[31:0]   ab_im4;
reg	[31:0]   abb_re4;
reg	[31:0]   abb_im4;
reg	[31:0]   ab_pow3_re4;
reg	[31:0]   ab_pow3_im4;
reg	[31:0]   ab_pow4_re4;
reg	[31:0]   ab_pow4_im4;
reg	[31:0]   ab_pow5_re4;
reg	[31:0]   ab_pow5_im4;
reg	[31:0]   ab_pow6_re4;
reg	[31:0]   ab_pow6_im4;
reg	[31:0]   ab_pow7_re4;
reg	[31:0]   ab_pow7_im4;
reg	[31:0]   b_pow8_re4;
reg	[31:0]   b_pow8_im4;
reg	[31:0]   a_re5;
reg	[31:0]   a_im5;
reg	[31:0]   b_re5;
reg	[31:0]   b_im5;
reg	[31:0]   ab_re5;
reg	[31:0]   ab_im5;
reg	[31:0]   abb_re5;
reg	[31:0]   abb_im5;
reg	[31:0]   ab_pow3_re5;
reg	[31:0]   ab_pow3_im5;
reg	[31:0]   ab_pow4_re5;
reg	[31:0]   ab_pow4_im5;
reg	[31:0]   ab_pow5_re5;
reg	[31:0]   ab_pow5_im5;
reg	[31:0]   ab_pow6_re5;
reg	[31:0]   ab_pow6_im5;
reg	[31:0]   ab_pow7_re5;
reg	[31:0]   ab_pow7_im5;
reg	[31:0]   b_pow8_re5;
reg	[31:0]   b_pow8_im5;



reg     [15:0]  din_rect;


reg             clk;

initial 
begin
                #0;
                rstn    =         1'b0;
                clk     =         1'b0;

                a_re0   =        32'd55007237;
                a_re1   =        32'd32690030;
                a_re2   =        32'd429516;
                a_re3   =        32'd0;
                a_re4   =        32'd0;
                a_re5   =        32'd0;
                a_im0   =        32'd0;
                a_im1   =        32'd0;
                a_im2   =        32'd0;
                a_im3   =        32'd0;
                a_im4   =        32'd0;
                a_im5   =        32'd0;
                b_re0   =        32'd2143083068;
                b_re1   =        32'd2145807236;
                b_re2   =        32'd2146812530;
                b_re3   =        32'd2147483648;
                b_re4   =        32'd0;
                b_re5   =        32'd0;
                b_im0   =        32'd0;
                b_im1   =        32'd0;
                b_im2   =        32'd0;
                b_im3   =        32'd0;
                b_im4   =        32'd0;
                b_im5   =        32'd0;
                ab_re0   =        32'd54894517;
                ab_re1   =        32'd32664510;
                ab_re2   =        32'd429381  ; 
                ab_re3   =        32'd0;
                ab_re4   =        32'd0;
                ab_re5   =        32'd0;
                ab_im0   =        32'd0;
                ab_im1   =        32'd0;
                ab_im2   =        32'd0;
                ab_im3   =        32'd0;
                ab_im4   =        32'd0;
                ab_im5   =        32'd0;
                abb_re0   =        32'd54782028;
                abb_re1   =        32'd32639011;
                abb_re2   =        32'd429247  ;
                abb_re3   =        32'd0;
                abb_re4   =        32'd0;
                abb_re5   =        32'd0;
                abb_im0   =        32'd0;
                abb_im1   =        32'd0;
                abb_im2   =        32'd0;
                abb_im3   =        32'd0;
                abb_im4   =        32'd0;
                abb_im5   =        32'd0;
                ab_pow3_re0   =        32'd54669770;
                ab_pow3_re1   =        32'd32613532;
                ab_pow3_re2   =        32'd429113  ;
                ab_pow3_re3   =        32'd0;
                ab_pow3_re4   =        32'd0;
                ab_pow3_re5   =        32'd0;
                ab_pow3_im0   =        32'd0;
                ab_pow3_im1   =        32'd0;
                ab_pow3_im2   =        32'd0;
                ab_pow3_im3   =        32'd0;
                ab_pow3_im4   =        32'd0;
                ab_pow3_im5   =        32'd0;
                ab_pow4_re0   =        32'd54557742;
                ab_pow4_re1   =        32'd32588072;
                ab_pow4_re2   =        32'd428979  ;
                ab_pow4_re3   =        32'd0;
                ab_pow4_re4   =        32'd0;
                ab_pow4_re5   =        32'd0;
                ab_pow4_im0   =        32'd0;
                ab_pow4_im1   =        32'd0;
                ab_pow4_im2   =        32'd0;
                ab_pow4_im3   =        32'd0;
                ab_pow4_im4   =        32'd0;
                ab_pow4_im5   =        32'd0;
                ab_pow5_re0   =        32'd54445943;
                ab_pow5_re1   =        32'd32562633;
                ab_pow5_re2   =        32'd428845  ;
                ab_pow5_re3   =        32'd0;
                ab_pow5_re4   =        32'd0;
                ab_pow5_re5   =        32'd0;
                ab_pow5_im0   =        32'd0;
                ab_pow5_im1   =        32'd0;
                ab_pow5_im2   =        32'd0;
                ab_pow5_im3   =        32'd0;
                ab_pow5_im4   =        32'd0;
                ab_pow5_im5   =        32'd0;
                ab_pow6_re0   =        32'd54334374;
                ab_pow6_re1   =        32'd32537213;
                ab_pow6_re2   =        32'd428711  ;
                ab_pow6_re3   =        32'd0;
                ab_pow6_re4   =        32'd0;
                ab_pow6_re5   =        32'd0;
                ab_pow6_im0   =        32'd0;
                ab_pow6_im1   =        32'd0;
                ab_pow6_im2   =        32'd0;
                ab_pow6_im3   =        32'd0;
                ab_pow6_im4   =        32'd0;
                ab_pow6_im5   =        32'd0;
                ab_pow7_re0   =        32'd54223033;
                ab_pow7_re1   =        32'd32511813;
                ab_pow7_re2   =        32'd428577  ;
                ab_pow7_re3   =        32'd0;
                ab_pow7_re4   =        32'd0;
                ab_pow7_re5   =        32'd0;
                ab_pow7_im0   =        32'd0;
                ab_pow7_im1   =        32'd0;
                ab_pow7_im2   =        32'd0;
                ab_pow7_im3   =        32'd0;
                ab_pow7_im4   =        32'd0;
                ab_pow7_im5   =        32'd0;

                b_pow8_re0   =        32'd2112530470;
                b_pow8_re1   =        32'd2134108939;
                b_pow8_re2   =        32'd2142120573;
                b_pow8_re3   =        32'd2147483648;
                b_pow8_re4   =        32'd0;
                b_pow8_re5   =        32'd0;
                b_pow8_im0   =        32'd0;
                b_pow8_im1   =        32'd0;
                b_pow8_im2   =        32'd0;
                b_pow8_im3   =        32'd0;
                b_pow8_im4   =        32'd0;
                b_pow8_im5   =        32'd0;

                din_rect  =      16'd0; 

                #300;
                rstn      =      1'b1;

end

always #200 clk = ~clk;

reg     [21:0]  cnt;
always@(posedge clk or negedge rstn)
                if(!rstn)
                        cnt     <=      22'd0;
                else
                        cnt     <=      cnt + 22'd1;

initial 
begin
        wait(cnt[16]==1'b1)
                        $finish(0);
end
                  
wire vldi;
assign vldi = cnt >= 100 && cnt <=10100;

reg vldi_r1;
always@(posedge clk or negedge rstn)
                if(!rstn)
                        vldi_r1        <=      1'b0;
                else 
                    begin
                        vldi_r1        <=      vldi;
                    end

always@(posedge clk or negedge rstn)
                if(!rstn)
                        din_rect        <=      22'd0;
                else if(vldi)
                    begin
                        din_rect        <=      16'd30000;
                    end
                else 
                    begin
                        din_rect        <=      16'd0;
                    end

reg  signed  [15:0]  random_in [0:3];

always @(posedge clk or negedge rstn) begin
    if (!rstn) begin
        for (int i = 0; i < 4; i = i + 1) begin
            random_in[i] <= 16'd0;
        end
    end
    else if (vldi) begin
        for (int i = 0; i < 4; i = i + 1) begin
            random_in[i] <= $urandom % 30000;
        end
    end
    else begin
        for (int i = 0; i < 4; i = i + 1) begin
            random_in[i] <= 16'd0;
        end
    end
end

integer file[3:0];
reg [15:0] data[3:0];
integer status[3:0];
reg [15:0] reg_array[3:0];
  
initial begin
    string filenames[0:3] = {"in0_matlab.dat", "in1_matlab.dat", "in2_matlab.dat", "in3_matlab.dat"};    
    for (int i = 0; i < 4; i = i + 1) begin
        file[i] = $fopen(filenames[i], "r");
        if (file[i] == 0) begin
            $display("Failed to open file: %s", filenames[i]);
            $finish;
        end
    end
end

reg  [0:0] vldi_matlab [3:0];
    always @(posedge clk or negedge rstn) begin
        if (!rstn) begin
            for (int i = 0; i < 4; i = i + 1) begin
                    reg_array[i] <= 16'd0;
                    vldi_matlab[i] <= 16'd0;
            end            
        end else  begin
            for (int i = 0; i < 4; i = i + 1) begin
                status[i] = $fscanf(file[i], "%d\n", data[i]);
                vldi_matlab[i] <= 16'd0;
                if (status[i] == 1  ) begin
                    reg_array[i] <= data[i];
                    vldi_matlab[i] <= 1'b1;
                end
                else begin
                    reg_array[i] <= 16'd0;
                    vldi_matlab[i] <= 1'b0;
                end
               
            end
        end
    end
reg signed [15:0] iir_in[3:0];

always @(*)
        case(source_mode)
               2'b01 :   begin 
                                 for (int i = 0; i < 4; i = i + 1) begin
                                         iir_in[i] = din_rect;
                                 end            
                          end
               2'b10 :   begin 
                                 for (int i = 0; i < 4; i = i + 1) begin
                                         iir_in[i] = random_in[i];
                                 end            
                          end
               2'b11 :   begin 
                                 for (int i = 0; i < 4; i = i + 1) begin
                                         iir_in[i] = reg_array[i];
                                 end            
                          end
        endcase

wire    [1:0]  intp_mode;
assign intp_mode = 2'b10;

wire    [1:0]  dac_mode_sel;
assign dac_mode_sel = 2'b00;

wire    tc_bypass;
wire    vldo;
wire    vldo_ref;

assign    tc_bypass  =  1'b0;

reg  en;
always  @(posedge clk or negedge rstn)begin
    if(rstn==1'b0)begin
        en <= 0;
    end
    else begin
        en <= ~en;
    end
end
wire signed [15:0] dout_p[7:0];
wire signed [15:0] dout_ref_p[7:0];


TailCorr_top           inst_TailCorr_top
               (
                        .clk                    (clk                  ),
                        .en                    (en                  ),
                        .rstn                   (rstn                   ),
                        .vldi                   (vldi_matlab[0]             ),
//                        .dac_mode_sel           (dac_mode_sel           ),
//                        .intp_mode              (intp_mode              ),
                       .din0                     (iir_in[0]),
                       .din1                     (iir_in[1]),
                       .din2                     (iir_in[2]),
                       .din3                     (iir_in[3]),
                       .a_re0                      (a_re0),
                       .a_im0                      (a_im0),
                       .b_re0                      (b_re0),
                       .b_im0                      (b_im0),
                       .ab_re0                      (ab_re0),
                       .ab_im0                      (ab_im0),
                       .abb_re0                      (abb_re0),
                       .abb_im0                      (abb_im0),
                       .ab_pow3_re0                      (ab_pow3_re0),
                       .ab_pow3_im0                      (ab_pow3_im0),
                       .ab_pow4_re0                      (ab_pow4_re0),
                       .ab_pow4_im0                      (ab_pow4_im0),
                       .ab_pow5_re0                      (ab_pow5_re0),
                       .ab_pow5_im0                      (ab_pow5_im0),
                       .ab_pow6_re0                      (ab_pow6_re0),
                       .ab_pow6_im0                      (ab_pow6_im0),
                       .ab_pow7_re0                      (ab_pow7_re0),
                       .ab_pow7_im0                      (ab_pow7_im0),
                       .b_pow8_re0                      (b_pow8_re0),
                       .b_pow8_im0                      (b_pow8_im0),
                       .a_re1                      (a_re1),
                       .a_im1                      (a_im1),
                       .b_re1                      (b_re1),
                       .b_im1                      (b_im1),
                       .ab_re1                      (ab_re1),
                       .ab_im1                      (ab_im1),
                       .abb_re1                      (abb_re1),
                       .abb_im1                      (abb_im1),
                       .ab_pow3_re1                      (ab_pow3_re1),
                       .ab_pow3_im1                      (ab_pow3_im1),
                       .ab_pow4_re1                      (ab_pow4_re1),
                       .ab_pow4_im1                      (ab_pow4_im1),
                       .ab_pow5_re1                      (ab_pow5_re1),
                       .ab_pow5_im1                      (ab_pow5_im1),
                       .ab_pow6_re1                      (ab_pow6_re1),
                       .ab_pow6_im1                      (ab_pow6_im1),
                       .ab_pow7_re1                      (ab_pow7_re1),
                       .ab_pow7_im1                      (ab_pow7_im1),
                       .b_pow8_re1                      (b_pow8_re1),
                       .b_pow8_im1                      (b_pow8_im1),
                       .a_re2                      (a_re2),
                       .a_im2                      (a_im2),
                       .b_re2                      (b_re2),
                       .b_im2                      (b_im2),
                       .ab_re2                      (ab_re2),
                       .ab_im2                      (ab_im2),
                       .abb_re2                      (abb_re2),
                       .abb_im2                      (abb_im2),
                       .ab_pow3_re2                      (ab_pow3_re2),
                       .ab_pow3_im2                      (ab_pow3_im2),
                       .ab_pow4_re2                      (ab_pow4_re2),
                       .ab_pow4_im2                      (ab_pow4_im2),
                       .ab_pow5_re2                      (ab_pow5_re2),
                       .ab_pow5_im2                      (ab_pow5_im2),
                       .ab_pow6_re2                      (ab_pow6_re2),
                       .ab_pow6_im2                      (ab_pow6_im2),
                       .ab_pow7_re2                      (ab_pow7_re2),
                       .ab_pow7_im2                      (ab_pow7_im2),
                       .b_pow8_re2                      (b_pow8_re2),
                       .b_pow8_im2                      (b_pow8_im2),
                       .a_re3                      (a_re3),
                       .a_im3                      (a_im3),
                       .b_re3                      (b_re3),
                       .b_im3                      (b_im3),
                       .ab_re3                      (ab_re3),
                       .ab_im3                      (ab_im3),
                       .abb_re3                      (abb_re3),
                       .abb_im3                      (abb_im3),
                       .ab_pow3_re3                      (ab_pow3_re3),
                       .ab_pow3_im3                      (ab_pow3_im3),
                       .ab_pow4_re3                      (ab_pow4_re3),
                       .ab_pow4_im3                      (ab_pow4_im3),
                       .ab_pow5_re3                      (ab_pow5_re3),
                       .ab_pow5_im3                      (ab_pow5_im3),
                       .ab_pow6_re3                      (ab_pow6_re3),
                       .ab_pow6_im3                      (ab_pow6_im3),
                       .ab_pow7_re3                      (ab_pow7_re3),
                       .ab_pow7_im3                      (ab_pow7_im3),
                       .b_pow8_re3                      (b_pow8_re3),
                       .b_pow8_im3                      (b_pow8_im3),
                       .a_re4                      (a_re4),
                       .a_im4                      (a_im4),
                       .b_re4                      (b_re4),
                       .b_im4                      (b_im4),
                       .ab_re4                      (ab_re4),
                       .ab_im4                      (ab_im4),
                       .abb_re4                      (abb_re4),
                       .abb_im4                      (abb_im4),
                       .ab_pow3_re4                      (ab_pow3_re4),
                       .ab_pow3_im4                      (ab_pow3_im4),
                       .ab_pow4_re4                      (ab_pow4_re4),
                       .ab_pow4_im4                      (ab_pow4_im4),
                       .ab_pow5_re4                      (ab_pow5_re4),
                       .ab_pow5_im4                      (ab_pow5_im4),
                       .ab_pow6_re4                      (ab_pow6_re4),
                       .ab_pow6_im4                      (ab_pow6_im4),
                       .ab_pow7_re4                      (ab_pow7_re4),
                       .ab_pow7_im4                      (ab_pow7_im4),
                       .b_pow8_re4                      (b_pow8_re4),
                       .b_pow8_im4                      (b_pow8_im4),
                       .a_re5                      (a_re5),
                       .a_im5                      (a_im5),
                       .b_re5                      (b_re5),
                       .b_im5                      (b_im5),
                       .ab_re5                      (ab_re5),
                       .ab_im5                      (ab_im5),
                       .abb_re5                      (abb_re5),
                       .abb_im5                      (abb_im5),
                       .ab_pow3_re5                      (ab_pow3_re5),
                       .ab_pow3_im5                      (ab_pow3_im5),
                       .ab_pow4_re5                      (ab_pow4_re5),
                       .ab_pow4_im5                      (ab_pow4_im5),
                       .ab_pow5_re5                      (ab_pow5_re5),
                       .ab_pow5_im5                      (ab_pow5_im5),
                       .ab_pow6_re5                      (ab_pow6_re5),
                       .ab_pow6_im5                      (ab_pow6_im5),
                       .ab_pow7_re5                      (ab_pow7_re5),
                       .ab_pow7_im5                      (ab_pow7_im5),
                       .b_pow8_re5                       (b_pow8_re5),
                       .b_pow8_im5                       (b_pow8_im5),
                        .dout_p0                  (dout_p[0]               ),
                        .dout_p1                  (dout_p[1]               ),
                        .dout_p2                  (dout_p[2]               ),
                        .dout_p3                  (dout_p[3]               ),
                        .dout_p4                  (dout_p[4]               ),
                        .dout_p5                  (dout_p[5]               ),
                        .dout_p6                  (dout_p[6]               ),
                        .dout_p7                  (dout_p[7]               ),

                        .vldo                   (vldo                       )

                );

TailCorr_top_ref           refm_TailCorr_top
               (
                        .clk                    (clk                  ),
                        .en                    (en                  ),
                        .rstn                   (rstn                   ),
                        .vldi                   (vldi_matlab[0]             ),
//                        .dac_mode_sel           (dac_mode_sel           ),
//                        .intp_mode              (intp_mode              ),
                       .din0                     (iir_in[0]),
                       .din1                     (iir_in[1]),
                       .din2                     (iir_in[2]),
                       .din3                     (iir_in[3]),
                       .a_re0                      (a_re0),
                       .a_im0                      (a_im0),
                       //.b_re0                      (b_re0),
                       //.b_im0                      (b_im0),
                       .ab_re0                      (ab_re0),
                       .ab_im0                      (ab_im0),
                       .abb_re0                      (abb_re0),
                       .abb_im0                      (abb_im0),
                       .ab_pow3_re0                      (ab_pow3_re0),
                       .ab_pow3_im0                      (ab_pow3_im0),
                       .ab_pow4_re0                      (ab_pow4_re0),
                       .ab_pow4_im0                      (ab_pow4_im0),
                       .ab_pow5_re0                      (ab_pow5_re0),
                       .ab_pow5_im0                      (ab_pow5_im0),
                       .ab_pow6_re0                      (ab_pow6_re0),
                       .ab_pow6_im0                      (ab_pow6_im0),
                       .ab_pow7_re0                      (ab_pow7_re0),
                       .ab_pow7_im0                      (ab_pow7_im0),
                       .b_pow8_re0                      (b_pow8_re0),
                       .b_pow8_im0                      (b_pow8_im0),
                       .a_re1                      (a_re1),
                       .a_im1                      (a_im1),
                       //.b_re1                      (b_re1),
                       //.b_im1                      (b_im1),
                       .ab_re1                      (ab_re1),
                       .ab_im1                      (ab_im1),
                       .abb_re1                      (abb_re1),
                       .abb_im1                      (abb_im1),
                       .ab_pow3_re1                      (ab_pow3_re1),
                       .ab_pow3_im1                      (ab_pow3_im1),
                       .ab_pow4_re1                      (ab_pow4_re1),
                       .ab_pow4_im1                      (ab_pow4_im1),
                       .ab_pow5_re1                      (ab_pow5_re1),
                       .ab_pow5_im1                      (ab_pow5_im1),
                       .ab_pow6_re1                      (ab_pow6_re1),
                       .ab_pow6_im1                      (ab_pow6_im1),
                       .ab_pow7_re1                      (ab_pow7_re1),
                       .ab_pow7_im1                      (ab_pow7_im1),
                       .b_pow8_re1                      (b_pow8_re1),
                       .b_pow8_im1                      (b_pow8_im1),
                       .a_re2                      (a_re2),
                       .a_im2                      (a_im2),
                       //.b_re2                      (b_re2),
                       //.b_im2                      (b_im2),
                       .ab_re2                      (ab_re2),
                       .ab_im2                      (ab_im2),
                       .abb_re2                      (abb_re2),
                       .abb_im2                      (abb_im2),
                       .ab_pow3_re2                      (ab_pow3_re2),
                       .ab_pow3_im2                      (ab_pow3_im2),
                       .ab_pow4_re2                      (ab_pow4_re2),
                       .ab_pow4_im2                      (ab_pow4_im2),
                       .ab_pow5_re2                      (ab_pow5_re2),
                       .ab_pow5_im2                      (ab_pow5_im2),
                       .ab_pow6_re2                      (ab_pow6_re2),
                       .ab_pow6_im2                      (ab_pow6_im2),
                       .ab_pow7_re2                      (ab_pow7_re2),
                       .ab_pow7_im2                      (ab_pow7_im2),
                       .b_pow8_re2                      (b_pow8_re2),
                       .b_pow8_im2                      (b_pow8_im2),
                       .a_re3                      (a_re3),
                       .a_im3                      (a_im3),
                       //.b_re3                      (b_re3),
                       //.b_im3                      (b_im3),
                       .ab_re3                      (ab_re3),
                       .ab_im3                      (ab_im3),
                       .abb_re3                      (abb_re3),
                       .abb_im3                      (abb_im3),
                       .ab_pow3_re3                      (ab_pow3_re3),
                       .ab_pow3_im3                      (ab_pow3_im3),
                       .ab_pow4_re3                      (ab_pow4_re3),
                       .ab_pow4_im3                      (ab_pow4_im3),
                       .ab_pow5_re3                      (ab_pow5_re3),
                       .ab_pow5_im3                      (ab_pow5_im3),
                       .ab_pow6_re3                      (ab_pow6_re3),
                       .ab_pow6_im3                      (ab_pow6_im3),
                       .ab_pow7_re3                      (ab_pow7_re3),
                       .ab_pow7_im3                      (ab_pow7_im3),
                       .b_pow8_re3                      (b_pow8_re3),
                       .b_pow8_im3                      (b_pow8_im3),
                       .a_re4                      (a_re4),
                       .a_im4                      (a_im4),
                       //.b_re4                      (b_re4),
                       //.b_im4                      (b_im4),
                       .ab_re4                      (ab_re4),
                       .ab_im4                      (ab_im4),
                       .abb_re4                      (abb_re4),
                       .abb_im4                      (abb_im4),
                       .ab_pow3_re4                      (ab_pow3_re4),
                       .ab_pow3_im4                      (ab_pow3_im4),
                       .ab_pow4_re4                      (ab_pow4_re4),
                       .ab_pow4_im4                      (ab_pow4_im4),
                       .ab_pow5_re4                      (ab_pow5_re4),
                       .ab_pow5_im4                      (ab_pow5_im4),
                       .ab_pow6_re4                      (ab_pow6_re4),
                       .ab_pow6_im4                      (ab_pow6_im4),
                       .ab_pow7_re4                      (ab_pow7_re4),
                       .ab_pow7_im4                      (ab_pow7_im4),
                       .b_pow8_re4                      (b_pow8_re4),
                       .b_pow8_im4                      (b_pow8_im4),
                       .a_re5                      (a_re5),
                       .a_im5                      (a_im5),
                       //.b_re5                      (b_re5),
                       //.b_im5                      (b_im5),
                       .ab_re5                      (ab_re5),
                       .ab_im5                      (ab_im5),
                       .abb_re5                      (abb_re5),
                       .abb_im5                      (abb_im5),
                       .ab_pow3_re5                      (ab_pow3_re5),
                       .ab_pow3_im5                      (ab_pow3_im5),
                       .ab_pow4_re5                      (ab_pow4_re5),
                       .ab_pow4_im5                      (ab_pow4_im5),
                       .ab_pow5_re5                      (ab_pow5_re5),
                       .ab_pow5_im5                      (ab_pow5_im5),
                       .ab_pow6_re5                      (ab_pow6_re5),
                       .ab_pow6_im5                      (ab_pow6_im5),
                       .ab_pow7_re5                      (ab_pow7_re5),
                       .ab_pow7_im5                      (ab_pow7_im5),
                       .b_pow8_re5                       (b_pow8_re5),
                       .b_pow8_im5                       (b_pow8_im5),
                        .dout_p0                  (dout_ref_p[0]               ),
                        .dout_p1                  (dout_ref_p[1]               ),
                        .dout_p2                  (dout_ref_p[2]               ),
                        .dout_p3                  (dout_ref_p[3]               ),
                        .dout_p4                  (dout_ref_p[4]               ),
                        .dout_p5                  (dout_ref_p[5]               ),
                        .dout_p6                  (dout_ref_p[6]               ),
                        .dout_p7                  (dout_ref_p[7]               ),

                        .vldo                   (vldo_ref                       )

                );


integer signed In_fid[0:3];
integer signed dout_fid[0:7];
string filenames_in[0:3] = {"in0.dat", "in1.dat", "in2.dat", "in3.dat"};
string filenames_dout[0:7] = {"dout0.dat", "dout1.dat", "dout2.dat", "dout3.dat", "dout4.dat", "dout5.dat", "dout6.dat", "dout7.dat"};

initial begin
    #0;
    for (int i = 0; i < 4; i = i + 1) begin
        In_fid[i] = $fopen(filenames_in[i]);
    end
    for (int i = 0; i < 8; i = i + 1) begin
        dout_fid[i] = $fopen(filenames_dout[i]);
    end
end

always @(posedge clk) begin
    if (cnt >= 90) begin
        for (int i = 0; i < 4; i = i + 1) begin
            $fwrite(In_fid[i], "%d\n", $signed(iir_in[i]));
        end
//        for (int i = 0; i < 8; i = i + 1) begin
//            $fclose(In_fid[i]);
//        end
    end
end

always @(posedge clk) begin
    if (vldo && en) begin
        for (int i = 0; i < 8; i = i + 1) begin
            $fwrite(dout_fid[i], "%d\n", $signed(dout_p[i]));
        end
//        for (int i = 0; i < 8; i = i + 1) begin
//            $fclose(dout_fid[i]);
//        end
    end
end
endmodule