//+FHDR-------------------------------------------------------------------------------------------------------- // Company: //----------------------------------------------------------------------------------------------------------------- // File Name : TailCorr_top.v // Department : // Author : thfu // Author's Tel : //----------------------------------------------------------------------------------------------------------------- // Relese History // Version Date Author Description // 0.3 2024-05-15 thfu //----------------------------------------------------------------------------------------------------------------- // Keywords : // //----------------------------------------------------------------------------------------------------------------- // Parameter // //----------------------------------------------------------------------------------------------------------------- // Purpose : // //----------------------------------------------------------------------------------------------------------------- // Target Device: // Tool versions: //----------------------------------------------------------------------------------------------------------------- // Reuse Issues // Reset Strategy: // Clock Domains: // Critical Timing: // Asynchronous I/F: // Synthesizable (y/n): // Other: //-FHDR-------------------------------------------------------------------------------------------------------- module IIR_top ( input rstn ,input clk ,input en ,input signed [15 :0] IIRin_p0 ,input signed [15 :0] IIRin_p1 ,input signed [15 :0] IIRin_p2 ,input signed [15 :0] IIRin_p3 ,input signed [15 :0] IIRin_p4 ,input signed [15 :0] IIRin_p5 ,input signed [15 :0] IIRin_p6 ,input signed [15 :0] IIRin_p7 ,input signed [31 :0] a_re ,input signed [31 :0] a_im ,input signed [31 :0] ab_re ,input signed [31 :0] ab_im ,input signed [31 :0] abb_re ,input signed [31 :0] abb_im ,input signed [31 :0] ab_pow3_re ,input signed [31 :0] ab_pow3_im ,input signed [31 :0] ab_pow4_re ,input signed [31 :0] ab_pow4_im ,input signed [31 :0] ab_pow5_re ,input signed [31 :0] ab_pow5_im ,input signed [31 :0] ab_pow6_re ,input signed [31 :0] ab_pow6_im ,input signed [31 :0] ab_pow7_re ,input signed [31 :0] ab_pow7_im ,input signed [31 :0] b_pow8_re ,input signed [31 :0] b_pow8_im ,output signed [15 :0] IIRout_p0 ,output signed [15 :0] IIRout_p1 ,output signed [15 :0] IIRout_p2 ,output signed [15 :0] IIRout_p3 ,output signed [15 :0] IIRout_p4 ,output signed [15 :0] IIRout_p5 ,output signed [15 :0] IIRout_p6 ,output signed [15 :0] IIRout_p7 ); reg signed [15:0] IIRin_p_r1 [7:1]; wire signed [15 : 0] IIRin_p [7:0] = {IIRin_p7, IIRin_p6,IIRin_p5,IIRin_p4,IIRin_p3,IIRin_p2,IIRin_p1,IIRin_p0}; integer i; always @(posedge clk or negedge rstn) begin if (!rstn) begin for (i = 1; i < 8; i = i + 1) begin IIRin_p_r1[i] <= 'h0; end end else if (en) begin for (i = 1; i < 8; i = i + 1) begin IIRin_p_r1[i] <= IIRin_p[i]; end end end IIR_Filter_p8 inst_iir_p0 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[0] ), .dinp1 (IIRin_p_r1[7] ), .dinp2 (IIRin_p_r1[6] ), .dinp3 (IIRin_p_r1[5] ), .dinp4 (IIRin_p_r1[4] ), .dinp5 (IIRin_p_r1[3] ), .dinp6 (IIRin_p_r1[2] ), .dinp7 (IIRin_p_r1[1] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p0 ) ); IIR_Filter_p8 inst_iir_p1 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[1] ), .dinp1 (IIRin_p[0] ), .dinp2 (IIRin_p_r1[7] ), .dinp3 (IIRin_p_r1[6] ), .dinp4 (IIRin_p_r1[5] ), .dinp5 (IIRin_p_r1[4] ), .dinp6 (IIRin_p_r1[3] ), .dinp7 (IIRin_p_r1[2] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p1 ) ); IIR_Filter_p8 inst_iir_p2 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[2] ), .dinp1 (IIRin_p[1] ), .dinp2 (IIRin_p[0] ), .dinp3 (IIRin_p_r1[7] ), .dinp4 (IIRin_p_r1[6] ), .dinp5 (IIRin_p_r1[5] ), .dinp6 (IIRin_p_r1[4] ), .dinp7 (IIRin_p_r1[3] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p2 ) ); IIR_Filter_p8 inst_iir_p3 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[3] ), .dinp1 (IIRin_p[2] ), .dinp2 (IIRin_p[1] ), .dinp3 (IIRin_p[0] ), .dinp4 (IIRin_p_r1[7] ), .dinp5 (IIRin_p_r1[6] ), .dinp6 (IIRin_p_r1[5] ), .dinp7 (IIRin_p_r1[4] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p3 ) ); IIR_Filter_p8 inst_iir_p4 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[4] ), .dinp1 (IIRin_p[3] ), .dinp2 (IIRin_p[2] ), .dinp3 (IIRin_p[1] ), .dinp4 (IIRin_p[0] ), .dinp5 (IIRin_p_r1[7] ), .dinp6 (IIRin_p_r1[6] ), .dinp7 (IIRin_p_r1[5] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p4 ) ); IIR_Filter_p8 inst_iir_p5 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[5] ), .dinp1 (IIRin_p[4] ), .dinp2 (IIRin_p[3] ), .dinp3 (IIRin_p[2] ), .dinp4 (IIRin_p[1] ), .dinp5 (IIRin_p[0] ), .dinp6 (IIRin_p_r1[7] ), .dinp7 (IIRin_p_r1[6] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p5 ) ); IIR_Filter_p8 inst_iir_p6 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[6] ), .dinp1 (IIRin_p[5] ), .dinp2 (IIRin_p[4] ), .dinp3 (IIRin_p[3] ), .dinp4 (IIRin_p[2] ), .dinp5 (IIRin_p[1] ), .dinp6 (IIRin_p[0] ), .dinp7 (IIRin_p_r1[7] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p6 ) ); IIR_Filter_p8 inst_iir_p7 ( .clk (clk ), .rstn (rstn ), .en (en ), .dinp0 (IIRin_p[7] ), .dinp1 (IIRin_p[6] ), .dinp2 (IIRin_p[5] ), .dinp3 (IIRin_p[4] ), .dinp4 (IIRin_p[3] ), .dinp5 (IIRin_p[2] ), .dinp6 (IIRin_p[1] ), .dinp7 (IIRin_p[0] ), .a_re (a_re ), .a_im (a_im ), .ab_re (ab_re ), .ab_im (ab_im ), .abb_re (abb_re ), .abb_im (abb_im ), .ab_pow3_re (ab_pow3_re ), .ab_pow3_im (ab_pow3_im ), .ab_pow4_re (ab_pow4_re ), .ab_pow4_im (ab_pow4_im ), .ab_pow5_re (ab_pow5_re ), .ab_pow5_im (ab_pow5_im ), .ab_pow6_re (ab_pow6_re ), .ab_pow6_im (ab_pow6_im ), .ab_pow7_re (ab_pow7_re ), .ab_pow7_im (ab_pow7_im ), .b_pow8_re (b_pow8_re ), .b_pow8_im (b_pow8_im ), .dout (IIRout_p7 ) ); endmodule