5 Commits

Author	SHA1	Message	Date
thfu	79a0eae046	四路输出，删除原八路输出； ... v04-MeanIntp_8 with FixRound;Modify the directory structure	2025-03-11 19:52:54 +08:00
thfu	5433610d48	输出8路转4路后和原来的8路进行比较； ... .m输出二进制数，方便配寄存器； 将z_dsp综合成网表用于z芯片的在环验证 v04-script add hex output v04-z_dsp's netlist used to z_chip_top	2025-03-11 19:48:56 +08:00
thfu	596b32273b	八倍内插模块的使能改为时钟二分频； ... 八路输出转为四路输出； .m文件计算输入加滤波结果 v04-add valid output port and convert from 8 to 4 Modify the directory structure Modify the directory structure 2th v04-din+IIR_out to compare with verdi v04-add valid output port and convert from 8 to 4 on FPGA	2025-03-11 19:44:53 +08:00
thfu	7057a430d1	基于IP核的滤波器，使能二分频 ... v04-z_dsp on FPGA	2025-03-11 19:42:44 +08:00
thfu	e058191d12	Modify enable signal as clk divided by 2 ... 使能口连时钟二分频； diff_plot.m使用最短的进行对比 Fit modification of enable signal as clk divided by 2 choose the min length to compare Enable of clk_div2 tested on FPGA	2025-03-11 19:38:34 +08:00