 thfu
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900c042f75
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add coefficient generation module and z_dsp; remove interpolation module and other files; suggest further simplification of RTL code using for-loops
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2025-03-08 13:54:21 +08:00 |
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thfu
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e42378b1ab
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An eight-channel parallel IIR filter, with the on-chip coefficient generation module yet to be developed, and no for loops used.
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2025-03-03 18:10:00 +08:00 |
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thfu
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2861f02533
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Á½Â·²¢ÐеÄIIRÂ˲¨Æ÷£¬ÏÂÒ»²½¸ÄÖÁ°Ë·²¢ÐÐ
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2025-02-26 15:50:49 +08:00 |
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unknown
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9dcfcd4028
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v01-.v files convert reg to wire;.m files include diff and sqt both less than 1e-4
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2024-11-26 20:38:29 +08:00 |
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unknown
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456a9fb479
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v01-z_dsp delay width debug;add z_dsp.m add diff_plot_py.m
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2024-11-26 17:57:19 +08:00 |
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thfu
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5cd9b46a21
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v01-add round module;intp8 and mult_C using round;Modify the directory structure
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2024-11-26 13:34:17 +08:00 |