From 038ab149bc763ba34669d55c2c565af645fe7f89 Mon Sep 17 00:00:00 2001 From: thfu <2779155576@qq.com> Date: Thu, 14 Nov 2024 20:35:56 +0800 Subject: [PATCH] v04-add valid output port and convert from 8 to 4 --- rtl/TailCorr_top.v | 5 ++- rtl/z_dsp.v | 71 ++++++++++++++++++--------------- rtl/z_dsp_en_Test.v | 11 +----- rtl/z_dsp_wrapper.v | 7 ++-- tb/tb_z_dsp.v | 91 +++++++++++++++++++++++++++---------------- tb/tb_z_dsp_en_Test.v | 13 +++++-- 6 files changed, 116 insertions(+), 82 deletions(-) diff --git a/rtl/TailCorr_top.v b/rtl/TailCorr_top.v index 6ccbf49..845b04e 100644 --- a/rtl/TailCorr_top.v +++ b/rtl/TailCorr_top.v @@ -456,8 +456,9 @@ always @(posedge clk or negedge rstn) din_r1 <= 'h0; din_r2 <= 'h0; din_r3 <= 'h0; + din_r4 <= 'h0; end - else if(en) + else if(en) begin din_r0 <= din_re; din_r1 <= din_r0; @@ -484,7 +485,7 @@ always@(posedge clk or negedge rstn) dout_r <= din_re; end else begin - if(en)begin + if (en) begin if(Ysum[16:15]==2'b01) dout_r <= 16'd32767; else if(Ysum[16:15]==2'b10) diff --git a/rtl/z_dsp.v b/rtl/z_dsp.v index d5c27a2..3f99802 100644 --- a/rtl/z_dsp.v +++ b/rtl/z_dsp.v @@ -40,6 +40,7 @@ input [1:0] dac_mode_sel, //2'b00:NRZ mode;2'b01:Double data mode; //2'b10:Double Double data mode;2'b11:reserve; input tc_bypass, input [1:0] intp_mode, //2'b00:x1;2'b01:x2,'b10:x4;other:reserve; +input vldi, input signed [15:0] din_re, input signed [15:0] din_im, input signed [31:0] a0_re, //a0's real part @@ -70,10 +71,6 @@ output signed [15:0] dout0, output signed [15:0] dout1, output signed [15:0] dout2, output signed [15:0] dout3, -output signed [15:0] dout4, -output signed [15:0] dout5, -output signed [15:0] dout6, -output signed [15:0] dout7, output vldo, output saturation_0, output saturation_1, @@ -83,22 +80,27 @@ output saturation_4, output saturation_5 ); +parameter Delay = 8-1; wire signed [15:0] IIR_out; -reg [10:0] vldo_r; +reg [Delay:0] vldo_r; always@(posedge clk or negedge rstn) if(!rstn) begin - vldo_r <= 9'b0; + vldo_r <= 'h0; + end + else if(en) + begin + vldo_r <= {vldo_r[Delay:0], vldi};//Delay with 8 clk end else begin - vldo_r <= {vldo_r[10:0], en}; + vldo_r <= vldo_r; end -assign vldo = vldo_r[10]; +assign vldo = vldo_r[Delay]; TailCorr_top inst_TailCorr_top ( @@ -169,29 +171,36 @@ MeanIntp_8 inst_MeanIntp_8 ); -lsdacif inst_lsdacif - ( - .clk (clk ), - .rstn (rstn ), - .dac_mode_sel (dac_mode_sel ), - .intp_mode (intp_mode ), - .din0 (dout_0 ), - .din1 (dout_1 ), - .din2 (dout_2 ), - .din3 (dout_3 ), - .din4 (dout_4 ), - .din5 (dout_5 ), - .din6 (dout_6 ), - .din7 (dout_7 ), - .dout0 (dout0 ), - .dout1 (dout1 ), - .dout2 (dout2 ), - .dout3 (dout3 ), - .dout4 (dout4 ), - .dout5 (dout5 ), - .dout6 (dout6 ), - .dout7 (dout7 ) +reg signed [15:0] doutf_0; +reg signed [15:0] doutf_1; +reg signed [15:0] doutf_2; +reg signed [15:0] doutf_3; - ); + +always@(posedge clk or negedge rstn) + if(!rstn) begin + doutf_0 <= 0; + doutf_1 <= 0; + doutf_2 <= 0; + doutf_3 <= 0; + end + else if(!en) begin + doutf_0 <= dout_0; + doutf_1 <= dout_1; + doutf_2 <= dout_2; + doutf_3 <= dout_3; + end + + else begin + doutf_0 <= dout_4; + doutf_1 <= dout_5; + doutf_2 <= dout_6; + doutf_3 <= dout_7; + end + +assign dout0 = doutf_0; +assign dout1 = doutf_1; +assign dout2 = doutf_2; +assign dout3 = doutf_3; endmodule diff --git a/rtl/z_dsp_en_Test.v b/rtl/z_dsp_en_Test.v index e7b96fe..441fdc0 100644 --- a/rtl/z_dsp_en_Test.v +++ b/rtl/z_dsp_en_Test.v @@ -38,6 +38,7 @@ input rstn, input [1:0] dac_mode_sel, //2'b00:NRZ mode;2'b01:Double data mode; //2'b10:Double Double data mode;2'b11:reserve; input tc_bypass, +input vldi, input [1:0] intp_mode, //2'b00:x1;2'b01:x2,'b10:x4;other:reserve; input signed [15:0] din_re, input signed [15:0] din_im, @@ -69,10 +70,6 @@ output signed [15:0] dout0, output signed [15:0] dout1, output signed [15:0] dout2, output signed [15:0] dout3, -output signed [15:0] dout4, -output signed [15:0] dout5, -output signed [15:0] dout6, -output signed [15:0] dout7, output vldo, output saturation_0, output saturation_1, @@ -97,6 +94,7 @@ z_dsp inst_z_dsp .clk (clk ), .rstn (rstn ), .en (en ), + .vldi (vldi ), .tc_bypass (tc_bypass ), .dac_mode_sel (dac_mode_sel ), .intp_mode (intp_mode ), @@ -130,10 +128,6 @@ z_dsp inst_z_dsp .dout1 (dout1 ), .dout2 (dout2 ), .dout3 (dout3 ), - .dout4 (dout4 ), - .dout5 (dout5 ), - .dout6 (dout6 ), - .dout7 (dout7 ), .vldo (vldo ), .saturation_0 (saturation_0 ), .saturation_1 (saturation_1 ), @@ -143,5 +137,4 @@ z_dsp inst_z_dsp .saturation_5 (saturation_5 ) ); - endmodule diff --git a/rtl/z_dsp_wrapper.v b/rtl/z_dsp_wrapper.v index 297a6ec..f42cf31 100644 --- a/rtl/z_dsp_wrapper.v +++ b/rtl/z_dsp_wrapper.v @@ -31,11 +31,10 @@ // Other: //-FHDR-------------------------------------------------------------------------------------------------------- -module z_dsp +module z_dsp_wrapper ( input clk, input rstn, -input en, //enable input [1:0] dac_mode_sel, //2'b00:NRZ mode;2'b01:Double data mode; //2'b10:Double Double data mode;2'b11:reserve; input tc_bypass, @@ -81,6 +80,6 @@ output saturation_2, output saturation_3, output saturation_4, output saturation_5 - ); + ); -endmodule +endmodule \ No newline at end of file diff --git a/tb/tb_z_dsp.v b/tb/tb_z_dsp.v index 361864d..fcad784 100644 --- a/tb/tb_z_dsp.v +++ b/tb/tb_z_dsp.v @@ -281,7 +281,7 @@ assign dac_mode_sel = 2'b00; wire tc_bypass; assign tc_bypass = 1'b0; - +/* wire [15:0] dout_clkl_p0; wire [15:0] dout_clkl_p1; wire [15:0] dout_clkl_p2; @@ -295,6 +295,7 @@ z_dsp inst_Z_dsp ( .clk (clk_l ), .rstn (rstn ), + .vldi (iir_in[14] ), .en (en ), .tc_bypass (tc_bypass ), .dac_mode_sel (dac_mode_sel ), @@ -329,10 +330,6 @@ z_dsp inst_Z_dsp .dout1 (dout_clkl_p1 ), .dout2 (dout_clkl_p2 ), .dout3 (dout_clkl_p3 ), - .dout4 (dout_clkl_p4 ), - .dout5 (dout_clkl_p5 ), - .dout6 (dout_clkl_p6 ), - .dout7 (dout_clkl_p7 ), .vldo ( ), .saturation_0 ( ), .saturation_1 ( ), @@ -342,15 +339,11 @@ z_dsp inst_Z_dsp .saturation_5 ( ) ); - +*/ wire [15:0] dout_p0; wire [15:0] dout_p1; wire [15:0] dout_p2; wire [15:0] dout_p3; -wire [15:0] dout_p4; -wire [15:0] dout_p5; -wire [15:0] dout_p6; -wire [15:0] dout_p7; z_dsp_en_Test inst_z_dsp_en_Test ( @@ -359,6 +352,7 @@ z_dsp_en_Test inst_z_dsp_en_Test .tc_bypass (tc_bypass ), .dac_mode_sel (dac_mode_sel ), .intp_mode (intp_mode ), + .vldi (iir_in[14] ), .din_re (iir_in ), .din_im (din_im ), .a0_re (a0_re ), @@ -389,10 +383,6 @@ z_dsp_en_Test inst_z_dsp_en_Test .dout1 (dout_p1 ), .dout2 (dout_p2 ), .dout3 (dout_p3 ), - .dout4 (dout_p4 ), - .dout5 (dout_p5 ), - .dout6 (dout_p6 ), - .dout7 (dout_p7 ), .vldo ( ), .saturation_0 ( ), .saturation_1 ( ), @@ -402,7 +392,7 @@ z_dsp_en_Test inst_z_dsp_en_Test .saturation_5 ( ) ); - +/* reg [15:0] dout_p0_r1 = 0; reg [15:0] dout_p1_r1 = 0; reg [15:0] dout_p2_r1 = 0; @@ -601,10 +591,14 @@ always@(*) wire [15:0] diff; assign diff = cs_wave1 - cs_wave; - +*/ integer signed In_fid; integer signed diff_fid; integer signed OrgOut_fid; +integer signed dout0_fid; +integer signed dout1_fid; +integer signed dout2_fid; +integer signed dout3_fid; integer X1_fid; integer X2_fid; integer X4_fid; @@ -612,9 +606,13 @@ integer X8_fid; initial begin #0; - In_fid = $fopen("./in.dat"); - diff_fid = $fopen("./diff_in.dat"); - OrgOut_fid = $fopen("./OrgOut.dat"); + In_fid = $fopen("./in.dat"); + diff_fid = $fopen("./diff_in.dat"); + OrgOut_fid = $fopen("./OrgOut.dat"); + dout0_fid = $fopen("./dout0.dat"); + dout1_fid = $fopen("./dout1.dat"); + dout2_fid = $fopen("./dout2.dat"); + dout3_fid = $fopen("./dout3.dat"); case (intp_mode) 2'b00 : X1_fid = $fopen("./X1_data.dat"); 2'b01 : X2_fid = $fopen("./X2_data.dat"); @@ -628,12 +626,20 @@ end always@(posedge clk_l) if(cnt >= 90) begin - $fwrite(In_fid,"%d\n",$signed(TB.inst_Z_dsp.inst_TailCorr_top.din_r1)); - $fwrite(diff_fid,"%d\n",$signed(TB.inst_Z_dsp.inst_TailCorr_top.IIRin_re)); - $fwrite(OrgOut_fid,"%d\n",$signed(TB.inst_Z_dsp.inst_TailCorr_top.dout)); + $fwrite(In_fid,"%d\n", $signed(TB.inst_z_dsp_en_Test.inst_z_dsp.inst_TailCorr_top.din_r1)); + $fwrite(diff_fid,"%d\n", $signed(TB.inst_z_dsp_en_Test.inst_z_dsp.inst_TailCorr_top.IIRin_re)); + $fwrite(OrgOut_fid,"%d\n",$signed(TB.inst_z_dsp_en_Test.inst_z_dsp.inst_TailCorr_top.dout)); end - +always@(posedge clk_h) + if(cnt >= 90) + begin + $fwrite(dout0_fid,"%d\n",$signed(dout_p0)); + $fwrite(dout1_fid,"%d\n",$signed(dout_p1)); + $fwrite(dout2_fid,"%d\n",$signed(dout_p2)); + $fwrite(dout3_fid,"%d\n",$signed(dout_p3)); + end +/* always@(*) fork case (intp_mode) @@ -671,34 +677,34 @@ always@(*) begin @(posedge clk_div32_f) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p0[15]}},dout_p0[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout0)); @(posedge clk_div32_d) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p1[15]}},dout_p1[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout1)); @(posedge clk_div32_b) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p2[15]}},dout_p2[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout2)); @(posedge clk_div32_9) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p3[15]}},dout_p3[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout3)); @(posedge clk_div32_7) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p4[15]}},dout_p4[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout4)); @(posedge clk_div32_5) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p5[15]}},dout_p5[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout5)); @(posedge clk_div32_3) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p6[15]}},dout_p6[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout6)); @(posedge clk_div32_1) if(cnt >= 90) - $fwrite(X8_fid,"%d\n",{{{dout_p7[15]}},dout_p7[14:0]}); + $fwrite(X8_fid,"%d\n",$signed(dout7)); end endcase join - +*/ /* always@(posedge clk_div16_e) if(cnt >= 90) @@ -726,9 +732,28 @@ always@(posedge clk_div16_6) $fwrite(X4_fid,"%d\n",{{~{dout_p2[15]}},dout_p2[14:0]}); always@(posedge clk_div16_2) if(cnt >= 90) - $fwrite(X4_fid,"%d\n",{{~{dout_p3[15]}},dout_p3[14:0]}); + ) + $fwrite(In_fid,"%d\n",{{~{iir_in[15]}},iir_in[14:0]}); + +always@(posedge clk_div16_e) + if(cnt >= 90) + $fwrite(X1_fid,"%d\n",{{~{dout_p3[15]}},dout_p3[14:0]}); + +always@(posedge clk_div16_e) + if(cnt >= 90) + $fwrite(X2_fid,"%d\n",{{~{dout_p1[15]}},dout_p1) + $fwrite(In_fid,"%d\n",{{~{iir_in[15]}},iir_in[14:0]}); + +always@(posedge clk_div16_e) + if(cnt >= 90) + $fwrite(X1_fid,"%d\n",{{~{dout_p3[15]}},dout_p3[14:0]}); + +always@(posedge clk_div16_e) + if(cnt >= 90) + $fwrite(X2_fid,"%d\n",{{~{dout_p1[15]}},dout_p1 $fwrite(X4_fid,"%d\n",{{~{dout_p3[15]}},dout_p3[14:0]}); */ endmodule + diff --git a/tb/tb_z_dsp_en_Test.v b/tb/tb_z_dsp_en_Test.v index f2e7606..9376c59 100644 --- a/tb/tb_z_dsp_en_Test.v +++ b/tb/tb_z_dsp_en_Test.v @@ -332,7 +332,15 @@ z_dsp_en_Test inst_Z_dsp_en_Test .dout4 (dout_p4 ), .dout5 (dout_p5 ), .dout6 (dout_p6 ), - .dout7 (dout_p7 ) + .dout7 (dout_p7 ), + .vldo (vldo ), + .saturation_0 ( ), + .saturation_1 ( ), + .saturation_2 ( ), + .saturation_3 ( ), + .saturation_4 ( ), + .saturation_5 ( ) + ); @@ -346,11 +354,10 @@ wire [15:0] dout_clkl_p6; wire [15:0] dout_clkl_p7; -z_dsp inst1_Z_dsp +z_dsp_en_Test inst_z_dsp_en_Test ( .clk (clk_l ), .rstn (rstn ), - .en (en ), .tc_bypass (tc_bypass ), .dac_mode_sel (dac_mode_sel ), .intp_mode (intp_mode ),