TailCorr/rtl/nco/cos_op.v

module COS_OP(
		clk		,
		rstn		,
		pha_map		,
		pha_indx_msb	,
		cos_op_o
		);

input		clk;
input           rstn;
input	[18:0]	pha_map;
output	[2:0]	pha_indx_msb;
output	[14:0]	cos_op_o;

wire	[2:0]	pha_indx_msb_w;
assign          pha_indx_msb_w=pha_map[18:16];

wire	[15:0]	pha_indx_lsb;
assign          pha_indx_lsb=pha_map[15:0];
wire	[15:0]	pha_op;
assign          pha_op=pha_indx_msb_w[0]?(~pha_indx_lsb):pha_indx_lsb;

wire	[4:0]	indx;
assign          indx=pha_op[15:11];
wire	[10:0]	x_w;
assign          x_w=pha_op[10:0];
wire	[17:0]	c0;
wire	[11:0]	c1;
wire	[5:0]	c2;


COEF_C	coef_c_inst1(
			.index(indx)	,
			.C0_C(c0)	,
			.C1_C(c1)	,
			.C2_C(c2)			
		);

reg[17:0]	c0_r1;
reg[17:0]       c0_r2;
reg[17:0]       c0_r3;
reg[17:0]       c0_r4;
reg[17:0]       c0_r5;
reg[17:0]       c0_r6;
always@(posedge clk)
		begin
		c0_r1<=c0;
		c0_r2<=c0_r1;
		c0_r3<=c0_r2;
		c0_r4<=c0_r3;
		c0_r5<=c0_r4;
		c0_r6<=c0_r5;
		end
reg	[11:0]	c1_r1;
reg     [11:0]  c1_r2;
reg	[11:0]	c1_r3;
always@(posedge clk)
               begin
	           c1_r1<=c1;
                   c1_r2<=c1_r1;
	           c1_r3<=c1_r2;
               end
reg	[5:0]	c2_r1;
always@(posedge clk)
		c2_r1<=c2;
reg[10:0]	x_r1;
reg[10:0]       x_r2;
reg[10:0]	x_r3;
reg[10:0]       x_r4;
always@(posedge clk)
		begin
		x_r1<=x_w;
		x_r2<=x_r1;
		x_r3<=x_r2;
		x_r4<=x_r3;
		end

wire    [16:0]      c2x;

DW_mult_pipe #(11,6,2,0,1) inst_mult_0(
				.clk		(clk	),
				.rst_n		(rstn	),
				.en		(1'b1	),
				.a		(x_r1	),
				.b		(c2_r1	),
				.tc		(1'b0	),
				.product	(c2x	)
				);

wire	[5:0]	c2x_w;
assign          c2x_w=c2x[10]?(c2x[16:11]+6'd1):c2x[16:11];

reg	[11:0]	c2xc1;
always@(posedge clk)
			c2xc1<=c1_r2+c2x_w;
wire    [22:0]  c2xc1x;
DW_mult_pipe #(11,12,3,0,1) inst_mult_1(
				.clk		(clk	),
				.rst_n		(rstn	),
				.en		(1'b1	),
				.a		(x_r3	),
				.b		(c2xc1	),
				.tc		(1'b0	),
				.product	(c2xc1x	)
				);


wire	[12:0]	c2xc1x_w;
assign          c2xc1x_w=c2xc1x[9]?(c2xc1x[22:10]+13'd1):c2xc1x[22:10];
reg	[12:0]	c2xc1x_r;
always@(posedge clk)
			c2xc1x_r<=c2xc1x_w;
wire [17:0]	c2xc1xc0;
assign		c2xc1xc0 =c0_r6-c2xc1x_r;

wire[15:0]      c2xc1xc0_w1;
assign          c2xc1xc0_w1=c2xc1xc0[2]?({1'b0,c2xc1xc0[17:3]}+15'd1):{1'b0,c2xc1xc0[17:3]};

wire[14:0]	c2xc1xc0_w;
assign          c2xc1xc0_w=(c2xc1xc0_w1>=15'd32767)?15'd32767:c2xc1xc0_w1[14:0];
reg	[14:0]	c2xc1xc0_r;
always@(posedge clk)
			c2xc1xc0_r<=c2xc1xc0_w;
assign		cos_op_o=c2xc1xc0_r;
reg[2:0] 	pha_indx_msb_r1;
reg[2:0]        pha_indx_msb_r2;
reg[2:0]        pha_indx_msb_r3;
reg[2:0]        pha_indx_msb_r4;
reg[2:0]        pha_indx_msb_r5;
reg[2:0]        pha_indx_msb_r6;
reg[2:0]        pha_indx_msb_r7;
always@(posedge clk)
		begin
		pha_indx_msb_r1<=pha_indx_msb_w;
		pha_indx_msb_r2<=pha_indx_msb_r1;	
		pha_indx_msb_r3<=pha_indx_msb_r2;
		pha_indx_msb_r4<=pha_indx_msb_r3;
		pha_indx_msb_r5<=pha_indx_msb_r4;
		pha_indx_msb_r6<=pha_indx_msb_r5;
		pha_indx_msb_r7<=pha_indx_msb_r6;
		end
	
assign			pha_indx_msb=pha_indx_msb_r7;
endmodule