366 lines
13 KiB
Verilog
366 lines
13 KiB
Verilog
//+FHDR--------------------------------------------------------------------------------------------------------
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// Company:
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//-----------------------------------------------------------------------------------------------------------------
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// File Name : qbmcu_exu_dpath.v
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// Department :
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// Author : PWY
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// Author's Tel :
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//-----------------------------------------------------------------------------------------------------------------
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// Relese History
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// Version Date Author Description
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// 0.1 2024-03-13 PWY This module to implement the datapath of ALU
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//-----------------------------------------------------------------------------------------------------------------
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// Keywords :
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Parameter
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Purpose :
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Target Device:
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// Tool versions:
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//-----------------------------------------------------------------------------------------------------------------
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// Reuse Issues
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// Reset Strategy:
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// Clock Domains:
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// Critical Timing:
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// Asynchronous I/F:
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// Synthesizable (y/n):
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// Other:
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//-FHDR--------------------------------------------------------------------------------------------------------
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`include "qbmcu_defines.v"
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module qbmcu_exu_dpath(
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//////////////////////////////////////////////////////
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// ALU request the datapath
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input alu_req_alu
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,input alu_req_alu_add
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,input alu_req_alu_sub
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,input alu_req_alu_xor
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,input alu_req_alu_sll
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,input alu_req_alu_srl
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,input alu_req_alu_sra
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,input alu_req_alu_or
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,input alu_req_alu_and
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,input alu_req_alu_slt
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,input alu_req_alu_sltu
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,input alu_req_alu_lui
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,input [`QBMCU_XLEN-1:0] alu_req_alu_op1
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,input [`QBMCU_XLEN-1:0] alu_req_alu_op2
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,output [`QBMCU_XLEN-1:0] alu_req_alu_res
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//////////////////////////////////////////////////////
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// BJP request the datapath
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,input bjp_req_alu
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,input [`QBMCU_XLEN-1:0] bjp_req_alu_op1
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,input [`QBMCU_XLEN-1:0] bjp_req_alu_op2
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,input bjp_req_alu_cmp_eq
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,input bjp_req_alu_cmp_ne
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,input bjp_req_alu_cmp_lt
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,input bjp_req_alu_cmp_gt
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,input bjp_req_alu_cmp_ltu
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,input bjp_req_alu_cmp_gtu
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,input bjp_req_alu_add
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,output bjp_req_alu_cmp_res
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,output [`QBMCU_XLEN-1:0] bjp_req_alu_add_res
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);
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wire [`QBMCU_XLEN-1:0] mux_op1;
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wire [`QBMCU_XLEN-1:0] mux_op2;
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wire [`QBMCU_XLEN-1:0] misc_op1 = mux_op1[`QBMCU_XLEN-1:0];
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wire [`QBMCU_XLEN-1:0] misc_op2 = mux_op2[`QBMCU_XLEN-1:0];
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// Only the regular ALU use shifter
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wire [`QBMCU_XLEN-1:0] shifter_op1 = alu_req_alu_op1[`QBMCU_XLEN-1:0];
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wire [`QBMCU_XLEN-1:0] shifter_op2 = alu_req_alu_op2[`QBMCU_XLEN-1:0];
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wire op_add;
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wire op_sub;
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wire op_addsub = op_add | op_sub;
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wire op_or;
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wire op_xor;
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wire op_and;
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wire op_sll;
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wire op_srl;
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wire op_sra;
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wire op_slt;
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wire op_sltu;
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wire op_mvop2;
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wire op_cmp_eq ;
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wire op_cmp_ne ;
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wire op_cmp_lt ;
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wire op_cmp_gt ;
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wire op_cmp_ltu;
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wire op_cmp_gtu;
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wire cmp_res;
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//////////////////////////////////////////////////////////////
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// Impelment the Left-Shifter
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//
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// The Left-Shifter will be used to handle the shift op
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wire [`QBMCU_XLEN-1:0] shifter_in1;
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wire [5-1:0] shifter_in2;
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wire [`QBMCU_XLEN-1:0] shifter_res;
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wire op_shift = op_sra | op_sll | op_srl;
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// Make sure to use logic-gating to gateoff the
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assign shifter_in1 = {`QBMCU_XLEN{op_shift}} &
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// In order to save area and just use one left-shifter, we
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// convert the right-shift op into left-shift operation
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(
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(op_sra | op_srl) ?
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{
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shifter_op1[00],shifter_op1[01],shifter_op1[02],shifter_op1[03],
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shifter_op1[04],shifter_op1[05],shifter_op1[06],shifter_op1[07],
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shifter_op1[08],shifter_op1[09],shifter_op1[10],shifter_op1[11],
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shifter_op1[12],shifter_op1[13],shifter_op1[14],shifter_op1[15],
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shifter_op1[16],shifter_op1[17],shifter_op1[18],shifter_op1[19],
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shifter_op1[20],shifter_op1[21],shifter_op1[22],shifter_op1[23],
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shifter_op1[24],shifter_op1[25],shifter_op1[26],shifter_op1[27],
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shifter_op1[28],shifter_op1[29],shifter_op1[30],shifter_op1[31]
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} : shifter_op1
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);
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assign shifter_in2 = {5{op_shift}} & shifter_op2[4:0];
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assign shifter_res = (shifter_in1 << shifter_in2);
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wire [`QBMCU_XLEN-1:0] sll_res = shifter_res;
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wire [`QBMCU_XLEN-1:0] srl_res =
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{
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shifter_res[00],shifter_res[01],shifter_res[02],shifter_res[03],
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shifter_res[04],shifter_res[05],shifter_res[06],shifter_res[07],
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shifter_res[08],shifter_res[09],shifter_res[10],shifter_res[11],
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shifter_res[12],shifter_res[13],shifter_res[14],shifter_res[15],
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shifter_res[16],shifter_res[17],shifter_res[18],shifter_res[19],
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shifter_res[20],shifter_res[21],shifter_res[22],shifter_res[23],
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shifter_res[24],shifter_res[25],shifter_res[26],shifter_res[27],
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shifter_res[28],shifter_res[29],shifter_res[30],shifter_res[31]
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};
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wire [`QBMCU_XLEN-1:0] eff_mask = (~(`QBMCU_XLEN'b0)) >> shifter_in2;
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wire [`QBMCU_XLEN-1:0] sra_res =
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(srl_res & eff_mask) | ({32{shifter_op1[31]}} & (~eff_mask));
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//////////////////////////////////////////////////////////////
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// Impelment the Adder
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//
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// The Adder will be reused to handle the add/sub/compare op
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// all other unit request ALU-adder with 32bits opereand without sign extended
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wire op_unsigned = op_sltu | op_cmp_ltu | op_cmp_gtu;
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] misc_adder_op1 =
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{{`QBMCU_ALU_ADDER_WIDTH-`QBMCU_XLEN{(~op_unsigned) & misc_op1[`QBMCU_XLEN-1]}},misc_op1};
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] misc_adder_op2 =
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{{`QBMCU_ALU_ADDER_WIDTH-`QBMCU_XLEN{(~op_unsigned) & misc_op2[`QBMCU_XLEN-1]}},misc_op2};
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] adder_op1 = misc_adder_op1;
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] adder_op2 = misc_adder_op2;
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wire adder_cin;
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] adder_in1;
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] adder_in2;
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wire [`QBMCU_ALU_ADDER_WIDTH-1:0] adder_res;
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wire adder_add;
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wire adder_sub;
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assign adder_add = op_add;
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assign adder_sub =
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(
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// The original sub instruction
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(op_sub)
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// The compare lt or gt instruction
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| (op_cmp_lt | op_cmp_gt |
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op_cmp_ltu | op_cmp_gtu |
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op_slt | op_sltu
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));
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wire adder_addsub = adder_add | adder_sub;
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// Make sure to use logic-gating to gateoff the
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assign adder_in1 = {`QBMCU_ALU_ADDER_WIDTH{adder_addsub}} & (adder_op1);
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assign adder_in2 = {`QBMCU_ALU_ADDER_WIDTH{adder_addsub}} & (adder_sub ? (~adder_op2) : adder_op2);
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assign adder_cin = adder_addsub & adder_sub;
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assign adder_res = adder_in1 + adder_in2 + adder_cin;
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//////////////////////////////////////////////////////////////
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// Impelment the XOR-er
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//
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// The XOR-er will be reused to handle the XOR and compare op
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wire [`QBMCU_XLEN-1:0] xorer_in1;
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wire [`QBMCU_XLEN-1:0] xorer_in2;
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wire xorer_op =
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op_xor
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// The compare eq or ne instruction
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| (op_cmp_eq | op_cmp_ne);
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// Make sure to use logic-gating to gateoff the
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assign xorer_in1 = {`QBMCU_XLEN{xorer_op}} & misc_op1;
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assign xorer_in2 = {`QBMCU_XLEN{xorer_op}} & misc_op2;
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wire [`QBMCU_XLEN-1:0] xorer_res = xorer_in1 ^ xorer_in2;
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// The OR and AND is too light-weight, so no need to gate off
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wire [`QBMCU_XLEN-1:0] orer_res = misc_op1 | misc_op2;
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wire [`QBMCU_XLEN-1:0] ander_res = misc_op1 & misc_op2;
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//////////////////////////////////////////////////////////////
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// Generate the CMP operation result
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// It is Non-Equal if the XOR result have any bit non-zero
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wire neq = (|xorer_res);
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wire cmp_res_ne = (op_cmp_ne & neq);
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// It is Equal if it is not Non-Equal
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wire cmp_res_eq = op_cmp_eq & (~neq);
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// It is Less-Than if the adder result is negative
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wire cmp_res_lt = op_cmp_lt & adder_res[`QBMCU_XLEN];
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wire cmp_res_ltu = op_cmp_ltu & adder_res[`QBMCU_XLEN];
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// It is Greater-Than if the adder result is postive
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wire op1_gt_op2 = (~adder_res[`QBMCU_XLEN]);
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wire cmp_res_gt = op_cmp_gt & op1_gt_op2;
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wire cmp_res_gtu = op_cmp_gtu & op1_gt_op2;
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assign cmp_res = cmp_res_eq
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| cmp_res_ne
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| cmp_res_lt
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| cmp_res_gt
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| cmp_res_ltu
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| cmp_res_gtu;
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//////////////////////////////////////////////////////////////
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// Generate the mvop2 result
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// Just directly use op2 since the op2 will be the immediate
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wire [`QBMCU_XLEN-1:0] mvop2_res = misc_op2;
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//////////////////////////////////////////////////////////////
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// Generate the SLT and SLTU result
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// Just directly use op2 since the op2 will be the immediate
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wire op_slttu = (op_slt | op_sltu);
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// The SLT and SLTU is reusing the adder to do the comparasion
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// It is Less-Than if the adder result is negative
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wire slttu_cmp_lt = op_slttu & adder_res[`QBMCU_XLEN];
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wire [`QBMCU_XLEN-1:0] slttu_res =
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slttu_cmp_lt ?
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`QBMCU_XLEN'b1 : `QBMCU_XLEN'b0;
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//////////////////////////////////////////////////////////////
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// Generate the final result
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wire [`QBMCU_XLEN-1:0] alu_dpath_res =
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({`QBMCU_XLEN{op_or }} & orer_res )
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| ({`QBMCU_XLEN{op_and }} & ander_res)
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| ({`QBMCU_XLEN{op_xor }} & xorer_res)
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| ({`QBMCU_XLEN{op_addsub }} & adder_res[`QBMCU_XLEN-1:0])
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| ({`QBMCU_XLEN{op_srl }} & srl_res)
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| ({`QBMCU_XLEN{op_sll }} & sll_res)
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| ({`QBMCU_XLEN{op_sra }} & sra_res)
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| ({`QBMCU_XLEN{op_mvop2 }} & mvop2_res)
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| ({`QBMCU_XLEN{op_slttu }} & slttu_res)
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;
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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/////////////////////////////////////////////////////////////////////
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// The ALU-Datapath Mux for the requestors
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localparam DPATH_MUX_WIDTH = ((`QBMCU_XLEN*2)+17);
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assign {
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mux_op1
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,mux_op2
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,op_add
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,op_sub
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,op_or
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,op_xor
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,op_and
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,op_sll
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,op_srl
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,op_sra
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,op_slt
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,op_sltu
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,op_mvop2
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,op_cmp_eq
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,op_cmp_ne
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,op_cmp_lt
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,op_cmp_gt
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,op_cmp_ltu
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,op_cmp_gtu
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}
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=
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({DPATH_MUX_WIDTH{alu_req_alu}} & {
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alu_req_alu_op1
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,alu_req_alu_op2
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,alu_req_alu_add
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,alu_req_alu_sub
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,alu_req_alu_or
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,alu_req_alu_xor
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,alu_req_alu_and
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,alu_req_alu_sll
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,alu_req_alu_srl
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,alu_req_alu_sra
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,alu_req_alu_slt
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,alu_req_alu_sltu
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,alu_req_alu_lui// LUI just move-Op2 operation
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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})
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| ({DPATH_MUX_WIDTH{bjp_req_alu}} & {
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bjp_req_alu_op1
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,bjp_req_alu_op2
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,bjp_req_alu_add
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,1'b0
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,bjp_req_alu_cmp_eq
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,bjp_req_alu_cmp_ne
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,bjp_req_alu_cmp_lt
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,bjp_req_alu_cmp_gt
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,bjp_req_alu_cmp_ltu
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,bjp_req_alu_cmp_gtu
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})
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;
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assign alu_req_alu_res = alu_dpath_res[`QBMCU_XLEN-1:0];
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assign bjp_req_alu_add_res = alu_dpath_res[`QBMCU_XLEN-1:0];
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assign bjp_req_alu_cmp_res = cmp_res;
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endmodule
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`include "qbmcu_undefines.v"
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