106 lines
5.4 KiB
Verilog
106 lines
5.4 KiB
Verilog
//+FHDR--------------------------------------------------------------------------------------------------------
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// Company:
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//-----------------------------------------------------------------------------------------------------------------
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// File Name : qbmcu_exu_alu.v
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// Department :
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// Author : PWY
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// Author's Tel :
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//-----------------------------------------------------------------------------------------------------------------
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// Relese History
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// Version Date Author Description
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// 0.1 2024-03-13 PWY This module to implement the regular ALU instructions
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//-----------------------------------------------------------------------------------------------------------------
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// Keywords :
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Parameter
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Purpose :
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//
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//-----------------------------------------------------------------------------------------------------------------
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// Target Device:
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// Tool versions:
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//-----------------------------------------------------------------------------------------------------------------
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// Reuse Issues
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// Reset Strategy:
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// Clock Domains:
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// Critical Timing:
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// Asynchronous I/F:
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// Synthesizable (y/n):
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// Other:
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//-FHDR--------------------------------------------------------------------------------------------------------
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`include "qbmcu_defines.v"
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module qbmcu_exu_alu(
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//system port
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input clk
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,input rst_n
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//////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////
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,input [`QBMCU_XLEN-1 :0] alu_i_rs1
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,input [`QBMCU_XLEN-1 :0] alu_i_rs2
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,input [`QBMCU_XLEN-1 :0] alu_i_imm
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,input [`QBMCU_PC_SIZE-1 :0] alu_i_pc
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,input [`QBMCU_DECINFO_ALU_WIDTH-1:0] alu_i_info
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,input alu_i_op
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//The enable signal from the master control state machine
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,input alu_i_active
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//////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////
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// The Write-Back Interface for Special (unaligned ldst and AMO instructions)
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,output [`QBMCU_XLEN-1 :0] alu_o_wbck_wdat
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,output alu_o_wbck_valid
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//////////////////////////////////////////////////////////////
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//////////////////////////////////////////////////////////////
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// To share the ALU datapath
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//
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// The operands and info to ALU
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,output alu_req_alu_add
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,output alu_req_alu_sub
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,output alu_req_alu_xor
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,output alu_req_alu_sll
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,output alu_req_alu_srl
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,output alu_req_alu_sra
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,output alu_req_alu_or
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,output alu_req_alu_and
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,output alu_req_alu_slt
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,output alu_req_alu_sltu
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,output alu_req_alu_lui
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,output [`QBMCU_XLEN-1 :0] alu_req_alu_op1
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,output [`QBMCU_XLEN-1 :0] alu_req_alu_op2
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,input [`QBMCU_XLEN-1 :0] alu_req_alu_res
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);
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wire alu_i_active_r;
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wire op2imm = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OP2IMM ];
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wire op1pc = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OP1PC ];
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assign alu_req_alu_op1 = op1pc ? alu_i_pc : alu_i_rs1;
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assign alu_req_alu_op2 = op2imm ? alu_i_imm : alu_i_rs2;
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wire nop = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_NOP ] ;
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// The NOP is encoded as ADDI, so need to uncheck it
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assign alu_req_alu_add = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_ADD ] & (~nop);
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assign alu_req_alu_sub = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SUB ];
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assign alu_req_alu_xor = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_XOR ];
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assign alu_req_alu_sll = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLL ];
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assign alu_req_alu_srl = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SRL ];
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assign alu_req_alu_sra = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SRA ];
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assign alu_req_alu_or = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OR ];
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assign alu_req_alu_and = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_AND ];
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assign alu_req_alu_slt = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLT ];
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assign alu_req_alu_sltu = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLTU];
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assign alu_req_alu_lui = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_LUI ];
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//alu_i_active_r
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sirv_gnrl_dffr #(1) alu_i_active_r_dffr (alu_i_active, alu_i_active_r, clk, rst_n);
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//alu_o_wbck_wdat
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sirv_gnrl_dfflr #(`QBMCU_XLEN) alu_o_wbck_wdat_dfflr (alu_i_active_r, alu_req_alu_res, alu_o_wbck_wdat, clk, rst_n);
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//alu_o_wbck_valid
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sirv_gnrl_dfflr #(1) alu_o_wbck_valid_dfflr (alu_i_active_r, alu_i_op, alu_o_wbck_valid, clk, rst_n);
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endmodule
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`include "qbmcu_undefines.v" |