24 lines
541 B
Verilog
24 lines
541 B
Verilog
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//Defining Memory Types
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//`define BEHAVIOR_SIM
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//`define XILINX_FPGA
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`define TSMC_IC
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//Is the chip a 4-channel one?
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//`define CHANNEL_IS_FOUR 1
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//Whether to instantiate the XY-channel
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`define CHANNEL_XY_ON 1
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//Whether to instantiate the Z-channel
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`define CHANNEL_Z_ON 1
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//Setting the Number of SPI Slave Devices
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`define SLVNUM 26
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//Whether SPI Bus Commands Are Buffered
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`define SPIBUS_CMD_REG 1
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//Whether SPI Bus Readout Are Buffered
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`define SPIBUS_OUT_REG 0
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//Whether Mod mux dout Are Buffered
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//`define MODDOUT_MUX_REG
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