SPI_Test/tb/qumcu/isa/case/Sub_test/main.s

11 lines
113 B
ArmAsm

lui x3,0x10
addi x3,x3,0x0
addi x3,x3,0x0
addi x3,x3,0
addi x5,x0,0x1
loop:
sub x3,x3,x5
bne x3, x0, loop
exit: