SPI_Test/case2/Makefile

18 lines
847 B
Makefile

VCS = vcs -full64 -sverilog +lint=TFIPC-L +v2k -debug_access+all +define+DUMP_FSDB -lca -q -timescale=1ns/1ps +nospecify -P /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/novas_new_dumper.tab /home/synopsys/verdi/Verdi_O-2018.09-SP2/share/PLI/VCS/linux64/pli.a -l compile.log -R +plusarg_save +ntb_random_seed_automatic -cm line+cond+fsm+tgl+branch
SIMV = ./simv -l sim.log -cm_dir ./coverage/test1db -cm line+cond+fsm+tgl+branch
all:comp run
comp:
${VCS} -f files.f +incdir+./../rtl/qubitmcu
run:
${SIMV}
file:
find ../../rtl -name "*.*v" > files.f
dbg:
verdi -sverilog -f files.f -top TB -nologo &
cov:
urg -lca -dir simv.vdb -report both -dir ./coverage/test1db
clean:
rm -rf DVE* simv* TB1* *log ucli.key verdiLog urgReport csrc both coverage novas.conf novas_dump.log reports.txt *.fsdb *.dat *.daidir *.vdb *.vf*~