module 	DUC_HB2_TOP_S		(clkl,
                rstn,
				din0,
				din1,
				dout_p0,
				dout_p1,
				dout_p2,
				dout_p3
				);
input	clkl,rstn;
input	[15:0]	din0;
input	[15:0]	din1;

output	[15:0]	dout_p0;
output	[15:0]	dout_p1;
output	[15:0]	dout_p2;
output	[15:0]	dout_p3;


reg	[15:0]	din_r1;
reg	[15:0]	din_r2;
reg	[15:0]	din_r3;
reg	[15:0]	din_r4;
reg	[15:0]	din_r5;
reg	[15:0]	din_r6;
reg	[15:0]	din_r7;
reg	[15:0]	din_r8;
reg	[15:0]	din_r9;
reg	[15:0]	din_r10;
reg	[15:0]	din_r11;
reg	[15:0]	din_r12;
reg	[15:0]	din_r13;
reg	[15:0]	din_r14;

always@(posedge clkl or negedge rstn)
	if(!rstn)
	begin
		din_r1	<=	'b0;
		din_r2	<=	'b0;
		din_r3	<=	'b0;
		din_r4	<=	'b0;
		din_r5	<=	'b0;
		din_r6	<=	'b0;
		din_r7	<=	'b0;
		din_r8	<=	'b0;
		din_r9	<=	'b0;
		din_r10	<=	'b0;
		din_r11	<=	'b0;
		din_r12	<=	'b0;
	end
	else
	begin
		din_r1	<=	din1;
		din_r3	<=	din_r1;
		din_r5	<=	din_r3;
		din_r7	<=	din_r5;
		din_r9	<=	din_r7;
		din_r11	<=	din_r9;
		din_r13	<=	din_r11;

		din_r2	<=	din0;	
		din_r4	<=	din_r2;		
		din_r6	<=	din_r4;
		din_r8	<=	din_r6;
		din_r10	<=	din_r8;
		din_r12	<=	din_r10;
		din_r14	<=	din_r12;
	end




DUC_HB2	 	inst0_duc_hb2(
				.clk		(clkl),	
				.rstn		(rstn),	
				.din_0		(din1),	
				.din_1		(din0),	
				.din_2		(din_r1),	 
				.din_3		(din_r2),	
				.din_4		(din_r3),
				.din_5		(din_r4),
                .din_6		(din_r5), //dout_p0
                .din_7		(din_r6),
                .din_8		(din_r7),
                .din_9		(din_r8),
                .din_a		(din_r9),
                .din_b		(din_r10),				
				.dout		(dout_p1)
		 	);


assign		dout_p0 =       din_r13;


DUC_HB2	 	inst1_duc_hb2(
				.clk		(clkl),	
				.rstn		(rstn),	
				.din_0		(din0),	
				.din_1		(din_r1),	
				.din_2		(din_r2),	 
				.din_3		(din_r3),	
				.din_4		(din_r4),
				.din_5		(din_r5),
                .din_6		(din_r6), //dout_p2
                .din_7		(din_r7),
                .din_8		(din_r8),
                .din_9		(din_r9),
                .din_a		(din_r10),
                .din_b		(din_r11),				
				.dout		(dout_p3)
		 	);


assign		dout_p2 =       din_r14;

endmodule