//+FHDR--------------------------------------------------------------------------------------------------------
//  Company: 
//-----------------------------------------------------------------------------------------------------------------
//  File Name             :    qbmcu_exu_alu.v
//  Department            :    
//  Author                :    PWY
//  Author's Tel          :     
//-----------------------------------------------------------------------------------------------------------------
//  Relese History
//  Version     Date            Author          Description
//  0.1         2024-03-13      PWY             This module to implement the regular ALU instructions
//-----------------------------------------------------------------------------------------------------------------
//  Keywords            :       
//
//-----------------------------------------------------------------------------------------------------------------
//  Parameter
//
//-----------------------------------------------------------------------------------------------------------------
//  Purpose                 :
//                      
//-----------------------------------------------------------------------------------------------------------------
//  Target Device:        
//  Tool versions:        
//-----------------------------------------------------------------------------------------------------------------
//  Reuse Issues
//  Reset Strategy: 
//  Clock Domains: 
//  Critical Timing:
//  Asynchronous I/F:
//  Synthesizable (y/n): 
//  Other:
//-FHDR--------------------------------------------------------------------------------------------------------
                                                                         
`include "qbmcu_defines.v"
                                                                        

module qbmcu_exu_alu(
  //system port
   input                                 clk
  ,input                                 rst_n
  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  ,input  [`QBMCU_XLEN-1             :0] alu_i_rs1
  ,input  [`QBMCU_XLEN-1             :0] alu_i_rs2
  ,input  [`QBMCU_XLEN-1             :0] alu_i_imm
  ,input  [`QBMCU_PC_SIZE-1          :0] alu_i_pc
  ,input  [`QBMCU_DECINFO_ALU_WIDTH-1:0] alu_i_info
  ,input                                 alu_i_op
  //The enable signal from the master control state machine
  ,input                                 alu_i_active
  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  //   The Write-Back Interface for Special (unaligned ldst and AMO instructions) 
  ,output [`QBMCU_XLEN-1             :0] alu_o_wbck_wdat
  ,output                                alu_o_wbck_valid
  //////////////////////////////////////////////////////////////
  //////////////////////////////////////////////////////////////
  // To share the ALU datapath
  // 
  // The operands and info to ALU
  ,output                                alu_req_alu_add 
  ,output                                alu_req_alu_sub 
  ,output                                alu_req_alu_xor 
  ,output                                alu_req_alu_sll 
  ,output                                alu_req_alu_srl 
  ,output                                alu_req_alu_sra 
  ,output                                alu_req_alu_or  
  ,output                                alu_req_alu_and 
  ,output                                alu_req_alu_slt 
  ,output                                alu_req_alu_sltu
  ,output                                alu_req_alu_lui 
  ,output [`QBMCU_XLEN-1             :0] alu_req_alu_op1
  ,output [`QBMCU_XLEN-1             :0] alu_req_alu_op2
                                     
  ,input  [`QBMCU_XLEN-1             :0] alu_req_alu_res
  );
wire alu_i_active_r;
wire op2imm  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OP2IMM ];
wire op1pc   = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OP1PC  ];

assign alu_req_alu_op1  = op1pc  ? alu_i_pc  : alu_i_rs1;
assign alu_req_alu_op2  = op2imm ? alu_i_imm : alu_i_rs2;

wire nop    = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_NOP ] ;

   // The NOP is encoded as ADDI, so need to uncheck it
assign alu_req_alu_add  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_ADD ] & (~nop);
assign alu_req_alu_sub  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SUB ];
assign alu_req_alu_xor  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_XOR ];
assign alu_req_alu_sll  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLL ];
assign alu_req_alu_srl  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SRL ];
assign alu_req_alu_sra  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SRA ];
assign alu_req_alu_or   = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_OR  ];
assign alu_req_alu_and  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_AND ];
assign alu_req_alu_slt  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLT ];
assign alu_req_alu_sltu = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_SLTU];
assign alu_req_alu_lui  = alu_i_op & alu_i_info [`QBMCU_DECINFO_ALU_LUI ];

//alu_i_active_r
sirv_gnrl_dffr #(1) alu_i_active_r_dffr (alu_i_active,  alu_i_active_r, clk, rst_n);  
//alu_o_wbck_wdat
sirv_gnrl_dfflr #(`QBMCU_XLEN) alu_o_wbck_wdat_dfflr (alu_i_active_r, alu_req_alu_res,  alu_o_wbck_wdat, clk, rst_n);
//alu_o_wbck_valid
sirv_gnrl_dfflr #(1) alu_o_wbck_valid_dfflr (alu_i_active_r, alu_i_op,  alu_o_wbck_valid, clk, rst_n);
endmodule
`include "qbmcu_undefines.v"