module  NCO(
                    clk,
                    rstn,
                    phase_manual_clr,
                    phase_auto_clr,
                    fcw,
                    pha,

                    cos_0,
                    cos_1,
                    cos_2,
                    cos_3,
                    cos_4,
                    cos_5,
                    cos_6,
                    cos_7,
                    cos_8,
                    cos_9,
                    cos_10,
                    cos_11,
                    cos_12,
                    cos_13,
                    cos_14,
                    cos_15,
                    
                    sin_0,
                    sin_1,
                    sin_2,
                    sin_3,
                    sin_4,
                    sin_5,
                    sin_6,
                    sin_7,
                    sin_8,
                    sin_9,
                    sin_10,
                    sin_11,
                    sin_12,
                    sin_13,
                    sin_14,
                    sin_15
                );

input               clk;
input               rstn;
input               phase_manual_clr;
input               phase_auto_clr;
input   [47:0]      fcw;
input   [15:0]      pha;

output   [15:0]     cos_0;
output   [15:0]     cos_1;
output   [15:0]     cos_2;
output   [15:0]     cos_3;
output   [15:0]     cos_4;
output   [15:0]     cos_5;
output   [15:0]     cos_6;
output   [15:0]     cos_7;
output   [15:0]     cos_8;
output   [15:0]     cos_9;
output   [15:0]     cos_10;
output   [15:0]     cos_11;
output   [15:0]     cos_12;
output   [15:0]     cos_13;
output   [15:0]     cos_14;
output   [15:0]     cos_15;

           
output   [15:0]     sin_0;
output   [15:0]     sin_1;
output   [15:0]     sin_2;
output   [15:0]     sin_3;
output   [15:0]     sin_4;
output   [15:0]     sin_5;
output   [15:0]     sin_6;
output   [15:0]     sin_7;
output   [15:0]     sin_8;
output   [15:0]     sin_9;
output   [15:0]     sin_10;
output   [15:0]     sin_11;
output   [15:0]     sin_12;
output   [15:0]     sin_13;
output   [15:0]     sin_14;
output   [15:0]     sin_15;


reg     [47:0]      fcw1_r1;
reg     [47:0]      fcw2_r1;
reg     [47:0]      fcw3_r1;
reg     [47:0]      fcw4_r1;
reg     [47:0]      fcw5_r1;
reg     [47:0]      fcw6_r1;
reg     [47:0]      fcw7_r1;
reg     [47:0]      fcw8_r1;
reg     [47:0]      fcw9_r1;
reg     [47:0]      fcw10_r1;
reg     [47:0]      fcw11_r1;
reg     [47:0]      fcw12_r1;
reg     [47:0]      fcw13_r1;
reg     [47:0]      fcw14_r1;
reg     [47:0]      fcw15_r1;
reg     [47:0]      fcw16_r1;


wire    [47:0]      fcw2_w;
wire    [47:0]      fcw4_w;
wire    [47:0]      fcw8_w;
wire    [47:0]      fcw16_w;

reg     [15:0]      pha_r;

assign              fcw2_w=fcw<<3'd1;
assign              fcw4_w=fcw<<3'd2;
assign              fcw8_w=fcw<<3'd3;
assign              fcw16_w=fcw<<3'd4;

always@(posedge clk or negedge rstn)
            if(!rstn)
            begin
                fcw1_r1		<=48'd0;
                fcw2_r1		<=48'd0;
                fcw3_r1		<=48'd0;
                fcw4_r1		<=48'd0;
                fcw5_r1		<=48'd0;
                fcw6_r1		<=48'd0;
                fcw7_r1		<=48'd0;
                fcw8_r1		<=48'd0;
                fcw9_r1		<=48'd0;
                fcw10_r1	<=48'd0;
                fcw11_r1	<=48'd0;
                fcw12_r1	<=48'd0;
                fcw13_r1	<=48'd0;
                fcw14_r1	<=48'd0;
                fcw15_r1	<=48'd0;
                fcw16_r1	<=48'd0;
             end
            else
            begin
                fcw1_r1		<=fcw;
                fcw2_r1		<=fcw2_w;
                fcw3_r1		<=fcw2_w+fcw;
                fcw4_r1		<=fcw4_w;
                fcw5_r1		<=fcw4_w+fcw;
                fcw6_r1		<=fcw4_w+fcw2_w;
                fcw7_r1		<=fcw8_w-fcw;
                fcw8_r1		<=fcw8_w;
                fcw9_r1		<=fcw8_w+fcw;
                fcw10_r1	<=fcw8_w+fcw2_w;
                fcw11_r1	<=fcw8_w+fcw2_w+fcw;
                fcw12_r1	<=fcw8_w+fcw4_w;
                fcw13_r1	<=fcw8_w+fcw4_w+fcw;
                fcw14_r1	<=fcw16_w-fcw2_w;
                fcw15_r1	<=fcw16_w-fcw;
                fcw16_r1	<=fcw16_w;
             
            end
			
always @(posedge clk or negedge rstn) begin
  if(!rstn) begin
    pha_r <= 16'd0;
  end
  else begin
    pha_r <= pha;
  end
end


wire	      clr_acc;
wire	      clr_fix;
assign        clr_acc = phase_auto_clr | phase_manual_clr;    
assign        clr_fix = phase_manual_clr;

wire		[15:0]	    s1_i_o;
wire		[15:0]	    s2_i_o;
wire		[15:0]	    s3_i_o;

P_NCO		inst_p_nco(
                 			.clk		(clk	        ),
                 			.rstn		(rstn	        ),
                 			.clr		(clr_fix        ),
                 			.clr_acc	(clr_acc        ),
                 			.pha		(pha_r	        ),
		 			.s1		(s1_i_o	        ),
		 			.s2		(s2_i_o	        ),
		 			.s3		(s3_i_o	        ),
		 			.s1_o		(s1_i_o	        ),
		 			.s2_o		(s2_i_o	        ),
		 			.s3_o		(s3_i_o	        ),
     		 			.fcw1		(fcw1_r1        ),
					.fcw2		(fcw2_r1        ),
					.fcw3		(fcw3_r1        ),
					.fcw4		(fcw4_r1        ),
     		 			.fcw5		(fcw5_r1        ),
					.fcw6		(fcw6_r1        ),
					.fcw7		(fcw7_r1        ),
					.fcw8		(fcw8_r1        ),
     		 			.fcw9		(fcw9_r1        ),
					.fcw10		(fcw10_r1        ),
					.fcw11		(fcw11_r1        ),
					.fcw12		(fcw12_r1        ),
     		 			.fcw13		(fcw13_r1        ),
					.fcw14		(fcw14_r1        ),
					.fcw15		(fcw15_r1        ),
					.fcw16		(fcw16_r1        ),
                 			.cos_0		(cos_0	        ),
                 			.cos_1		(cos_1	        ),
                 			.cos_2		(cos_2	        ),
                 			.cos_3		(cos_3	        ),
                 			.cos_4		(cos_4	        ),
                 			.cos_5		(cos_5	        ),
                 			.cos_6		(cos_6	        ),
                 			.cos_7		(cos_7	        ),
                 			.cos_8		(cos_8	        ),
                 			.cos_9		(cos_9	        ),
                 			.cos_10		(cos_10	        ),
                 			.cos_11		(cos_11	        ),
                 			.cos_12		(cos_12	        ),
                 			.cos_13		(cos_13	        ),
                 			.cos_14		(cos_14	        ),
                 			.cos_15		(cos_15	        ),

                 			.sin_0		(sin_0	        ),
                 			.sin_1		(sin_1	        ),
                 			.sin_2		(sin_2	        ),
                 			.sin_3		(sin_3	        ),
                 			.sin_4		(sin_4	        ),
                 			.sin_5		(sin_5	        ),
                 			.sin_6		(sin_6	        ),
                 			.sin_7		(sin_7	        ),
                 			.sin_8		(sin_8	        ),
                 			.sin_9		(sin_9	        ),
                 			.sin_10		(sin_10	        ),
                 			.sin_11		(sin_11	        ),
                 			.sin_12		(sin_12	        ),
                 			.sin_13		(sin_13	        ),
                 			.sin_14		(sin_14	        ),
                 			.sin_15		(sin_15	        )                                      

				);
endmodule