wire ram_clk = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CLK;
wire ram_cs = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CEBA;
wire reg_clk = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.clk;
wire reg_en = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_wen;
reg ram_cs_dly1 ;
reg reg_en_dly1 ;
always @(posedge ram_clk) begin
    ram_cs_dly1 <= ~ram_cs;
    reg_en_dly1 <= reg_en;
end


initial begin
    #1ns;
    //@(posedge ram_cs_dly1 );
    #5ns;
    //while(1)begin
        #1ns;
    //@(posedge reg_en_dly1 );
            REGFILE_CHECK(6'd1 ,32'haaaa_a000);
			REGFILE_CHECK(6'd1 ,32'haaaa_a004);
			REGFILE_CHECK(6'd1 ,32'haaaa_a008);
			REGFILE_CHECK(6'd1 ,32'haaaa_a00c);
            REGFILE_CHECK(6'd2 ,32'haaaa_a010);
			REGFILE_CHECK(6'd2 ,32'haaaa_a014);
			REGFILE_CHECK(6'd2 ,32'haaaa_a018);
			REGFILE_CHECK(6'd2 ,32'haaaa_a01c);
			REGFILE_CHECK(6'd3 ,32'haaaa_a020);
			REGFILE_CHECK(6'd3 ,32'haaaa_a024);
			REGFILE_CHECK(6'd3 ,32'haaaa_a028);
			REGFILE_CHECK(6'd3 ,32'haaaa_a02c);
			REGFILE_CHECK(6'd4 ,32'haaaa_a030);
			REGFILE_CHECK(6'd4 ,32'haaaa_a034);
			REGFILE_CHECK(6'd4 ,32'haaaa_a038);
			REGFILE_CHECK(6'd4 ,32'haaaa_a03c);
			REGFILE_CHECK(6'd5 ,32'haaaa_a040);
			REGFILE_CHECK(6'd5 ,32'haaaa_a044);
			REGFILE_CHECK(6'd5 ,32'haaaa_a048);
			REGFILE_CHECK(6'd5 ,32'haaaa_a04c);
			REGFILE_CHECK(6'd6 ,32'haaaa_a050);
			REGFILE_CHECK(6'd6 ,32'haaaa_a054);
			REGFILE_CHECK(6'd6 ,32'haaaa_a058);
			REGFILE_CHECK(6'd6 ,32'haaaa_a05c);
			REGFILE_CHECK(6'd7 ,32'haaaa_a060);
			REGFILE_CHECK(6'd7 ,32'haaaa_a064);
			REGFILE_CHECK(6'd7 ,32'haaaa_a068);
			REGFILE_CHECK(6'd7 ,32'haaaa_a06c);
			REGFILE_CHECK(6'd8 ,32'haaaa_a070);
			REGFILE_CHECK(6'd8 ,32'haaaa_a074);
			REGFILE_CHECK(6'd8 ,32'haaaa_a078);
			REGFILE_CHECK(6'd8 ,32'haaaa_a07c);
			REGFILE_CHECK(6'd9 ,32'haaaa_a080);
			REGFILE_CHECK(6'd9 ,32'haaaa_a084);
			REGFILE_CHECK(6'd9 ,32'haaaa_a088);
			REGFILE_CHECK(6'd9 ,32'haaaa_a08c);
			REGFILE_CHECK(6'd10,32'haaaa_a090);
			REGFILE_CHECK(6'd10,32'haaaa_a094);
			REGFILE_CHECK(6'd10,32'haaaa_a098);
			REGFILE_CHECK(6'd10,32'haaaa_a09c);
			REGFILE_CHECK(6'd11,32'haaaa_a0a0);
			REGFILE_CHECK(6'd11,32'haaaa_a0a4);
			REGFILE_CHECK(6'd11,32'haaaa_a0a8);
			REGFILE_CHECK(6'd11,32'haaaa_a0ac);
			REGFILE_CHECK(6'd12,32'haaaa_a0b0);
			REGFILE_CHECK(6'd12,32'haaaa_a0b4);
			REGFILE_CHECK(6'd12,32'haaaa_a0b8);
			REGFILE_CHECK(6'd12,32'haaaa_a0bc);
			REGFILE_CHECK(6'd13,32'haaaa_a0c0);
			REGFILE_CHECK(6'd13,32'haaaa_a0c4);
			REGFILE_CHECK(6'd13,32'haaaa_a0c8);
			REGFILE_CHECK(6'd13,32'haaaa_a0cc);
			REGFILE_CHECK(6'd14,32'haaaa_a0d0);
			REGFILE_CHECK(6'd14,32'haaaa_a0d4);
			REGFILE_CHECK(6'd14,32'haaaa_a0d8);
			REGFILE_CHECK(6'd14,32'haaaa_a0dc);
			REGFILE_CHECK(6'd15,32'haaaa_a0e0);
			REGFILE_CHECK(6'd15,32'haaaa_a0e4);
			REGFILE_CHECK(6'd15,32'haaaa_a0e8);
			REGFILE_CHECK(6'd15,32'haaaa_a0ec);
			REGFILE_CHECK(6'd16,32'haaaa_a0f0);
			REGFILE_CHECK(6'd16,32'haaaa_a0f4);
			REGFILE_CHECK(6'd16,32'haaaa_a0f8);
			REGFILE_CHECK(6'd16,32'haaaa_a0fc);
			REGFILE_CHECK(6'd17,32'haaaa_a100);
			REGFILE_CHECK(6'd17,32'haaaa_a104);
			REGFILE_CHECK(6'd17,32'haaaa_a108);
			REGFILE_CHECK(6'd17,32'haaaa_a10c);
			REGFILE_CHECK(6'd18,32'haaaa_a110);
			REGFILE_CHECK(6'd18,32'haaaa_a114);
			REGFILE_CHECK(6'd18,32'haaaa_a118);
			REGFILE_CHECK(6'd18,32'haaaa_a11c);
			REGFILE_CHECK(6'd19,32'haaaa_a120);
			REGFILE_CHECK(6'd19,32'haaaa_a124);
			REGFILE_CHECK(6'd19,32'haaaa_a128);
			REGFILE_CHECK(6'd19,32'haaaa_a12c);
			REGFILE_CHECK(6'd20,32'haaaa_a130);
			REGFILE_CHECK(6'd20,32'haaaa_a134);
			REGFILE_CHECK(6'd20,32'haaaa_a138);
			REGFILE_CHECK(6'd20,32'haaaa_a13c);
			REGFILE_CHECK(6'd21,32'haaaa_a140);
			REGFILE_CHECK(6'd21,32'haaaa_a144);
			REGFILE_CHECK(6'd21,32'haaaa_a148);
			REGFILE_CHECK(6'd21,32'haaaa_a14c);
			REGFILE_CHECK(6'd22,32'haaaa_a150);
			REGFILE_CHECK(6'd22,32'haaaa_a154);
			REGFILE_CHECK(6'd22,32'haaaa_a158);
			REGFILE_CHECK(6'd22,32'haaaa_a15c);
			REGFILE_CHECK(6'd23,32'haaaa_a160);
			REGFILE_CHECK(6'd23,32'haaaa_a164);
			REGFILE_CHECK(6'd23,32'haaaa_a168);
			REGFILE_CHECK(6'd23,32'haaaa_a16c);
			REGFILE_CHECK(6'd24,32'haaaa_a170);
			REGFILE_CHECK(6'd24,32'haaaa_a174);
			REGFILE_CHECK(6'd24,32'haaaa_a178);
			REGFILE_CHECK(6'd24,32'haaaa_a17c);
			REGFILE_CHECK(6'd25,32'haaaa_a180);
			REGFILE_CHECK(6'd25,32'haaaa_a184);
			REGFILE_CHECK(6'd25,32'haaaa_a188);
			REGFILE_CHECK(6'd25,32'haaaa_a18c);
			REGFILE_CHECK(6'd26,32'haaaa_a190);
			REGFILE_CHECK(6'd26,32'haaaa_a194);
			REGFILE_CHECK(6'd26,32'haaaa_a198);
			REGFILE_CHECK(6'd26,32'haaaa_a19c);
			REGFILE_CHECK(6'd27,32'haaaa_a1a0);
			REGFILE_CHECK(6'd27,32'haaaa_a1a4);
			REGFILE_CHECK(6'd27,32'haaaa_a1a8);
			REGFILE_CHECK(6'd27,32'haaaa_a1ac);
			REGFILE_CHECK(6'd28,32'haaaa_a1b0);
			REGFILE_CHECK(6'd28,32'haaaa_a1b4);
			REGFILE_CHECK(6'd28,32'haaaa_a1b8);
			REGFILE_CHECK(6'd28,32'haaaa_a1bc);
			REGFILE_CHECK(6'd29,32'haaaa_a1c0);
			REGFILE_CHECK(6'd29,32'haaaa_a1c4);
			REGFILE_CHECK(6'd29,32'haaaa_a1c8);
			REGFILE_CHECK(6'd29,32'haaaa_a1cc);
			REGFILE_CHECK(6'd30,32'haaaa_a1d0);
			REGFILE_CHECK(6'd30,32'haaaa_a1d4);
			REGFILE_CHECK(6'd30,32'haaaa_a1d8);
			REGFILE_CHECK(6'd30,32'haaaa_a1dc);
			REGFILE_CHECK(6'd31,32'haaaa_a1e0);
			REGFILE_CHECK(6'd31,32'haaaa_a1e4);
			REGFILE_CHECK(6'd31,32'haaaa_a1e8);
			REGFILE_CHECK(6'd31,32'haaaa_a1ec);
    #10us;
    TEST_PASS;
end

task DRAM_DATA_CHECK;
    input   [9:0]   addr    ;
    input   [31:0]  edata   ;

    logic   [31:0]  ram_data;

    @(posedge ram_cs_dly1 );
    @(posedge ram_clk );
     //$monitor($time, " Simulation time: %t", $time);
    if(ram_cs_dly1) begin
        ram_data = `TB_DRAM.mem[addr];
        //$display("* RAM_DATA[%x]: %x | EXP_DATA: %x ",addr,ram_data, edata);
        if(ram_data !== edata) begin
            $display("* RAM_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,ram_data, edata);
            #1us;
            TEST_FAIL;
        end
        $display("* RAM_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, ram_data, edata);
    end
    else begin
            $display("* DRAM CS is High => Error!!!");
            TEST_FAIL;
    end
endtask

task REGFILE_CHECK;
    input   [4:0]   addr    ;
    input   [31:0]  edata   ;

    logic   [31:0]  reg_data;
    @(posedge reg_en );
    @(posedge reg_clk);
    if(reg_en)begin
        reg_data = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_dat;
        if(reg_data !== edata) begin
            $display("* REG_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,reg_data, edata);
            #1us;
            //TEST_FAIL;
        end
        $display("* REG_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, reg_data, edata);
    end
    else begin
            $display("* REG WR EN is High => Error!!!");
            //TEST_FAIL;
    end

endtask

initial begin
    #100us;
    $display("\n----------------------------------------\n");
    $display("\t Timeout Error !!!!\n");
    TEST_FAIL;
end