wire ram_clk = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CLK;
wire ram_cs = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CEBA;
wire reg_clk = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.clk;
wire reg_en = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_wen;
reg ram_cs_dly1 ;
reg reg_en_dly1 ;
always @(posedge ram_clk) begin
    ram_cs_dly1 <= ~ram_cs;
    reg_en_dly1 <= reg_en;
end


initial begin
    #1ns;
    //@(posedge ram_cs_dly1 );
    #5ns;
    //while(1)begin
        #1ns;
    //@(posedge reg_en_dly1 );
            REGFILE_CHECK(6'd1,32'h0000_1000);
			REGFILE_CHECK(6'd1,32'h0000_1004);
			REGFILE_CHECK(6'd1,32'h0000_1008);
			REGFILE_CHECK(6'd1,32'h0000_100c);
            REGFILE_CHECK(6'd2,32'h0000_1010);
			REGFILE_CHECK(6'd2,32'h0000_1014);
			REGFILE_CHECK(6'd2,32'h0000_1018);
			REGFILE_CHECK(6'd2,32'h0000_101c);
			REGFILE_CHECK(6'd3,32'h0000_1020);
			REGFILE_CHECK(6'd3,32'h0000_1024);
			REGFILE_CHECK(6'd3,32'h0000_1028);
			REGFILE_CHECK(6'd3,32'h0000_102c);
			REGFILE_CHECK(6'd4,32'h0000_1030);
			REGFILE_CHECK(6'd4,32'h0000_1034);
			REGFILE_CHECK(6'd4,32'h0000_1038);
			REGFILE_CHECK(6'd4,32'h0000_103c);
			REGFILE_CHECK(6'd5,32'h0000_1040);
			REGFILE_CHECK(6'd5,32'h0000_1044);
			REGFILE_CHECK(6'd5,32'h0000_1048);
			REGFILE_CHECK(6'd5,32'h0000_104c);
			REGFILE_CHECK(6'd6,32'h0000_1050);
			REGFILE_CHECK(6'd6,32'h0000_1054);
			REGFILE_CHECK(6'd6,32'h0000_1058);
			REGFILE_CHECK(6'd6,32'h0000_105c);
			REGFILE_CHECK(6'd7,32'h0000_1060);
			REGFILE_CHECK(6'd7,32'h0000_1064);
			REGFILE_CHECK(6'd7,32'h0000_1068);
			REGFILE_CHECK(6'd7,32'h0000_106c);
			REGFILE_CHECK(6'd8,32'h0000_1070);
			REGFILE_CHECK(6'd8,32'h0000_1074);
			REGFILE_CHECK(6'd8,32'h0000_1078);
			REGFILE_CHECK(6'd8,32'h0000_107c);
			REGFILE_CHECK(6'd9,32'h0000_1080);
			REGFILE_CHECK(6'd9,32'h0000_1084);
			REGFILE_CHECK(6'd9,32'h0000_1088);
			REGFILE_CHECK(6'd9,32'h0000_108c);
			REGFILE_CHECK(6'd10,32'h0000_1090);
			REGFILE_CHECK(6'd10,32'h0000_1094);
			REGFILE_CHECK(6'd10,32'h0000_1098);
			REGFILE_CHECK(6'd10,32'h0000_109c);
			REGFILE_CHECK(6'd11,32'h0000_10a0);
			REGFILE_CHECK(6'd11,32'h0000_10a4);
			REGFILE_CHECK(6'd11,32'h0000_10a8);
			REGFILE_CHECK(6'd11,32'h0000_10ac);
			REGFILE_CHECK(6'd12,32'h0000_10b0);
			REGFILE_CHECK(6'd12,32'h0000_10b4);
			REGFILE_CHECK(6'd12,32'h0000_10b8);
			REGFILE_CHECK(6'd12,32'h0000_10bc);
			REGFILE_CHECK(6'd13,32'h0000_10c0);
			REGFILE_CHECK(6'd13,32'h0000_10c4);
			REGFILE_CHECK(6'd13,32'h0000_10c8);
			REGFILE_CHECK(6'd13,32'h0000_10cc);
			REGFILE_CHECK(6'd14,32'h0000_10d0);
			REGFILE_CHECK(6'd14,32'h0000_10d4);
			REGFILE_CHECK(6'd14,32'h0000_10d8);
			REGFILE_CHECK(6'd14,32'h0000_10dc);
			REGFILE_CHECK(6'd15,32'h0000_10e0);
			REGFILE_CHECK(6'd15,32'h0000_10e4);
			REGFILE_CHECK(6'd15,32'h0000_10e8);
			REGFILE_CHECK(6'd15,32'h0000_10ec);
			REGFILE_CHECK(6'd16,32'h0000_10f0);
			REGFILE_CHECK(6'd16,32'h0000_10f4);
			REGFILE_CHECK(6'd16,32'h0000_10f8);
			REGFILE_CHECK(6'd16,32'h0000_10fc);
			REGFILE_CHECK(6'd17,32'h0000_1100);
			REGFILE_CHECK(6'd17,32'h0000_1104);
			REGFILE_CHECK(6'd17,32'h0000_1108);
			REGFILE_CHECK(6'd17,32'h0000_110c);
			REGFILE_CHECK(6'd18,32'h0000_1110);
			REGFILE_CHECK(6'd18,32'h0000_1114);
			REGFILE_CHECK(6'd18,32'h0000_1118);
			REGFILE_CHECK(6'd18,32'h0000_111c);
			REGFILE_CHECK(6'd19,32'h0000_1120);
			REGFILE_CHECK(6'd19,32'h0000_1124);
			REGFILE_CHECK(6'd19,32'h0000_1128);
			REGFILE_CHECK(6'd19,32'h0000_112c);
			REGFILE_CHECK(6'd20,32'h0000_1130);
			REGFILE_CHECK(6'd20,32'h0000_1134);
			REGFILE_CHECK(6'd20,32'h0000_1138);
			REGFILE_CHECK(6'd20,32'h0000_113c);
			REGFILE_CHECK(6'd21,32'h0000_1140);
			REGFILE_CHECK(6'd21,32'h0000_1144);
			REGFILE_CHECK(6'd21,32'h0000_1148);
			REGFILE_CHECK(6'd21,32'h0000_114c);
			REGFILE_CHECK(6'd22,32'h0000_1150);
			REGFILE_CHECK(6'd22,32'h0000_1154);
			REGFILE_CHECK(6'd22,32'h0000_1158);
			REGFILE_CHECK(6'd22,32'h0000_115c);
			REGFILE_CHECK(6'd23,32'h0000_1160);
			REGFILE_CHECK(6'd23,32'h0000_1164);
			REGFILE_CHECK(6'd23,32'h0000_1168);
			REGFILE_CHECK(6'd23,32'h0000_116c);
			REGFILE_CHECK(6'd24,32'h0000_1170);
			REGFILE_CHECK(6'd24,32'h0000_1174);
			REGFILE_CHECK(6'd24,32'h0000_1178);
			REGFILE_CHECK(6'd24,32'h0000_117c);
			REGFILE_CHECK(6'd25,32'h0000_1180);
			REGFILE_CHECK(6'd25,32'h0000_1184);
			REGFILE_CHECK(6'd25,32'h0000_1188);
			REGFILE_CHECK(6'd25,32'h0000_118c);
			REGFILE_CHECK(6'd26,32'h0000_1190);
			REGFILE_CHECK(6'd26,32'h0000_1194);
			REGFILE_CHECK(6'd26,32'h0000_1198);
			REGFILE_CHECK(6'd26,32'h0000_119c);
			REGFILE_CHECK(6'd27,32'h0000_11a0);
			REGFILE_CHECK(6'd27,32'h0000_11a4);
			REGFILE_CHECK(6'd27,32'h0000_11a8);
			REGFILE_CHECK(6'd27,32'h0000_11ac);
			REGFILE_CHECK(6'd28,32'h0000_11b0);
			REGFILE_CHECK(6'd28,32'h0000_11b4);
			REGFILE_CHECK(6'd28,32'h0000_11b8);
			REGFILE_CHECK(6'd28,32'h0000_11bc);
			REGFILE_CHECK(6'd29,32'h0000_11c0);
			REGFILE_CHECK(6'd29,32'h0000_11c4);
			REGFILE_CHECK(6'd29,32'h0000_11c8);
			REGFILE_CHECK(6'd29,32'h0000_11cc);
			REGFILE_CHECK(6'd30,32'h0000_11d0);
			REGFILE_CHECK(6'd30,32'h0000_11d4);
			REGFILE_CHECK(6'd30,32'h0000_11d8);
			REGFILE_CHECK(6'd30,32'h0000_11dc);
			REGFILE_CHECK(6'd31,32'h0000_11e0);
			REGFILE_CHECK(6'd31,32'h0000_11e4);
			REGFILE_CHECK(6'd31,32'h0000_11e8);
			REGFILE_CHECK(6'd31,32'h0000_11ec);
    #10us;
    TEST_PASS;
end

task DRAM_DATA_CHECK;
    input   [9:0]   addr    ;
    input   [31:0]  edata   ;

    logic   [31:0]  ram_data;

    @(posedge ram_cs_dly1 );
    @(posedge ram_clk );
     //$monitor($time, " Simulation time: %t", $time);
    if(ram_cs_dly1) begin
        ram_data = `TB_DRAM.mem[addr];
        //$display("* RAM_DATA[%x]: %x | EXP_DATA: %x ",addr,ram_data, edata);
        if(ram_data !== edata) begin
            $display("* RAM_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,ram_data, edata);
            #1us;
            TEST_FAIL;
        end
        $display("* RAM_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, ram_data, edata);
    end
    else begin
            $display("* DRAM CS is High => Error!!!");
            TEST_FAIL;
    end
endtask

task REGFILE_CHECK;
    input   [4:0]   addr    ;
    input   [31:0]  edata   ;

    logic   [31:0]  reg_data;
    @(posedge reg_en );
    @(posedge reg_clk);
    if(reg_en)begin
        reg_data = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_dat;
        if(reg_data !== edata) begin
            $display("* REG_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,reg_data, edata);
            #1us;
            //TEST_FAIL;
        end
        $display("* REG_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, reg_data, edata);
    end
    else begin
            $display("* REG WR EN is High => Error!!!");
            //TEST_FAIL;
    end

endtask

initial begin
    #100us;
    $display("\n----------------------------------------\n");
    $display("\t Timeout Error !!!!\n");
    TEST_FAIL;
end