76 lines
2.9 KiB
ArmAsm
76 lines
2.9 KiB
ArmAsm
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# See LICENSE for license details.
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#*****************************************************************************
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# srliw.S
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#-----------------------------------------------------------------------------
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#
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# Test srliw instruction.
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#
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#include "riscv_test.h"
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#include "test_macros.h"
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RVTEST_RV64U
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RVTEST_CODE_BEGIN
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#-------------------------------------------------------------
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# Arithmetic tests
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#-------------------------------------------------------------
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TEST_IMM_OP( 2, srliw, 0xffffffff80000000, 0xffffffff80000000, 0 );
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TEST_IMM_OP( 3, srliw, 0x0000000040000000, 0xffffffff80000000, 1 );
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TEST_IMM_OP( 4, srliw, 0x0000000001000000, 0xffffffff80000000, 7 );
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TEST_IMM_OP( 5, srliw, 0x0000000000020000, 0xffffffff80000000, 14 );
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TEST_IMM_OP( 6, srliw, 0x0000000000000001, 0xffffffff80000001, 31 );
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TEST_IMM_OP( 7, srliw, 0xffffffffffffffff, 0xffffffffffffffff, 0 );
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TEST_IMM_OP( 8, srliw, 0x000000007fffffff, 0xffffffffffffffff, 1 );
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TEST_IMM_OP( 9, srliw, 0x0000000001ffffff, 0xffffffffffffffff, 7 );
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TEST_IMM_OP( 10, srliw, 0x000000000003ffff, 0xffffffffffffffff, 14 );
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TEST_IMM_OP( 11, srliw, 0x0000000000000001, 0xffffffffffffffff, 31 );
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TEST_IMM_OP( 12, srliw, 0x0000000021212121, 0x0000000021212121, 0 );
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TEST_IMM_OP( 13, srliw, 0x0000000010909090, 0x0000000021212121, 1 );
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TEST_IMM_OP( 14, srliw, 0x0000000000424242, 0x0000000021212121, 7 );
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TEST_IMM_OP( 15, srliw, 0x0000000000008484, 0x0000000021212121, 14 );
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TEST_IMM_OP( 16, srliw, 0x0000000000000000, 0x0000000021212121, 31 );
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# Verify that shifts ignore top 32 (using true 64-bit values)
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TEST_IMM_OP( 44, srliw, 0x0000000012345678, 0xffffffff12345678, 0 );
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TEST_IMM_OP( 45, srliw, 0x0000000001234567, 0xffffffff12345678, 4 );
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TEST_IMM_OP( 46, srliw, 0xffffffff92345678, 0x0000000092345678, 0 );
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TEST_IMM_OP( 47, srliw, 0x0000000009234567, 0x0000000092345678, 4 );
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#-------------------------------------------------------------
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# Source/Destination tests
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#-------------------------------------------------------------
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TEST_IMM_SRC1_EQ_DEST( 17, srliw, 0x0000000001000000, 0xffffffff80000000, 7 );
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#-------------------------------------------------------------
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# Bypassing tests
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#-------------------------------------------------------------
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TEST_IMM_DEST_BYPASS( 18, 0, srliw, 0x0000000001000000, 0xffffffff80000000, 7 );
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TEST_IMM_DEST_BYPASS( 19, 1, srliw, 0x0000000000020000, 0xffffffff80000000, 14 );
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TEST_IMM_DEST_BYPASS( 20, 2, srliw, 0x0000000000000001, 0xffffffff80000001, 31 );
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TEST_IMM_SRC1_BYPASS( 21, 0, srliw, 0x0000000001000000, 0xffffffff80000000, 7 );
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TEST_IMM_SRC1_BYPASS( 22, 1, srliw, 0x0000000000020000, 0xffffffff80000000, 14 );
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TEST_IMM_SRC1_BYPASS( 23, 2, srliw, 0x0000000000000001, 0xffffffff80000001, 31 );
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TEST_IMM_ZEROSRC1( 24, srliw, 0, 31 );
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TEST_IMM_ZERODEST( 25, srliw, 31, 28 );
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TEST_PASSFAIL
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RVTEST_CODE_END
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.data
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RVTEST_DATA_BEGIN
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TEST_DATA
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RVTEST_DATA_END
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