SPI_Test/tb/qumcu/isa/case/Sub_test/main.s

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ArmAsm
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2024-06-25 16:41:01 +08:00
lui x3,0x10
addi x3,x3,0x0
addi x3,x3,0x0
addi x3,x3,0
addi x5,x0,0x1
loop:
sub x3,x3,x5
bne x3, x0, loop
exit: