21 lines
792 B
Systemverilog
21 lines
792 B
Systemverilog
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initial begin
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#10ns;
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[1].rfno0.rf_dfflr.qout_r == 32'hffff_fffb);
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[2].rfno0.rf_dfflr.qout_r == 32'hffff_fffc);
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[3].rfno0.rf_dfflr.qout_r == 32'h50000);
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[4].rfno0.rf_dfflr.qout_r == 32'h00000);
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[5].rfno0.rf_dfflr.qout_r == 32'h70000);
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wait(tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.regfile[6].rfno0.rf_dfflr.qout_r == 32'h80000);
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TEST_PASS;
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end
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initial begin
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#100us;
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$display("\n----------------------------------------\n");
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$display("\t Timeout Error !!!!\n");
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TEST_FAIL;
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end
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