204 lines
6.9 KiB
Systemverilog
204 lines
6.9 KiB
Systemverilog
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wire ram_clk = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CLK;
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wire ram_cs = `TB.U_CHIP_TOP.U_DTCM.U_tsmc_dpram.dpram_32X4096_generation.U0_TSDN28HPCPUHDB4096X32M4MWR.CEBA;
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wire reg_clk = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.clk;
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wire reg_en = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_wen;
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reg ram_cs_dly1 ;
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reg reg_en_dly1 ;
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always @(posedge ram_clk) begin
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ram_cs_dly1 <= ~ram_cs;
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reg_en_dly1 <= reg_en;
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end
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initial begin
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#1ns;
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//@(posedge ram_cs_dly1 );
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#5ns;
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//while(1)begin
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#1ns;
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//@(posedge reg_en_dly1 );
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REGFILE_CHECK(6'd1 ,32'hffff_f000);
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REGFILE_CHECK(6'd1 ,32'hffff_f004);
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REGFILE_CHECK(6'd1 ,32'hffff_f008);
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REGFILE_CHECK(6'd1 ,32'hffff_f00c);
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REGFILE_CHECK(6'd2 ,32'hffff_f010);
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REGFILE_CHECK(6'd2 ,32'hffff_f014);
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REGFILE_CHECK(6'd2 ,32'hffff_f018);
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REGFILE_CHECK(6'd2 ,32'hffff_f01c);
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REGFILE_CHECK(6'd3 ,32'hffff_f020);
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REGFILE_CHECK(6'd3 ,32'hffff_f024);
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REGFILE_CHECK(6'd3 ,32'hffff_f028);
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REGFILE_CHECK(6'd3 ,32'hffff_f02c);
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REGFILE_CHECK(6'd4 ,32'hffff_f030);
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REGFILE_CHECK(6'd4 ,32'hffff_f034);
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REGFILE_CHECK(6'd4 ,32'hffff_f038);
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REGFILE_CHECK(6'd4 ,32'hffff_f03c);
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REGFILE_CHECK(6'd5 ,32'hffff_f040);
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REGFILE_CHECK(6'd5 ,32'hffff_f044);
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REGFILE_CHECK(6'd5 ,32'hffff_f048);
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REGFILE_CHECK(6'd5 ,32'hffff_f04c);
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REGFILE_CHECK(6'd6 ,32'hffff_f050);
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REGFILE_CHECK(6'd6 ,32'hffff_f054);
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REGFILE_CHECK(6'd6 ,32'hffff_f058);
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REGFILE_CHECK(6'd6 ,32'hffff_f05c);
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REGFILE_CHECK(6'd7 ,32'hffff_f060);
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REGFILE_CHECK(6'd7 ,32'hffff_f064);
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REGFILE_CHECK(6'd7 ,32'hffff_f068);
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REGFILE_CHECK(6'd7 ,32'hffff_f06c);
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REGFILE_CHECK(6'd8 ,32'hffff_f070);
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REGFILE_CHECK(6'd8 ,32'hffff_f074);
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REGFILE_CHECK(6'd8 ,32'hffff_f078);
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REGFILE_CHECK(6'd8 ,32'hffff_f07c);
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REGFILE_CHECK(6'd9 ,32'hffff_f080);
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REGFILE_CHECK(6'd9 ,32'hffff_f084);
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REGFILE_CHECK(6'd9 ,32'hffff_f088);
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REGFILE_CHECK(6'd9 ,32'hffff_f08c);
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REGFILE_CHECK(6'd10,32'hffff_f090);
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REGFILE_CHECK(6'd10,32'hffff_f094);
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REGFILE_CHECK(6'd10,32'hffff_f098);
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REGFILE_CHECK(6'd10,32'hffff_f09c);
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REGFILE_CHECK(6'd11,32'hffff_f0a0);
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REGFILE_CHECK(6'd11,32'hffff_f0a4);
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REGFILE_CHECK(6'd11,32'hffff_f0a8);
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REGFILE_CHECK(6'd11,32'hffff_f0ac);
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REGFILE_CHECK(6'd12,32'hffff_f0b0);
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REGFILE_CHECK(6'd12,32'hffff_f0b4);
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REGFILE_CHECK(6'd12,32'hffff_f0b8);
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REGFILE_CHECK(6'd12,32'hffff_f0bc);
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REGFILE_CHECK(6'd13,32'hffff_f0c0);
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REGFILE_CHECK(6'd13,32'hffff_f0c4);
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REGFILE_CHECK(6'd13,32'hffff_f0c8);
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REGFILE_CHECK(6'd13,32'hffff_f0cc);
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REGFILE_CHECK(6'd14,32'hffff_f0d0);
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REGFILE_CHECK(6'd14,32'hffff_f0d4);
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REGFILE_CHECK(6'd14,32'hffff_f0d8);
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REGFILE_CHECK(6'd14,32'hffff_f0dc);
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REGFILE_CHECK(6'd15,32'hffff_f0e0);
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REGFILE_CHECK(6'd15,32'hffff_f0e4);
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REGFILE_CHECK(6'd15,32'hffff_f0e8);
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REGFILE_CHECK(6'd15,32'hffff_f0ec);
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REGFILE_CHECK(6'd16,32'hffff_f0f0);
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REGFILE_CHECK(6'd16,32'hffff_f0f4);
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REGFILE_CHECK(6'd16,32'hffff_f0f8);
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REGFILE_CHECK(6'd16,32'hffff_f0fc);
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REGFILE_CHECK(6'd17,32'hffff_f100);
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REGFILE_CHECK(6'd17,32'hffff_f104);
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REGFILE_CHECK(6'd17,32'hffff_f108);
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REGFILE_CHECK(6'd17,32'hffff_f10c);
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REGFILE_CHECK(6'd18,32'hffff_f110);
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REGFILE_CHECK(6'd18,32'hffff_f114);
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REGFILE_CHECK(6'd18,32'hffff_f118);
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REGFILE_CHECK(6'd18,32'hffff_f11c);
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REGFILE_CHECK(6'd19,32'hffff_f120);
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REGFILE_CHECK(6'd19,32'hffff_f124);
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REGFILE_CHECK(6'd19,32'hffff_f128);
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REGFILE_CHECK(6'd19,32'hffff_f12c);
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REGFILE_CHECK(6'd20,32'hffff_f130);
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REGFILE_CHECK(6'd20,32'hffff_f134);
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REGFILE_CHECK(6'd20,32'hffff_f138);
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REGFILE_CHECK(6'd20,32'hffff_f13c);
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REGFILE_CHECK(6'd21,32'hffff_f140);
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REGFILE_CHECK(6'd21,32'hffff_f144);
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REGFILE_CHECK(6'd21,32'hffff_f148);
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REGFILE_CHECK(6'd21,32'hffff_f14c);
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REGFILE_CHECK(6'd22,32'hffff_f150);
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REGFILE_CHECK(6'd22,32'hffff_f154);
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REGFILE_CHECK(6'd22,32'hffff_f158);
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REGFILE_CHECK(6'd22,32'hffff_f15c);
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REGFILE_CHECK(6'd23,32'hffff_f160);
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REGFILE_CHECK(6'd23,32'hffff_f164);
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REGFILE_CHECK(6'd23,32'hffff_f168);
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REGFILE_CHECK(6'd23,32'hffff_f16c);
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REGFILE_CHECK(6'd24,32'hffff_f170);
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REGFILE_CHECK(6'd24,32'hffff_f174);
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REGFILE_CHECK(6'd24,32'hffff_f178);
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REGFILE_CHECK(6'd24,32'hffff_f17c);
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REGFILE_CHECK(6'd25,32'hffff_f180);
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REGFILE_CHECK(6'd25,32'hffff_f184);
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REGFILE_CHECK(6'd25,32'hffff_f188);
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REGFILE_CHECK(6'd25,32'hffff_f18c);
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REGFILE_CHECK(6'd26,32'hffff_f190);
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REGFILE_CHECK(6'd26,32'hffff_f194);
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REGFILE_CHECK(6'd26,32'hffff_f198);
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REGFILE_CHECK(6'd26,32'hffff_f19c);
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REGFILE_CHECK(6'd27,32'hffff_f1a0);
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REGFILE_CHECK(6'd27,32'hffff_f1a4);
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REGFILE_CHECK(6'd27,32'hffff_f1a8);
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REGFILE_CHECK(6'd27,32'hffff_f1ac);
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REGFILE_CHECK(6'd28,32'hffff_f1b0);
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REGFILE_CHECK(6'd28,32'hffff_f1b4);
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REGFILE_CHECK(6'd28,32'hffff_f1b8);
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REGFILE_CHECK(6'd28,32'hffff_f1bc);
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REGFILE_CHECK(6'd29,32'hffff_f1c0);
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REGFILE_CHECK(6'd29,32'hffff_f1c4);
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REGFILE_CHECK(6'd29,32'hffff_f1c8);
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REGFILE_CHECK(6'd29,32'hffff_f1cc);
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REGFILE_CHECK(6'd30,32'hffff_f1d0);
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REGFILE_CHECK(6'd30,32'hffff_f1d4);
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REGFILE_CHECK(6'd30,32'hffff_f1d8);
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REGFILE_CHECK(6'd30,32'hffff_f1dc);
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REGFILE_CHECK(6'd31,32'hffff_f1e0);
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REGFILE_CHECK(6'd31,32'hffff_f1e4);
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REGFILE_CHECK(6'd31,32'hffff_f1e8);
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REGFILE_CHECK(6'd31,32'hffff_f1ec);
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#10us;
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TEST_PASS;
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end
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task DRAM_DATA_CHECK;
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input [9:0] addr ;
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input [31:0] edata ;
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logic [31:0] ram_data;
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@(posedge ram_cs_dly1 );
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@(posedge ram_clk );
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//$monitor($time, " Simulation time: %t", $time);
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if(ram_cs_dly1) begin
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ram_data = `TB_DRAM.mem[addr];
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//$display("* RAM_DATA[%x]: %x | EXP_DATA: %x ",addr,ram_data, edata);
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if(ram_data !== edata) begin
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$display("* RAM_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,ram_data, edata);
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#1us;
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TEST_FAIL;
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end
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$display("* RAM_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, ram_data, edata);
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end
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else begin
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$display("* DRAM CS is High => Error!!!");
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TEST_FAIL;
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end
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endtask
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task REGFILE_CHECK;
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input [4:0] addr ;
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input [31:0] edata ;
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logic [31:0] reg_data;
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@(posedge reg_en );
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@(posedge reg_clk);
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if(reg_en)begin
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reg_data = tbtop.U_CHIP_TOP.U_qbmcu.U_qbmcu_regfile.wbck_dest_dat;
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if(reg_data !== edata) begin
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$display("* REG_DATA[%x]: %x | EXP_DATA: %x => Error!!!",addr,reg_data, edata);
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#1us;
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//TEST_FAIL;
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end
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$display("* REG_DATA[%x]: %x | EXP_DATA: %x => OK!!!",addr, reg_data, edata);
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end
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else begin
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$display("* REG WR EN is High => Error!!!");
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//TEST_FAIL;
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end
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endtask
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initial begin
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#100us;
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$display("\n----------------------------------------\n");
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$display("\t Timeout Error !!!!\n");
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TEST_FAIL;
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end
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