SPI_Test/tb/qumcu/isa/case/And_0x50x0_test/main.s

33 lines
565 B
ArmAsm
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2024-06-25 16:41:01 +08:00
lui x31, 0x55555
addi x31, x31, 0x555
and x1, x1, x0
and x2, x1, x0
and x3, x1, x0
and x4, x1, x0
and x5, x1, x0
and x6, x1, x0
and x7, x1, x0
and x8, x1, x0
and x9, x1, x0
and x10, x1, x0
and x11, x1, x0
and x12, x1, x0
and x13, x1, x0
and x14, x1, x0
and x15, x1, x0
and x16, x1, x0
and x17, x1, x0
and x18, x1, x0
and x19, x1, x0
and x20, x1, x0
and x21, x1, x0
and x22, x1, x0
and x23, x1, x0
and x24, x1, x0
and x25, x1, x0
and x26, x1, x0
and x27, x1, x0
and x28, x1, x0
and x29, x1, x0
and x30, x1, x0
and x31, x1, x0