30 lines
519 B
Coq
30 lines
519 B
Coq
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`timescale 1ns/1ps
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//====================================================
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//Author : pwy
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//Date : 2020-06-24
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//Des : async set & sync release
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//====================================================
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module rst_sync(
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input clk_d ,
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input async_rstn ,
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output sync_rstn
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);
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reg rstn_s1;
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reg rstn_s2;
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always@(posedge clk_d or negedge async_rstn)begin
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if(!async_rstn)begin
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rstn_s1 <=1'b0;
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rstn_s2 <=1'b0;
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end
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else begin
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rstn_s1 <=1'b1;
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rstn_s2 <=rstn_s1;
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end
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end
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assign sync_rstn = rstn_s2;
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endmodule
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