SPI_Test/tb/qumcu/isa/case/Srl_0xf20x1f_test/main.s

9 lines
113 B
ArmAsm
Raw Permalink Normal View History

2024-06-25 16:41:01 +08:00
addi x4, x0, 31
main_loop:
addi x2, x2,1
lui x1, 0x80000
loop1:
srl x1,x1,x2
bne x1,x0,loop1
bne x2,x4,main_loop