SPI_Test/tb/qumcu/isa/case/Sll_0xb_test/main.s

8 lines
80 B
ArmAsm
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2024-06-25 16:41:01 +08:00
addi x1, x0,1
addi x2, x0,11
addi x4, x0, 15
loop:
sll x1,x1,x2
bne x1,x0,loop